Commit c2b627a5 authored by Andrey Filippov's avatar Andrey Filippov

added i2c driver from NC353 for IMU and GPS (disabled chn 0)

parent 01956c03
......@@ -29,3 +29,5 @@ obj-$(CONFIG_ELPHEL393) += pgm_functions.o
obj-$(CONFIG_ELPHEL393) += mt9x001.o
obj-$(CONFIG_ELPHEL393) += multi10359.o
obj-$(CONFIG_ELPHEL393) += imu_log393.o
obj-$(CONFIG_ELPHEL393) += cxi2c.o
/** @file cci2c.h
*
* @brief Pre-393 I2c driver for FPGA communicating to sensors, software implementation
* Porting to get GPS communication, sesnors in NC393 are handled by sensor_i2c.c driver
*
* @copyright Copyright (C) 2002-2016 Elphel, Inc
*
* @par <b>License</b>
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
int i2c_delays (unsigned long delays);
int i2c_writeData(int n, unsigned char theSlave, unsigned char *theData, int size, int stop);
int i2c_readData(int n, unsigned char theSlave, unsigned char *theData, int size, int start);
int i2c_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg);
#ifdef NC353
void i2c_reset_wait(void);
void i2c_stop_wait(void);
void i2c_run(void);
int i2s_running(void);
#endif
This diff is collapsed.
......@@ -38,43 +38,25 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/interrupt.h>
//#include <linux/time.h> //?
#include <linux/platform_device.h>
//#include <linux/of.h>
#include <linux/of_device.h>
#include <asm/outercache.h>
#include <asm/cacheflush.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/errno.h>
#include <linux/fs.h>
#include <linux/string.h>
//#include <asm/io.h>
//#include <asm/irq.h>
//#include <asm/atomic.h>
#include <asm/delay.h>
#include <asm/uaccess.h> // copy_*_user
#include <elphel/driver_numbers.h>
#include <elphel/c313a.h>
#include <elphel/elphel393-mem.h>
#include "imu_log393.h"
#include "x393.h"
#include "legacy_defines.h" // temporarily
#include "cci2c.h"
//#include "legacy_defines.h" // temporarily
//#include "x393_macro.h"
//#include "x393_helpers.h"
//#include "x3x3.h"
//#include "cci2c.h" // i2c to enable CS for the IMU
#if 0
#define D(x) x
......@@ -413,14 +395,11 @@ static void set_logger_params(int which){ // 1 - program IOPINS, 2 - reset first
enable_IMU=0xfe; // maybe we need to reset it here? bit [1]
#endif
//TODO: Implement bus 1 i2c for 393
#ifdef NC353
i2c_writeData(1, // int n - bus (0 - to the sensor)
i2c_writeData(1, // int n - bus (0 - to the sensor)
i2c_sa, // unsigned char theSlave,
&enable_IMU, //unsigned char *theData,
1, // int size,
1); // int stop (send stop in the end)
#endif
D(printk("Sent i2c command in raw mode - address=0x%x, data=0x%x, result=0x%x\n",(int)i2c_sa, (int) enable_IMU, i2c_err));
}
if (which & WHICH_RESET_SPI) {
......@@ -1289,21 +1268,3 @@ static struct platform_driver elphel393_logger = {
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Andrey Filippov <andrey@elphel.com>.");
MODULE_DESCRIPTION(IMU_MODULE_DESCRIPTION);
/*
DECLARE_TASKLET(tasklet_fpga, tasklet_fpga_function, 0); /// 0 - no arguments for now
in irq:
wake_up_interruptible(&framepars_wait_queue); /// all interrupts, not just frames acquired
tasklet_schedule(&tasklet_fpga); /// trigger software interrupt
void tasklet_fpga_function(unsigned long arg);
void tasklet_fpga_function(unsigned long arg){
...
wake_up_interruptible(&hist_c_wait_queue); /// wait queue for all the other (R,G2,B) histograms (color)
---
wait_queue_head_t hist_y_wait_queue; /// wait queue for the G1 histogram (used as Y)
wait_event_interruptible (hist_c_wait_queue,GLOBALPARS(G_HIST_C_FRAME)>=offset);
init_waitqueue_head(&hist_c_wait_queue); /// wait queue for all the other (R,G2,B) histograms (color)
wake_up_interruptible(&hist_c_wait_queue); /// wait queue for all the other (R,G2,B) histograms (color)
}
*/
......@@ -118,6 +118,23 @@
#define MCPwshared 0x80
#define MCPwrsynctb 0x100
#define MCPwrseq 0x200
#else
// Temporarily porting, to use only bus = 1 (GPS, IMU)
#define X3X3_I2C_CTRL 0 ///< control/reset i2c
#define X3X3_I2C_8_AINC 1 ///< 8bit registers, autoincement while read/write
#define X3X3_I2C_16_AINC 2 ///< 16bit registers, autoincement while read/write
#define X3X3_I2C1_8_AINC 3 ///< 8bit registers, autoincement while read/write (bus 1)
#define X3X3_I2C1_16_AINC 4 ///< 16bit registers, autoincement while read/write (bus 1)
#define X3X3_I2C_RAW 5 ///< 8bit registers, no address byte (just slave, then read/write byte(s)
#define X3X3_I2C1_RAW 6 ///< 8bit registers, no address byte (just slave, then read/write byte(s)
#define X3X3_I2C_ENABLE 7 ///< enable(/protect) different I2C devices for different types of I2C accesses
#define X3X3_I2C_ENABLE_RD 0 ///< bit 0 - enable i2c read
#define X3X3_I2C_ENABLE_WR 1 ///< bit 1 - enable i2c write
#define X3X3_I2C_ENABLE_RAW 2 ///< bit 2 - enable i2c raw (no address byte)
#define X3X3_I2C_ENABLE_8 3 ///< bit 3 - enable i2c 8-bit registers access
#define X3X3_I2C_ENABLE_16 4 ///< bit 4 - enable i2c 16-bit registers access
#define X3X3_I2C_MAXMINOR 7 ///<
#define X3X3_I2C_CHANNELS 2 ///< number of i2c channels (0 is not used in NC393)
#endif
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment