working on histograms code

void  gamma_calc_scaled (unsigned short scale,unsigned short * gamma_in, unsigned short * gamma_out);/// scale gamma table by (scale>>GAMMA_SCALE_SHIFT), saturate to 0..0xffff

//void  gamma_calc_reverse(unsigned short * gamma_in, unsigned short * gamma_out);/// calculate reverse gamma table (16-bit output) that matches 1-byte gamma-converted data to the input data (in the 0..ffff range)

void  gamma_calc_reverse(unsigned short * gamma_in, unsigned char * gamma_out);/// calculate reverse gamma table (8-bit output) that matches 1-byte gamma-converted data to the input data (in the 0..ffff range)

/// return index of the specified hash/scale, insert new table (gamma_proto) if needed

/// If no table is specified (null) - return 0 if no prototype is found

/// if (not_nice) - don't re-enable interrupts between atomic actions (may fail)

/// if "hardware" is non-zero, color/frame pair will be used to lock node to it, fpga-encoded table will be calculated (if not done so earlier)

// return index of the specified hash/scale, insert new table (gamma_proto) if needed

// If no table is specified (null) - return 0 if no prototype is found

// if (not_nice) - don't re-enable interrupts between atomic actions (may fail)

// if "hardware" is non-zero, color/frame pair will be used to lock node to it, fpga-encoded table will be calculated (if not done so earlier)

// #define GAMMA_MODE_NOT_NICE     1  // if set, no interrupts will be enabled between steps, whole operation is atomic

// #define GAMMA_MODE_NEED_REVERSE 2  // reverse gamma table is needed

// #define GAMMA_MODE_HARDWARE     4  // the table is needed to program FPGA: fpga-encoded table will be calculated (if not yet), node will be locked for specified

                                   // color/frame pair

int set_gamma_table (unsigned short hash16, unsigned short scale, unsigned short * gamma_proto,  unsigned char mode, int color);

int set_gamma_table (unsigned short hash16, unsigned short scale, unsigned short * gamma_proto,  unsigned char mode, int color, int sensor_port, int sensor_subchn);

unsigned long get_locked_hash32(int color);

#endif

extern wait_queue_head_t hist_y_wait_queue; /// wait queue for the G1 histogram (used as Y)

extern wait_queue_head_t hist_c_wait_queue; /// wait queue for all the other (R,G2,B) histograms (color)

void init_histograms(void);

int set_histograms (unsigned long frame, int needed, unsigned long * gammaHash, unsigned long * framep);

void init_histograms(int chn_mask);

int get_hist_index (int sensor_port, int sensor_chn);

int set_histograms (int sensor_port, int sensor_chn, unsigned long frame, int needed, unsigned long * gammaHash, unsigned long * framep);

/**

 * @brief Get histograms from the FPGA (called as tasklet?) and/or calculate derivatives (if needed)

 * TODO: should it be one frame behind current?

 * @param needed bits specify what histograms (color, type) are requested

 * TODO: Add P_* parameter - what to read from tasklet,  turn colors it off for high FPS/small window

 * each group of 4 bits cover 4 colors of the same type:

 * each group of 4 bits covers 4 colors of the same type:

 * - bits 0..3 - read raw histograms from the FPGA - normally called from IRQ/tasklet (use just 1 color for autoexposure to speed up?)

 * - bits 4..7 - calculate cumulative histograms (sum of raw ones) - normally called from applications

 * - bits 8..11 - calculate percentiles (reverse cumulative histograms) - normally called from applications

 * "needed" for raw histograms should be specified explicitely (can not be read from FPGA later),

 * "needed" for raw histograms should be specified explicitly (can not be read from FPGA later),

 * "needed" for cumul_hist will be added automatically if percentiles are requested

 * @return index of the histogram (>=0) if OK, otherwise:

 * - -1 not reading FPGA and frame number stored is different from the requested (too late - histogram buffer overrun?)

 */

int get_histograms (unsigned long frame, int needed);

int histograms_init_hardware(void);

void histograms_dma_ctrl(int mode); // 0 - reset, 1 - disable, 2 - enable

 void x313_dma_init(){}

 void reset_compressor(){}

// if ((gtable= get_gamma_fpga(color))) fpga_table_write_nice (CX313_FPGA_TABLES_GAMMA + (color * 256), 256, gtable);

// X3X3_SEQ_SEND1(frame16,  X313_WA_DCR0, X353_DCR0(SENSTRIGEN,async));

#ifdef NC353

 /// IRQ-safe "nice" FPGA table write and histogram read functions - they split the data in chunks of fixed size,

 /// disable IRQ, transfer a chunk, then reenable interrupt before proceedg to the next chunk

 #define FPGA_TABLE_CHUNK 64 // up to 64 words to send to the table/from histogram on a single IRQ-off transfer

 void fpga_table_write_nice (int addr, int len, unsigned long * data) {

   unsigned long flags;

   int l,i;

   MDF12(printk("addr=0x%x, len=0x%x, data=0x%08lx 0x%08lx 0x%08lx 0x%08lx...\n", addr, len, data[0], data[1], data[2], data[3]));

   while (len>0) {

     l=(len < FPGA_TABLE_CHUNK)?len:FPGA_TABLE_CHUNK;

     local_irq_save(flags);

     port_csp0_addr[X313_WA_COMP_TA]=addr; // open fpga for writing table(s)

     for (i=0; i<l; i++) port_csp0_addr[X313_WA_COMP_TD]=data[i]; /// will autoincrement FPGA table address

     local_irq_restore(flags);

     len  -=l;

     addr +=l;

     data +=l;

   }

 }

 ///

 /// reading histograms really does not need disabling IRQs - they only could interfere with other process, reading histograms

 ///

 void fpga_hist_read_nice (int addr, int len, unsigned long * data) {

   unsigned long flags;

   int l,i;

   MDF13(printk("addr=0x%x, len=0x%x, ",addr, len));

   while (len>0) {

     l=(len < FPGA_TABLE_CHUNK)?len:FPGA_TABLE_CHUNK;

     local_irq_save(flags);

 //  #define   X313_WA_HIST_ADDR   0x44

 //  #define   X313_RA_HIST_DATA   0x45  /// use CSP4 with wait cycles to have a pulse

     port_csp0_addr[X313_WA_HIST_ADDR]=addr; /// Write start address, read first word from the memory to the output buffer (will be read out during next read)

     X3X3_AFTERWRITE ; //! needed before reading from FPGA after writing to it (for the writes that influence reads only)

     for (i=0; i<l; i++) data[i]=port_csp4_addr[X313_RA_HIST_DATA]; /// will autoincrement FPGA table address)

     local_irq_restore(flags);

     len  -=l;

     addr +=l;

     data +=l;

   }

   D13(printk("data=0x%08lx 0x%08lx 0x%08lx 0x%08lx...\n", data[0], data[1], data[2], data[3]));

 }

#endif