moved hispi lanes phases adjustment to from mt9f002_pgm_initsensor to...

moved hispi lanes phases adjustment to from mt9f002_pgm_initsensor to mt9f002_pgm_detectsensor - this supposedly removed rare i2c write errors

moved hispi lanes phases adjustment to from mt9f002_pgm_initsensor to...
moved hispi lanes phases adjustment to from mt9f002_pgm_initsensor to mt9f002_pgm_detectsensor - this supposedly removed rare i2c write errors
18fc2e0a · Oleg Dzhimiev · 20bcfcfc · 18fc2e0a · 18fc2e0a
Commit 18fc2e0a authored Apr 11, 2019 by Oleg Dzhimiev
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Showing with 217 additions and 56 deletions

mt9f002.c src/drivers/elphel/mt9f002.c +216 -55

mt9f002.h src/drivers/elphel/mt9f002.h +1 -1

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--- a/src/drivers/elphel/mt9f002.c
+++ b/src/drivers/elphel/mt9f002.c
--- a/src/drivers/elphel/mt9f002.h
+++ b/src/drivers/elphel/mt9f002.h
@@ -23,7 +23,7 @@
 // bit 9 should have set masking for broken frames
 // cleared bit 3 allows writing to some RO registers
 //#define MT9F002_RESET_REGISTER_VALUE 0x001c
-#define MT9F002_RESET_REGISTER_VALUE 0x0011c
+#define MT9F002_RESET_REGISTER_VALUE 0x011c
 //#define MT9F002_RESET_REGISTER_VALUE 0x0014
 // number of lines to sacrifice before generating Frame Valid
 #define MT9F002_VACT_DELAY 2