- 16 Jan, 2014 3 commits
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Maciej Suminski authored
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Maciej Suminski authored
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Maciej Suminski authored
NETINFO_ITEMs are not stored in a vector anymore, instead they are held in a unordered_map. Now, the net codes may be not consecutive. There is another way for assigning net codes (using a static int that holds a possible empty net code and a function that makes sure it is not used [getFreeNetCode()]). Removed some unused fields (NETINFO_ITEM::m_NbNodes, m_NbLink, m_NbNoconn, m_Flag).
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- 15 Jan, 2014 2 commits
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Maciej Suminski authored
BOARD_CONNECTED_ITEMs do not store net code anymore (m_NetCode field), instead net info is stored using a pointer to NETINFO_ITEM. GetNet() refers to the net code stored in the NETINFO_ITEM. SetNet() finds an appropriate NETINFO_ITEM and uses it. Removing GetNet() & SetNet() (and the whole net code idea) requires too many changes in the code (~250 references to the mentioned functions). BOARD_CONNECTED_ITEMs by default get a pointer to NETINFO_ITEM that stores unconnected items. This requires for all BOARD_CONNECTED_ITEMs to have a parent (so BOARD* is accessible). The only orphaned item is BOARD_DESIGN_SETTINGS::m_Pad_Master, but it does not cause any issues so far. Items that do not have access to a BOARD (do not have set parents) and therefore cannot get net assigned, by default get const static NETINFO_LIST::ORPHANED. Performed tests: - loaded .kicad_pcb, KiCad legacy board, Eagle 6.0 board, P-CAD board - all ok - load a simple project, reload netlist after changing connections in eeschema - ok - save & reload a board - ok, but still contain empty nets - remove everything, restore with undo - ok - remove everything, reload netlist - ok - changing net names (all possibilites: empty->existing, empty->not existing, existing->empty, existing->not existing) - all ok - zones: when net is changed to a net that does not have any nodes besides the zone itself, it does not get filled
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Maciej Suminski authored
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- 14 Jan, 2014 2 commits
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Maciej Suminski authored
- ZONE_CONTAINER::m_Netname field - ZONE_CONTAINER::SetNetName() - ZONE_CONTAINER::SetNet() [it uses the one in BOARD_CONNECTED_ITEM] - ZONE_CONTAINER::GetNetName() [instead BOARD_CONNECTED_ITEM::GetNetname is used] - ZONE_CONTAINER::SetNetNameFromNetCode() Performed tests: - Drawn a zone that belongs to a net, then modified schematics so the net does not exist anymore. After reloading the net list, all pads/tracks are updated. Zones still belongs to the net that does not exist in the schematic (but still exists in .kicad_pcb file). After running DRC, the zone becomes not filled. - Undo & redo affects assignment of a polygon to a specific net (you may change net of a polygon, refill it and undo/redo the changes).
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Maciej Suminski authored
D_PAD::GetNetname() and D_PAD::GetShortNetname() were moved to BOARD_CONNECTED_ITEM. Now they use the net name stored in NETINFO_ITEM. Moved some one-line functions from class_board_connected_item.cpp to class_board_connected_item.h. Added a copyright notice, moved Doxygen comments from class_board_connected_item.cpp to class_board_connected_item.h. I have some doubts if changes introduced pcbnew/dialogs/dialog_pad_properties.cpp do not break anything, but I could not find a test case that breaks the pcbnew. Performed tests: - changed pad's net name from empty to existent - ok, name was changed - changed pad's net name from empty to nonexistent - ok, error message is displayed, net name stays empty - changed pad's net name from existent to empty - ok, net name became empty - changed pad's net name from existent to nonexistent - ok, error message is displayed, net name is not changed - (re)reading netlists, including net changes - fine, changes are applied, but empty nets are still kept - loaded pcbnew/pcad2kicadpcb_plugin/examples/CK1202_V1.pcb to test P-CAD import plugin - ok, net names are correct - imported an Eagle 6.0 board (Arduino Uno; http://arduino.cc/en/uploads/Main/arduino_Uno_Rev3-02-TH.zip) then saved in .kicad_pcb format and reloaded - ok, net names are correct - saved demos/video/video.kicad_pcb in legacy format and then loaded it again - ok, net names are correct
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- 10 Jan, 2014 2 commits
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Maciej Suminski authored
Changed the way of looking up NETINFO_ITEM using net names (using boost::unordered_map). Added a hash function (wxString) for that. Introduced NETINFO_ITEM::GetNetItem( wxString ). BOARD::FindNet() uses the map. Net codes are updated upon net list update. (BOARD::ReplaceNetlist()) Added in some places (mostly class_board.cpp) pad->SetNet() calls to synchronize net codes. On creation of NETINFO_LIST, the first NETINFO_ITEM is added (the unconnected items net). Removed COMPONENT_NET::m_netNumber, as it was not used anywhere. Added an assert to D_PAD::GetNetname(), checking if net code and net name is consistent for unconnected pads. Added an assert for NETINFO_LIST::AppendNet() to assure that appended nets are unique. It seems that at this point: - Updating net lists works fine. The only difference between the file ouput is that after changes it contains empty nets as well. - Nets are not saved in the lexical order. Still, net names and net codes are properly assigned to all items in the .kicad_pcb file. It is going to be addressed in the next commit. I believe it should not create any problems, as pads are sorted by their net names anyway (NETINFO_LIST::buildPadsFullList()) Performed tests: - Created a blank PCB, saved as pic_programmer.kicad_pcb (from demos folder). Updated net lists. .kicad_pcb file (comparing to the results from master branch) differ with net order (as mentioned before), net codes and timestamps. - Removed some of components from the above .kicad_pcb file and updated net lists. Modules reappeared. .kicad_pcb file differs in the same way as described above. - Trying to change a pad net name (via properties dialog) results in assert being fired. It is done on purpose (as there is a call to GetNetname() and net name and net code do not match). This will not happen after the next commit. - Prepared a simple project (starting with schematics). Imported net list, changed schematic, reimported net list - changes are applied. - Eagle & KiCad legacy boards seem to load without any problem.
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Maciej Suminski authored
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- 09 Jan, 2014 1 commit
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Maciej Suminski authored
NETINFO_ITEM::m_Net and NETINFO_ITEM::m_Netname are const. Changes to be verified: - pcbnew/minimun_spanning_tree.cpp: It segfaults is m_Size == 0 - pcbnew/exporters/export_gencad.cpp: I removed the SetNetname() call, as it changes only the unconnected net and in the next line it returns if the net is unconnected. Still, I wonder if name for the unconnected net matters. What about tests that check if a net name is empty to decide if it is unconnected net or not.
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- 08 Jan, 2014 7 commits
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jean-pierre charras authored
Pcbnew, Eeschema: remove include file <protos.h> from a lot of files which do not need it.
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Dick Hollenbeck authored
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jean-pierre charras authored
all: remove include <protos.h> from a lot of files which do not need it.
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Maciej Sumiński authored
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Dick Hollenbeck authored
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Dick Hollenbeck authored
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- 07 Jan, 2014 3 commits
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jean-pierre charras authored
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jean-pierre charras authored
Update demos. Fix pspice netlist issues when using ( and ) in net names ( parenthesis are replaced by underscore) .
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Cirilo Bernardo authored
Commit patch about new better vrml export. patch to fix mirrored page layout when print mirrored is enabled ( page layout should not be mirrored)
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- 06 Jan, 2014 2 commits
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Marco Serantoni authored
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jean-pierre charras authored
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- 04 Jan, 2014 4 commits
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Marco Serantoni authored
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Marco Serantoni authored
[MacOSX] Added support in boost context for PPC processors, now is possible again compile kicad testing for PPC ( https://svn.boost.org/trac/boost/ticket/8266 )
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Dick Hollenbeck authored
Pray for angus johnson who is support too many languages, and needs to find a text editor that removes trailing whitespace.
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Dick Hollenbeck authored
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- 03 Jan, 2014 5 commits
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Dick Hollenbeck authored
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Dick Hollenbeck authored
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Dick Hollenbeck authored
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jean-pierre charras authored
Pcbnew: very minor fixes and update: update clipper version. uncrustify polytri/* and fix some warning compil.
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Cirilo Bernardo authored
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- 02 Jan, 2014 3 commits
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Cirilo Bernado authored
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Cirilo Bernardo authored
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Dick Hollenbeck authored
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- 31 Dec, 2013 6 commits
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Dick Hollenbeck authored
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Dick Hollenbeck authored
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Marco Serantoni authored
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Marco Serantoni authored
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Marco Serantoni authored
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Marco Serantoni authored
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