Loading cvpcb/CMakeLists.txt +1 −0 Original line number Diff line number Diff line Loading @@ -43,6 +43,7 @@ set(CVPCB_EXTRA_SRCS ../pcbnew/class_text_mod.cpp ../pcbnew/class_track.cpp ../pcbnew/class_zone.cpp ../pcbnew/class_zone_setting.cpp ../pcbnew/classpcb.cpp ../pcbnew/collectors.cpp ../pcbnew/ioascii.cpp Loading cvpcb/makefile.include +4 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ LIBVIEWER3D = ../3d-viewer/3d-viewer.a OBJECTS = $(TARGET).o \ class_cvpcb.o\ class_zone.o\ class_zone_setting.o\ memoire.o \ cvframe.o\ listboxes.o\ Loading Loading @@ -81,6 +82,9 @@ class_mire.o: ../pcbnew/class_mire.cpp ../pcbnew/class_mire.h $(COMMON) class_zone.o: ../pcbnew/class_zone.cpp ../pcbnew/class_zone.h $(COMMON) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp class_zone_setting.o: ../pcbnew/class_zone_setting.cpp ../pcbnew/class_zone_setting.h $(COMMON) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp class_cotation.o: ../pcbnew/class_cotation.cpp ../pcbnew/class_cotation.h $(COMMON) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp Loading eeschema/schframe.cpp +2 −2 Original line number Diff line number Diff line Loading @@ -419,8 +419,8 @@ void WinEDA_SchematicFrame::SetToolbars() m_OptionsToolBar->ToggleTool( ID_TB_OPTIONS_BUS_WIRES_ORIENT, g_HVLines ); m_OptionsToolBar->SetToolShortHelp( ID_TB_OPTIONS_BUS_WIRES_ORIENT, g_HVLines ? _( "Snap Grid (OFF)" ) : _( "Snap Grid (ON)" ) ); g_HVLines ? _( "Allows any direction for wires and busses" ) : _( "Allows horizontal and vertical wires and busses only" ) ); } DisplayUnitsMsg(); Loading gerbview/CMakeLists.txt +1 −0 Original line number Diff line number Diff line Loading @@ -48,6 +48,7 @@ set(GERBVIEW_EXTRA_SRCS ../pcbnew/class_pcb_text.cpp ../pcbnew/class_track.cpp ../pcbnew/class_zone.cpp ../pcbnew/class_zone_setting.cpp ../pcbnew/classpcb.cpp ../pcbnew/collectors.cpp ../pcbnew/sel_layer.cpp Loading gerbview/makefile.include +4 −0 Original line number Diff line number Diff line Loading @@ -13,6 +13,7 @@ OBJECTS= \ $(TARGET).o\ classpcb.o\ class_zone.o\ class_zone_setting.o\ select_layers_to_pcb.o\ sel_layer.o\ lay2plot.o\ Loading Loading @@ -78,6 +79,9 @@ class_marker.o: ../pcbnew/class_marker.cpp ../pcbnew/class_marker.h $(COMMON) class_zone.o: ../pcbnew/class_zone.cpp ../pcbnew/class_zone.h $(COMMON) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp class_zone_setting.o: ../pcbnew/class_zone_setting.cpp ../pcbnew/class_zone_setting.h $(COMMON) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp class_drawsegment.o: ../pcbnew/class_drawsegment.cpp ../pcbnew/class_drawsegment.h $(DEPEND) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp Loading Loading
cvpcb/CMakeLists.txt +1 −0 Original line number Diff line number Diff line Loading @@ -43,6 +43,7 @@ set(CVPCB_EXTRA_SRCS ../pcbnew/class_text_mod.cpp ../pcbnew/class_track.cpp ../pcbnew/class_zone.cpp ../pcbnew/class_zone_setting.cpp ../pcbnew/classpcb.cpp ../pcbnew/collectors.cpp ../pcbnew/ioascii.cpp Loading
cvpcb/makefile.include +4 −0 Original line number Diff line number Diff line Loading @@ -17,6 +17,7 @@ LIBVIEWER3D = ../3d-viewer/3d-viewer.a OBJECTS = $(TARGET).o \ class_cvpcb.o\ class_zone.o\ class_zone_setting.o\ memoire.o \ cvframe.o\ listboxes.o\ Loading Loading @@ -81,6 +82,9 @@ class_mire.o: ../pcbnew/class_mire.cpp ../pcbnew/class_mire.h $(COMMON) class_zone.o: ../pcbnew/class_zone.cpp ../pcbnew/class_zone.h $(COMMON) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp class_zone_setting.o: ../pcbnew/class_zone_setting.cpp ../pcbnew/class_zone_setting.h $(COMMON) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp class_cotation.o: ../pcbnew/class_cotation.cpp ../pcbnew/class_cotation.h $(COMMON) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp Loading
eeschema/schframe.cpp +2 −2 Original line number Diff line number Diff line Loading @@ -419,8 +419,8 @@ void WinEDA_SchematicFrame::SetToolbars() m_OptionsToolBar->ToggleTool( ID_TB_OPTIONS_BUS_WIRES_ORIENT, g_HVLines ); m_OptionsToolBar->SetToolShortHelp( ID_TB_OPTIONS_BUS_WIRES_ORIENT, g_HVLines ? _( "Snap Grid (OFF)" ) : _( "Snap Grid (ON)" ) ); g_HVLines ? _( "Allows any direction for wires and busses" ) : _( "Allows horizontal and vertical wires and busses only" ) ); } DisplayUnitsMsg(); Loading
gerbview/CMakeLists.txt +1 −0 Original line number Diff line number Diff line Loading @@ -48,6 +48,7 @@ set(GERBVIEW_EXTRA_SRCS ../pcbnew/class_pcb_text.cpp ../pcbnew/class_track.cpp ../pcbnew/class_zone.cpp ../pcbnew/class_zone_setting.cpp ../pcbnew/classpcb.cpp ../pcbnew/collectors.cpp ../pcbnew/sel_layer.cpp Loading
gerbview/makefile.include +4 −0 Original line number Diff line number Diff line Loading @@ -13,6 +13,7 @@ OBJECTS= \ $(TARGET).o\ classpcb.o\ class_zone.o\ class_zone_setting.o\ select_layers_to_pcb.o\ sel_layer.o\ lay2plot.o\ Loading Loading @@ -78,6 +79,9 @@ class_marker.o: ../pcbnew/class_marker.cpp ../pcbnew/class_marker.h $(COMMON) class_zone.o: ../pcbnew/class_zone.cpp ../pcbnew/class_zone.h $(COMMON) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp class_zone_setting.o: ../pcbnew/class_zone_setting.cpp ../pcbnew/class_zone_setting.h $(COMMON) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp class_drawsegment.o: ../pcbnew/class_drawsegment.cpp ../pcbnew/class_drawsegment.h $(DEPEND) $(CXX) -c $(EDACPPFLAGS) -o $@ ../pcbnew/$*.cpp Loading