Comment translation and capitalization fixes. (de442033) · Commits · Elphel / kicad-source-mirror

pcbnew/pcbplot.h

+11 −15

Original line number	Diff line number	Diff line
		@@ -16,10 +16,10 @@
		#define OPTKEY_PRINT_PAGE_FRAME wxT( "PrintPageFrame" )
		#define OPTKEY_PRINT_MONOCHROME_MODE wxT( "PrintMonochrome" )

		/* Constantes de conversion d'unites */
		/* coeff de conversion dim en 0.1 mil -> dim en unite PS: (unite PS = pouce) */
		/* Conversion unit constants. */
		/* Convert pcb dimension of 0.1 mil to PS units of inches. */
		#define SCALE_PS .0001
		/* coeff de conversion dim en 0,1 mil -> dim en unite HPGL: */
		/* Convert dimension 0.1 mil -> HPGL units: */
		#define SCALE_HPGL 0.102041

		/* Plot Options : */
		@@ -29,7 +29,8 @@ public:
		bool Exclude_Edges_Pcb;
		int PlotLine_Width;
		bool Plot_Frame_Ref; // True to plot/print frame references
		bool DrawViaOnMaskLayer; // True if vias are drawn on Mask layer (ie protected by mask)
		bool DrawViaOnMaskLayer; // True if vias are drawn on Mask layer
		// (ie protected by mask)
		GRTraceMode Trace_Mode;
		bool Plot_Set_MIROIR;
		int HPGL_Pen_Num;
		@@ -39,14 +40,14 @@ public:
		int PlotPSColorOpt; // True for color Postscript output
		bool Plot_PS_Negative; // True to create a negative board ps plot

		/* Autorisation de trace des divers items en serigraphie */
		/* Flags to enable or disable ploting of various PCB elements. */
		bool Sel_Texte_Reference;
		bool Sel_Texte_Valeur;
		bool Sel_Texte_Divers;
		bool Sel_Texte_Invisible;
		bool PlotPadsOnSilkLayer;
		bool Plot_Pads_All_Layers; /* Plot pads meme n'appartenant pas a la
		* couche ( utile pour serigraphie) */
		bool Plot_Pads_All_Layers; /* Plot pads even outside the
		* Layer (useful for silkscreen) */

		/* id for plot format (see enum PlotFormat in plot_common.h) */
		int PlotFormat;
		@@ -68,17 +69,12 @@ public:

		extern PCB_Plot_Options g_pcb_plot_options;

		/*************************************/
		/* Constantes utiles en trace GERBER */
		/*************************************/

		/* PLOT_RTN.CC */
		void PlotTextePcb( PLOTTER* plotter, TEXTE_PCB* pt_texte, int masque_layer,
		GRTraceMode trace_mode );

		/* Trace 1 Texte type PCB , c.a.d autre que les textes sur modules,
		* prepare les parametres de trace de texte */

		/* Plat PCB text type, ie other than text on modules
		* prepare the plot settings of text */
		void PlotDrawSegment( PLOTTER* plotter, DRAWSEGMENT* PtSegm, int masque_layer,
		GRTraceMode trace_mode );

pcbnew/plot_rtn.cpp

+232 −167

File changed.

Preview size limit exceeded, changes collapsed.

pcbnew/plotdxf.cpp

+5 −7

Original line number	Diff line number	Diff line
		/*******************************/
		/** Routine de trace HPGL **/
		/*******************************/
		/******************/
		/** Plot DXF **/
		/******************/

		#include "fctsys.h"
		#include "common.h"
		@@ -12,10 +12,8 @@

		#include "protos.h"

		/*****************************************************************************/
		void WinEDA_BasePcbFrame::Genere_DXF( const wxString& FullFileName, int Layer,
		GRTraceMode trace_mode )
		/*****************************************************************************/
		{
		Ki_PageDescr* currentsheet = GetScreen()->m_CurrentSheetDesc;

pcbnew/plothpgl.cpp

+13 −14

Original line number	Diff line number	Diff line
		/*******************************/
		/** Routine de trace HPGL **/
		/*******************************/
		/*******************/
		/** Plot HPGL **/
		/*******************/

		#include "fctsys.h"
		#include "common.h"
		@@ -12,10 +12,9 @@

		#include "protos.h"

		/*****************************************************************************/

		void WinEDA_BasePcbFrame::Genere_HPGL( const wxString& FullFileName, int Layer,
		GRTraceMode trace_mode )
		/*****************************************************************************/
		{
		wxSize SheetSize;
		wxSize BoardSize;
		@@ -28,7 +27,7 @@ void WinEDA_BasePcbFrame::Genere_HPGL( const wxString& FullFileName, int Layer,
		ClearMsgPanel();

		// Compute pen_dim (from g_HPGL_Pen_Diam in mils) in pcb units,
		// with plot scale (if Scale is 2, pen diametre is always g_HPGL_Pen_Diam
		// with plot scale (if Scale is 2, pen diameter is always g_HPGL_Pen_Diam
		// so apparent pen diam is real pen diam / Scale
		int pen_diam = wxRound( (g_pcb_plot_options.HPGL_Pen_Diam * U_PCB) / g_pcb_plot_options.Scale );

		@@ -53,14 +52,14 @@ void WinEDA_BasePcbFrame::Genere_HPGL( const wxString& FullFileName, int Layer,
		AppendMsgPanel( _( "File" ), FullFileName, CYAN );

		if( g_pcb_plot_options.PlotScaleOpt != 1 )
		Center = TRUE; // Echelle != 1 donc trace centree du PCB
		Center = TRUE; // Scale != 1 so center PCB plot.


		// calcul en unites internes des dimensions des feuilles ( connues en 1/1000 pouce )
		// Scale units from 0.0001" to HPGL plot units.
		SheetSize.x = currentsheet->m_Size.x * U_PCB;
		SheetSize.y = currentsheet->m_Size.y * U_PCB;

		/* calcul des dimensions et centre du PCB */
		/* Calculate the center of the PCB. */
		m_Pcb->ComputeBoundaryBox();
		BoardSize = m_Pcb->m_BoundaryBox.GetSize();
		BoardCenter = m_Pcb->m_BoundaryBox.Centre();
		@@ -77,7 +76,7 @@ void WinEDA_BasePcbFrame::Genere_HPGL( const wxString& FullFileName, int Layer,
		else
		scale = g_pcb_plot_options.Scale;

		// Calcul du cadrage (echelle != 1 donc recadrage du trace)
		// Calculate the page size offset.
		if( Center )
		{
		offset.x = BoardCenter.x - ( SheetSize.x / 2 ) / scale;

pcbnew/plotps.cpp

+12 −17

Original line number	Diff line number	Diff line
		/*************************************/
		/** Pcbnew: Routine de trace PS **/
		/*************************************/
		/*************************/
		/** Plot Postscript **/
		/*************************/

		#include "fctsys.h"
		#include "common.h"
		@@ -12,14 +12,12 @@

		#include "protos.h"

		/****************************************************************************/
		void WinEDA_BasePcbFrame::Genere_PS( const wxString& FullFileName, int Layer,
		bool useA4, GRTraceMode trace_mode )
		/****************************************************************************/

		/* Genere un fichier POSTSCRIPT (*.ps) de trace du circuit, couche layer
		* if layer < 0: all layers
		/* Generate a PostScript file (*. ps) of the circuit layer.
		* If layer < 0: all layers are plotted.
		*/
		void WinEDA_BasePcbFrame::Genere_PS( const wxString& FullFileName, int Layer,
		bool useA4, GRTraceMode trace_mode )
		{
		wxSize SheetSize;
		wxSize PaperSize;
		@@ -45,13 +43,12 @@ void WinEDA_BasePcbFrame::Genere_PS( const wxString& FullFileName, int Layer,
		AppendMsgPanel( _( "File" ), FullFileName, CYAN );

		if( g_pcb_plot_options.PlotScaleOpt != 1 )
		Center = TRUE; // Echelle != 1 donc trace centree du PCB
		Center = TRUE; // Scale != 1 so center plot.

		// Set default line width
		if( g_pcb_plot_options.PlotLine_Width < 1 )
		g_pcb_plot_options.PlotLine_Width = 1;

		// calcul en unites internes des dimensions des feuilles ( connues en 1/1000 pouce )
		SheetSize.x = currentsheet->m_Size.x * U_PCB;
		SheetSize.y = currentsheet->m_Size.y * U_PCB;

		@@ -69,7 +66,6 @@ void WinEDA_BasePcbFrame::Genere_PS( const wxString& FullFileName, int Layer,
		paperscale = 1;
		}

		/* calcul des dimensions et centre du PCB */
		m_Pcb->ComputeBoundaryBox();
		BoardSize = m_Pcb->m_BoundaryBox.GetSize();
		BoardCenter = m_Pcb->m_BoundaryBox.Centre();
		@@ -86,7 +82,6 @@ void WinEDA_BasePcbFrame::Genere_PS( const wxString& FullFileName, int Layer,
		else
		scale = g_pcb_plot_options.Scale * paperscale;

		// Calcul du cadrage (echelle != 1 donc recadrage du trace)
		if( Center )
		{
		offset.x = BoardCenter.x - ( PaperSize.x / 2 ) / scale;

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