Minor fixes. Code cleaning.

demos/flat_hierarchy/flat_hierarchy.pro

-update=18/4/2006-09:31:05
-last_client=pcbnew
-[general]
-version=1
-RootSch=pic_programmer.sch
-BoardNm=pic_programmer.brd
-[cvpcb]
-version=1
-NetITyp=0
-NetIExt=.net
-PkgIExt=.pkg
-NetType=0
-[cvpcb/libraries]
-EquName1=devcms
-[common]
-NetDir=
-[pcbnew]
-version=1
-PadDril=400
-PadDimH=700
-PadDimV=700
-PadForm=1
-PadMask=14745599
-ViaDiam=650
-ViaDril=250
-Isol=100
-Countlayer=2
-Lpiste=250
-RouteTo=15
-RouteBo=0
-TypeVia=3
-Segm45=1
-Racc45=1
-Unite=0
-SegFill=1
-SegAffG=0
-NewAffG=1
-PadFill=1
-PadAffG=1
-PadSNum=1
-ModAffC=1
-ModAffT=1
-PcbAffT=1
-SgPcb45=1
-TxtPcbV=800
-TxtPcbH=600
-TxtModV=600
-TxtModH=600
-TxtModW=120
-HPGLnum=1
-HPGdiam=15
-HPGLSpd=20
-HPGLrec=2
-HPGLorg=0
-GERBmin=15
-VEgarde=100
-DrawLar=150
-EdgeLar=150
-TxtLar=120
-MSegLar=150
-ForPlot=1
-WpenSer=10
-UserGrX=0,01
-UserGrY=0,01
-UserGrU=1
-DivGrPc=1
-TimeOut=600
-MaxLnkS=3
-ShowRat=0
-ShowMRa=1
-[pcbnew/libraries]
-LibDir=
-LibName1=supports
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=libcms
-LibName7=display
+update=07/03/2011 07:10:44
+last_client=cvpcb
+[general]
+version=1
+RootSch=pic_programmer.sch
+BoardNm=pic_programmer.brd
+[common]
+NetDir=
+[pcbnew]
+version=1
+PadDril=400
+PadDimH=700
+PadDimV=700
+PadForm=1
+PadMask=14745599
+ViaDiam=650
+ViaDril=250
+Isol=100
+Countlayer=2
+Lpiste=250
+RouteTo=15
+RouteBo=0
+TypeVia=3
+Segm45=1
+Racc45=1
+Unite=0
+SegFill=1
+SegAffG=0
+NewAffG=1
+PadFill=1
+PadAffG=1
+PadSNum=1
+ModAffC=1
+ModAffT=1
+PcbAffT=1
+SgPcb45=1
+TxtPcbV=800
+TxtPcbH=600
+TxtModV=600
+TxtModH=600
+TxtModW=120
+HPGLnum=1
+HPGdiam=15
+HPGLSpd=20
+HPGLrec=2
+HPGLorg=0
+GERBmin=15
+VEgarde=100
+DrawLar=150
+EdgeLar=150
+TxtLar=120
+MSegLar=150
+ForPlot=1
+WpenSer=10
+UserGrX=0,01
+UserGrY=0,01
+UserGrU=1
+DivGrPc=1
+TimeOut=600
+MaxLnkS=3
+ShowRat=0
+ShowMRa=1
+[pcbnew/libraries]
+LibName1=connect
+LibName2=discret
+LibName3=pin_array
+LibName4=divers
+LibName5=libcms
+LibName6=display
+LibName7=dip_sockets
+LibDir=
+[cvpcb]
+version=1
+NetIExt=.net
+[cvpcb/libraries]
+EquName1=devcms

demos/interf_u/interf_u.pro

-update=17/02/2011 19:46:34
+update=07/03/2011 19:57:09
 version=1
 last_client=pcbnew
 [common]
@@ -55,13 +55,13 @@ LibName8=adc-dac
 LibName9=memory
 LibName10=xilinx
 LibName11=special
+LibName12=image
 [pcbnew]
 version=1
 PadDrlX=354
 PadDimH=550
 PadDimV=550
 BoardThickness=630
-SgPcb45=1
 TxtPcbV=800
 TxtPcbH=600
 TxtModV=600
@@ -71,10 +71,10 @@ VEgarde=100
 DrawLar=150
 EdgeLar=50
 TxtLar=170
-MSegLar=400
-LastNetListRead=interf_u.net
+MSegLar=150
+LastNetListRead=..\\pic_programmer\\pic_programmer.net
 [pcbnew/libraries]
-LibDir=F:\\kicad\\share\\modules\\packages3d
+LibDir=
 LibName1=connect
 LibName2=discret
 LibName3=dip_sockets

demos/sonde xilinx/sonde xilinx.drl

-M48
-;DRILL file {PCBNEW (2007-04-24)} date 2/5/2007-08:54:51
-;FORMAT={2:4 / absolute / Pouces / Format décimal}
-R,T
-VER,1
-FMAT,2
-INCH,TZ
-TCST,OFF
-ICI,OFF
-ATC,ON
-T1C0.002
-T2C0.025
-T3C0.032
-T4C0.060
-%
-M47
-G05
-M72
-T1
-X4.050Y2.650
-X4.050Y4.350
-X7.250Y4.350
-X7.250Y2.650
-T2
-X7.000Y3.200
-X4.900Y3.450
-X5.475Y3.950
-T3
-X5.400Y2.850
-X5.800Y2.850
-X4.800Y3.000
-X4.400Y3.000
-X6.400Y3.500
-X6.000Y3.500
-X5.950Y2.900
-X6.350Y2.900
-X4.800Y3.300
-X4.400Y3.300
-X4.800Y3.650
-X4.400Y3.650
-X4.800Y3.400
-X4.400Y3.400
-X4.800Y3.200
-X4.400Y3.200
-X4.800Y3.100
-X4.400Y3.100
-X6.400Y3.700
-X6.000Y3.700
-X6.400Y3.900
-X6.000Y3.900
-X6.400Y4.150
-X6.000Y4.150
-X4.800Y4.100
-X4.400Y4.100
-X5.300Y3.000
-X5.800Y3.000
-X6.000Y3.100
-X6.300Y3.100
-X5.000Y2.850
-X5.300Y2.850
-X5.550Y3.250
-X5.550Y3.350
-X5.550Y3.450
-X5.550Y3.550
-X5.550Y3.650
-X5.550Y3.750
-X5.550Y3.850
-X5.850Y3.850
-X5.850Y3.750
-X5.850Y3.650
-X5.850Y3.550
-X5.850Y3.450
-X5.850Y3.350
-X5.850Y3.250
-X5.000Y3.250
-X5.000Y3.350
-X5.000Y3.450
-X5.000Y3.550
-X5.000Y3.650
-X5.000Y3.750
-X5.000Y3.850
-X5.300Y3.850
-X5.300Y3.750
-X5.300Y3.650
-X5.300Y3.550
-X5.300Y3.450
-X5.300Y3.350
-X5.300Y3.250
-X5.550Y4.050
-X5.550Y4.250
-X5.950Y2.750
-X6.150Y2.750
-X5.700Y4.050
-X5.700Y4.250
-X5.850Y4.050
-X5.850Y4.250
-T4
-X6.700Y3.200
-X6.700Y3.400
-X6.700Y3.000
-X6.700Y3.600
-X6.700Y3.800
-X6.700Y4.000
-T0
-M30

demos/sonde xilinx/sonde xilinx.pro

-update=27/05/2010 12:18:31
+update=07/03/2011 09:04:59
 version=1
 last_client=pcbnew
 [cvpcb]
@@ -77,7 +77,6 @@ PadDrlX=320
 PadDimH=620
 PadDimV=900
 BoardThickness=630
-SgPcb45=1
 TxtPcbV=600
 TxtPcbH=600
 TxtModV=600
@@ -88,7 +87,7 @@ DrawLar=120
 EdgeLar=120
 TxtLar=120
 MSegLar=120
-LastNetListRead=
+LastNetListRead=sonde xilinx.net
 [pcbnew/libraries]
 LibDir=
 LibName1=supports

demos/test_xil_95108/carte_test.pro

-update=10/5/2004-12:26:41
-version=1
-last_client=kicad
-[pcbnew]
-version=1
-LibDir=
-Sel_Mod=1
-NetType=0
-PadDril=320
-PadDimH=550
-PadDimV=550
-PadOfDH=0
-PadOfDV=0
-PadForm=1
-PadMask=14745599
-PadAttr=0
-PadOrie=0
-ViaDiam=450
-ViaDril=250
-Isol=100
-Mlayer=536838151
-Lpiste=250
-RouteTo=15
-RouteBo=0
-TypeVia=3
-Segm45=1
-Racc45=1
-Unite=0
-SegFill=1
-SegAffG=0
-NewAffG=1
-PadFill=1
-PadAffG=1
-PadSNum=1
-ModAffC=0
-ModAffT=0
-PcbAffT=0
-SgPcb45=1
-TxtPcbV=600
-TxtPcbH=600
-GridX=500
-GridY=500
-TxtModV=500
-TxtModH=500
-TxtModW=80
-HPGLnum=1
-Pltmarg=300
-HPGdiam=15
-HPGLSpd=20
-HPGLrec=2
-HPGLorg=0
-GERBmin=15
-GERBfmt=1
-VEgarde=100
-DrawLar=120
-EdgeLar=120
-TxtLar=80
-MSegLar=120
-ForPlot=1
-WpenSer=10
-UserGrX=500
-UserGrY=500
-UserGrU=1
-DivGrPc=1
-TimeOut=600
-ShowRat=0
-ShowMRa=0
-[pcbnew/libraries]
-LibName1=supports
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=libcms
-[cvpcb]
-version=1
-NetITyp=0
-NetIExt=.net
-PkgIExt=.pkg
-NetDir=
-LibDir=
-NetType=0
-[cvpcb/libraries]
-EquName1=devcms
-[eeschema]
-version=1
-LibDir=
-NetFmt=1
-HPGLSpd=20
-HPGLDm=15
-HPGLNum=1
-offX_A4=0
-offY_A4=0
-offX_A3=0
-offY_A3=0
-offX_A2=0
-offY_A2=0
-offX_A1=0
-offY_A1=0
-offX_A0=0
-offY_A0=0
-offX_A=0
-offY_A=0
-offX_B=0
-offY_B=0
-offX_C=0
-offY_C=0
-offX_D=0
-offY_D=0
-offX_E=0
-offY_E=0
-RptD_X=0
-RptD_Y=100
-RptLab=1
-PenMin=20
-SimCmd=
-UseNetN=0
-[eeschema/Libraries]
-LibName1=power
-LibName2=device
-LibName3=linear
-LibName4=regul
-LibName5=74xx
-LibName6=cmos4000
-LibName7=adc-dac
-LibName8=memory
-LibName9=xilinx
-LibName10=special
-LibName11=analog_switches
-[general]
-version=1
-RootSch=carte_test.sch
-BoardNm=carte_test.brd
+update=07/03/2011 07:11:33
+version=1
+last_client=cvpcb
+[pcbnew]
+version=1
+LibDir=
+Sel_Mod=1
+NetType=0
+PadDril=320
+PadDimH=550
+PadDimV=550
+PadOfDH=0
+PadOfDV=0
+PadForm=1
+PadMask=14745599
+PadAttr=0
+PadOrie=0
+ViaDiam=450
+ViaDril=250
+Isol=100
+Mlayer=536838151
+Lpiste=250
+RouteTo=15
+RouteBo=0
+TypeVia=3
+Segm45=1
+Racc45=1
+Unite=0
+SegFill=1
+SegAffG=0
+NewAffG=1
+PadFill=1
+PadAffG=1
+PadSNum=1
+ModAffC=0
+ModAffT=0
+PcbAffT=0
+SgPcb45=1
+TxtPcbV=600
+TxtPcbH=600
+GridX=500
+GridY=500
+TxtModV=500
+TxtModH=500
+TxtModW=80
+HPGLnum=1
+Pltmarg=300
+HPGdiam=15
+HPGLSpd=20
+HPGLrec=2
+HPGLorg=0
+GERBmin=15
+GERBfmt=1
+VEgarde=100
+DrawLar=120
+EdgeLar=120
+TxtLar=80
+MSegLar=120
+ForPlot=1
+WpenSer=10
+UserGrX=500
+UserGrY=500
+UserGrU=1
+DivGrPc=1
+TimeOut=600
+ShowRat=0
+ShowMRa=0
+[pcbnew/libraries]
+LibName1=connect
+LibName2=discret
+LibName3=pin_array
+LibName4=divers
+LibName5=libcms
+LibName6=dip_sockets
+LibDir=
+[eeschema]
+version=1
+LibDir=
+NetFmt=1
+HPGLSpd=20
+HPGLDm=15
+HPGLNum=1
+offX_A4=0
+offY_A4=0
+offX_A3=0
+offY_A3=0
+offX_A2=0
+offY_A2=0
+offX_A1=0
+offY_A1=0
+offX_A0=0
+offY_A0=0
+offX_A=0
+offY_A=0
+offX_B=0
+offY_B=0
+offX_C=0
+offY_C=0
+offX_D=0
+offY_D=0
+offX_E=0
+offY_E=0
+RptD_X=0
+RptD_Y=100
+RptLab=1
+PenMin=20
+SimCmd=
+UseNetN=0
+[eeschema/Libraries]
+LibName1=power
+LibName2=device
+LibName3=linear
+LibName4=regul
+LibName5=74xx
+LibName6=cmos4000
+LibName7=adc-dac
+LibName8=memory
+LibName9=xilinx
+LibName10=special
+LibName11=analog_switches
+[general]
+version=1
+RootSch=carte_test.sch
+BoardNm=carte_test.brd
+[cvpcb]
+version=1
+NetIExt=.net
+[cvpcb/libraries]
+EquName1=devcms

demos/video/video.pro

-update=04/12/2010 17:34:26
-version=1
-last_client=pcbnew
-[general]
-version=1
-RootSch=video.sch
-BoardNm=video.brd
-[cvpcb]
-version=1
-NetIExt=net
-[cvpcb/libraries]
-EquName1=devcms
-[eeschema]
-version=1
-LibDir=
-NetFmt=1
-HPGLSpd=20
-HPGLDm=15
-HPGLNum=1
-offX_A4=0
-offY_A4=0
-offX_A3=0
-offY_A3=0
-offX_A2=0
-offY_A2=0
-offX_A1=0
-offY_A1=0
-offX_A0=0
-offY_A0=0
-offX_A=0
-offY_A=0
-offX_B=0
-offY_B=0
-offX_C=0
-offY_C=0
-offX_D=0
-offY_D=0
-offX_E=0
-offY_E=0
-RptD_X=0
-RptD_Y=100
-RptLab=1
-LabSize=60
-PrintMonochrome=1
-ShowSheetReferenceAndTitleBlock=1
-[eeschema/libraries]
-LibName1=power
-LibName2=device
-LibName3=transistors
-LibName4=conn
-LibName5=linear
-LibName6=regul
-LibName7=74xx
-LibName8=cmos4000
-LibName9=adc-dac
-LibName10=memory
-LibName11=xilinx
-LibName12=special
-LibName13=microcontrollers
-LibName14=dsp
-LibName15=microchip
-LibName16=analog_switches
-LibName17=motorola
-LibName18=texas
-LibName19=intel
-LibName20=audio
-LibName21=interface
-LibName22=digital-audio
-LibName23=philips
-LibName24=display
-LibName25=cypress
-LibName26=siliconi
-LibName27=opto
-LibName28=atmel
-LibName29=contrib
-LibName30=valves
-[pcbnew]
-version=1
-PadDrlX=1200
-PadDimH=1500
-PadDimV=2000
-BoardThickness=630
-SgPcb45=1
-TxtPcbV=600
-TxtPcbH=600
-TxtModV=500
-TxtModH=500
-TxtModW=80
-VEgarde=100
-DrawLar=120
-EdgeLar=80
-TxtLar=80
-MSegLar=120
-LastNetListRead=video.net
-[pcbnew/libraries]
-LibDir=
-LibName1=dip_sockets
-LibName2=connect
-LibName3=discret
-LibName4=pin_array
-LibName5=divers
-LibName6=libcms
+update=jeu. 03 mars 2011 20:58:32 CET
+version=1
+last_client=pcbnew
+[general]
+version=1
+RootSch=video.sch
+BoardNm=video.brd
+[cvpcb]
+version=1
+NetIExt=net
+[cvpcb/libraries]
+EquName1=devcms
+[eeschema]
+version=1
+LibDir=
+NetFmt=1
+HPGLSpd=20
+HPGLDm=15
+HPGLNum=1
+offX_A4=0
+offY_A4=0
+offX_A3=0
+offY_A3=0
+offX_A2=0
+offY_A2=0
+offX_A1=0
+offY_A1=0
+offX_A0=0
+offY_A0=0
+offX_A=0
+offY_A=0
+offX_B=0
+offY_B=0
+offX_C=0
+offY_C=0
+offX_D=0
+offY_D=0
+offX_E=0
+offY_E=0
+RptD_X=0
+RptD_Y=100
+RptLab=1
+LabSize=60
+PrintMonochrome=1
+ShowSheetReferenceAndTitleBlock=1
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=special
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves
+[pcbnew]
+version=1
+PadDrlX=1200
+PadDimH=1500
+PadDimV=2000
+BoardThickness=630
+TxtPcbV=600
+TxtPcbH=600
+TxtModV=500
+TxtModH=500
+TxtModW=80
+VEgarde=100
+DrawLar=120
+EdgeLar=80
+TxtLar=80
+MSegLar=120
+LastNetListRead=video.net
+[pcbnew/libraries]
+LibDir=
+LibName1=dip_sockets
+LibName2=connect
+LibName3=discret
+LibName4=pin_array
+LibName5=divers
+LibName6=libcms

eeschema/class_libentry.cpp

@@ -1032,7 +1032,7 @@ void LIB_COMPONENT::deleteAllFields()
         }
 
         // 'it' is not advanced, but should point to next in list after erase()
-        drawings.erase( it );
+        it = drawings.erase( it );
     }
 }
 

eeschema/netlist.cpp

@@ -321,6 +321,9 @@ void SCH_EDIT_FRAME::BuildNetListBase()
  */
 void FindBestNetNameForEachNet( NETLIST_OBJECT_LIST& aNetItemBuffer )
 {
+    if( aNetItemBuffer.size() == 0 )
+        return; // Should not occur: if this function is called, obviously some items exist in list
+
     NETLIST_OBJECT_LIST candidates;
     int netcode = 0;            // current netcode for tested items
     unsigned idxstart = 0;       // index of the first item of this net

include/wxPcbStruct.h

@@ -1104,7 +1104,7 @@ public:
      */
     bool         ReOrientModules( const wxString& ModuleMask, int Orient,
                                   bool include_fixe );
-    void         FixeModule( MODULE* Module, bool Fixe );
+    void         LockModule( MODULE* aModule, bool aLocked );
     void         AutoMoveModulesOnPcb( bool PlaceModulesHorsPcb );
     void         AutoPlaceModule( MODULE* Module, int place_mode, wxDC* DC );
     int          RecherchePlacementModule( MODULE* Module, wxDC* DC );

pcbnew/ar_protos.h

@@ -2,6 +2,9 @@
 /* ar-proto.h */
 /**************/
 
+
+int Propagation( PCB_EDIT_FRAME* frame );
+
 /* Initialize a value type, the cells included in the board surface of the
  * pad edge by pt_pad, with the margin reserved for isolation. */
 void Place_1_Pad_Board( BOARD * Pcb, D_PAD * pt_pad, int type, int marge,
@@ -56,17 +59,17 @@ int GetApxDist( int, int, int, int );
 int CalcDist( int, int, int ,int );
 
 /* BOARD.CPP */
-bool ComputeMatriceSize( PCB_BASE_FRAME * frame, int pas_route );
+bool ComputeMatriceSize( BOARD * aPcb, int aGridRouting );
 int Build_Work( BOARD * Pcb );
 void PlaceCells( BOARD * Pcb, int net_code, int flag = 0 );
 
-BoardCell GetCell( int, int, int );
-void SetCell( int, int, int, BoardCell );
-void OrCell( int, int, int, BoardCell );
-void XorCell( int, int, int, BoardCell );
-void AndCell( int, int, int, BoardCell );
-void AddCell( int, int, int, BoardCell );
-DistCell GetDist( int, int, int );
-void SetDist( int, int, int, DistCell );
-int GetDir( int, int, int );
-void SetDir( int, int, int, int );
+MATRIX_CELL GetCell( int aRow, int aCol, int aSide);
+void SetCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell);
+void OrCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell);
+void XorCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell);
+void AndCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell);
+void AddCell( int aRow, int aCol, int aSide, MATRIX_CELL aCell);
+DIST_CELL GetDist( int aRow, int aCol, int aSide );
+void SetDist( int aRow, int aCol, int aSide, DIST_CELL );
+int GetDir( int aRow, int aCol, int aSide );
+void SetDir( int aRow, int aCol, int aSide, int aDir);

pcbnew/automove.cpp

@@ -5,7 +5,6 @@
 #include <algorithm>
 
 #include "fctsys.h"
-#include "gr_basic.h"
 #include "common.h"
 #include "class_drawpanel.h"
 #include "confirm.h"
@@ -15,7 +14,6 @@
 #include "autorout.h"
 #include "cell.h"
 #include "pcbnew_id.h"
-#include "protos.h"
 
 #include "kicad_device_context.h"
 
@@ -74,19 +72,19 @@ void PCB_EDIT_FRAME::AutoPlace( wxCommandEvent& event )
         return;
 
     case ID_POPUP_PCB_AUTOPLACE_FIXE_MODULE:
-        FixeModule( (MODULE*) GetScreen()->GetCurItem(), TRUE );
+        LockModule( (MODULE*) GetScreen()->GetCurItem(), true );
         return;
 
     case ID_POPUP_PCB_AUTOPLACE_FREE_MODULE:
-        FixeModule( (MODULE*) GetScreen()->GetCurItem(), FALSE );
+        LockModule( (MODULE*) GetScreen()->GetCurItem(), FALSE );
         return;
 
     case ID_POPUP_PCB_AUTOPLACE_FREE_ALL_MODULES:
-        FixeModule( NULL, FALSE );
+        LockModule( NULL, FALSE );
         return;
 
     case ID_POPUP_PCB_AUTOPLACE_FIXE_ALL_MODULES:
-        FixeModule( NULL, TRUE );
+        LockModule( NULL, true );
         return;
 
     case ID_POPUP_CANCEL_CURRENT_COMMAND:
@@ -130,7 +128,7 @@ void PCB_EDIT_FRAME::AutoPlace( wxCommandEvent& event )
         break;
 
     case ID_POPUP_PCB_AUTOMOVE_NEW_MODULES:
-        AutoMoveModulesOnPcb( TRUE );
+        AutoMoveModulesOnPcb( true );
         break;
 
     case ID_POPUP_PCB_AUTOROUTE_ALL_MODULES:
@@ -154,7 +152,7 @@ void PCB_EDIT_FRAME::AutoPlace( wxCommandEvent& event )
         break;
 
     default:
-        DisplayError( this, wxT( "AutoPlace command error" ) );
+        wxMessageBox( wxT( "AutoPlace command error" ) );
         break;
     }
 
@@ -268,27 +266,27 @@ void PCB_EDIT_FRAME::AutoMoveModulesOnPcb( bool PlaceModulesHorsPcb )
 }
 
 
-/* Update (TRUE or FALSE) FIXED attribute on the module Module
- * or all the modules if Module == NULL
+/* Set or reset (true or FALSE) Lock attribute of aModule
+ * or all modules if aModule == NULL
  */
-void PCB_EDIT_FRAME::FixeModule( MODULE* Module, bool Fixe )
+void PCB_EDIT_FRAME::LockModule( MODULE* aModule, bool aLocked )
 {
-    if( Module )
+    if( aModule )
     {
-        Module->SetLocked( Fixe );
+        aModule->SetLocked( aLocked );
 
-        Module->DisplayInfo( this );
+        aModule->DisplayInfo( this );
         OnModify();
     }
     else
     {
-        Module = GetBoard()->m_Modules;
-        for( ; Module != NULL; Module = Module->Next() )
+        aModule = GetBoard()->m_Modules;
+        for( ; aModule != NULL; aModule = aModule->Next() )
         {
             if( WildCompareString( ModulesMaskSelection,
-                                   Module->m_Reference->m_Text ) )
+                                   aModule->m_Reference->m_Text ) )
             {
-                Module->SetLocked( Fixe );
+                aModule->SetLocked( aLocked );
                 OnModify();
             }
         }

pcbnew/autoplac.cpp

@@ -3,14 +3,12 @@
 /*******************************************/
 
 #include "fctsys.h"
-#include "gr_basic.h"
 #include "common.h"
 #include "class_drawpanel.h"
 #include "confirm.h"
 #include "pcbnew.h"
 #include "wxPcbStruct.h"
 #include "autorout.h"
-#include "zones.h"
 #include "cell.h"
 #include "class_board_design_settings.h"
 #include "colors_selection.h"
@@ -313,14 +311,14 @@ void PCB_EDIT_FRAME::DrawInfoPlace( wxDC* DC )
 {
     int       color, ii, jj;
     int       ox, oy;
-    BoardCell top_state, bottom_state;
+    MATRIX_CELL top_state, bottom_state;
 
     GRSetDrawMode( DC, GR_COPY );
-    for( ii = 0; ii < Nrows; ii++ )
+    for( ii = 0; ii < Board.m_Nrows; ii++ )
     {
         oy = GetBoard()->m_BoundaryBox.m_Pos.y + ( ii * g_GridRoutingSize );
 
-        for( jj = 0; jj < Ncols; jj++ )
+        for( jj = 0; jj < Board.m_Ncols; jj++ )
         {
             ox = GetBoard()->m_BoundaryBox.m_Pos.x +
                  (jj * g_GridRoutingSize);
@@ -393,8 +391,10 @@ int PCB_EDIT_FRAME::GenPlaceBoard()
                                          g_GridRoutingSize;
     /* The boundary box must have its end point on placing grid: */
     wxPoint end = GetBoard()->m_BoundaryBox.GetEnd();
-    end.x -= end.x % g_GridRoutingSize; end.x += g_GridRoutingSize;
-    end.y -= end.y % g_GridRoutingSize; end.y += g_GridRoutingSize;
+    end.x -= end.x % g_GridRoutingSize;
+    end.x += g_GridRoutingSize;
+    end.y -= end.y % g_GridRoutingSize;
+    end.y += g_GridRoutingSize;
     GetBoard()->m_BoundaryBox.SetEnd( end );
 
     Nrows = GetBoard()->m_BoundaryBox.GetHeight() / g_GridRoutingSize;
@@ -479,7 +479,7 @@ int PCB_EDIT_FRAME::GenPlaceBoard()
     /* Initialize top layer. */
     if( Board.m_BoardSide[TOP] )
         memcpy( Board.m_BoardSide[TOP], Board.m_BoardSide[BOTTOM],
-                NbCells * sizeof(BoardCell) );
+                NbCells * sizeof(MATRIX_CELL) );
 
     return 1;
 }
@@ -921,7 +921,7 @@ static void TracePenaliteRectangle( BOARD* Pcb,
     int      row, col;
     int      row_min, row_max, col_min, col_max, pmarge;
     int      trace = 0;
-    DistCell data, LocalPenalite;
+    DIST_CELL data, LocalPenalite;
     int      lgain, cgain;
 
     if( masque_layer & g_TabOneLayerMask[Route_Layer_BOTTOM] )

pcbnew/autorout.cpp

@@ -3,10 +3,8 @@
 /***************************************/
 
 #include "fctsys.h"
-#include "gr_basic.h"
 #include "common.h"
 #include "class_drawpanel.h"
-#include "confirm.h"
 #include "pcbnew.h"
 #include "wxPcbStruct.h"
 #include "autorout.h"
@@ -14,8 +12,6 @@
 #include "zones.h"
 #include "class_board_design_settings.h"
 
-#include "protos.h"
-
 
 int E_scale;         /* Scaling factor of distance tables. */
 int Nb_Sides;        /* Number of layer for autorouting (0 or 1) */
@@ -27,7 +23,7 @@ int ClosNodes;       /* total number of nodes closed */
 int MoveNodes;       /* total number of nodes moved */
 int MaxNodes;        /* maximum number of nodes opened at one time */
 
-BOARDHEAD Board;     /* 2-sided board */
+MATRIX_ROUTING_HEAD Board;     /* 2-sided board */
 
 
 /* init board, route traces*/
@@ -41,8 +37,8 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
 
     if( GetBoard()->GetCopperLayerCount() > 1 )
     {
-        Route_Layer_TOP    = ((PCB_SCREEN*)GetScreen())->m_Route_Layer_TOP;
-        Route_Layer_BOTTOM = ((PCB_SCREEN*)GetScreen())->m_Route_Layer_BOTTOM;
+        Route_Layer_TOP    = GetScreen()->m_Route_Layer_TOP;
+        Route_Layer_BOTTOM = GetScreen()->m_Route_Layer_BOTTOM;
     }
     else
     {
@@ -68,7 +64,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
         }
         if( autoroute_net_code <= 0 )
         {
-            DisplayError( this, _( "Net not selected" ) ); return;
+            wxMessageBox( _( "Net not selected" ) ); return;
         }
         break;
 
@@ -76,7 +72,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
         Module = (MODULE*) GetScreen()->GetCurItem();
         if( (Module == NULL) || (Module->Type() != TYPE_MODULE) )
         {
-            DisplayError( this, _( "Module not selected" ) );
+            wxMessageBox( _( "Module not selected" ) );
             return;
         }
         break;
@@ -85,14 +81,14 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
         Pad = (D_PAD*) GetScreen()->GetCurItem();
         if( (Pad == NULL)  || (Pad->Type() != TYPE_PAD) )
         {
-            DisplayError( this, _( "Pad not selected" ) );
+            wxMessageBox( _( "Pad not selected" ) );
             return;
         }
         break;
     }
 
     if( (GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK ) == 0 )
-        Compile_Ratsnest( DC, TRUE );
+        Compile_Ratsnest( DC, true );
 
     /* Set the flag on the ratsnest to CH_ROUTE_REQ. */
     for( unsigned ii = 0; ii < GetBoard()->GetRatsnestsCount(); ii++ )
@@ -142,7 +138,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
         E_scale = 1;
 
     /* Calculated ncol and nrow, matrix size for routing. */
-    ComputeMatriceSize( this, g_GridRoutingSize );
+    ComputeMatriceSize( GetBoard(), g_GridRoutingSize );
 
     MsgPanel->EraseMsgBox();
 
@@ -153,7 +149,7 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
 
     if( Board.InitBoard() < 0 )
     {
-        DisplayError( this, _( "No memory for autorouting" ) );
+        wxMessageBox( _( "No memory for autorouting" ) );
         Board.UnInitBoard();  /* Free memory. */
         return;
     }
@@ -181,14 +177,14 @@ void PCB_EDIT_FRAME::Autoroute( wxDC* DC, int mode )
 }
 
 
-/* Clear the flag has CH_NOROUTABLE which is set to 1 by Solve()
- * When a ratsnets has not been routed.
- * If this flag is 1 it is not reroute
+/* Clear the flag CH_NOROUTABLE which is set to 1 by Solve(),
+ * when a track was not routed.
+ * (If this flag is 1 the corresponding track it is not rerouted)
  */
 void PCB_EDIT_FRAME::Reset_Noroutable( wxDC* DC )
 {
     if( ( GetBoard()->m_Status_Pcb & LISTE_RATSNEST_ITEM_OK )== 0 )
-        Compile_Ratsnest( DC, TRUE );
+        Compile_Ratsnest( DC, true );
 
     for( unsigned ii = 0; ii < GetBoard()->GetRatsnestsCount(); ii++ )
     {
@@ -197,7 +193,7 @@ void PCB_EDIT_FRAME::Reset_Noroutable( wxDC* DC )
 }
 
 
-/* Function DEBUG: displays filling cells TOP and BOTTOM */
+/* DEBUG Function: displays the routing matrix */
 void DisplayBoard( EDA_DRAW_PANEL* panel, wxDC* DC )
 {
     int row, col, i, j;

pcbnew/autorout.h

@@ -31,6 +31,8 @@ extern int E_scale;     /* Scaling factor of distance tables. */
 #define ONE_SIDE  0
 #define TWO_SIDES 1
 
+#define MAX_SIDES_COUNT 2
+
 extern int Nb_Sides;    /* Number of layers for autorouting (0 or 1) */
 
 #define FORCE_PADS 1  /* Force placement of pads for any Netcode */
@@ -46,32 +48,37 @@ extern int ClosNodes;   /* total number of nodes closed */
 extern int MoveNodes;   /* total number of nodes moved */
 extern int MaxNodes;    /* maximum number of nodes opened at one time */
 
+/* Grid size for automatic routing */
+extern int g_GridRoutingSize;
+
 /* Structures useful to the generation of board as bitmap. */
 
-typedef char BoardCell;
-typedef int  DistCell;
+typedef char MATRIX_CELL;
+typedef int  DIST_CELL;
+typedef char  DIR_CELL;
 
-class BOARDHEAD  /* header of blocks of BoardCell */
+class MATRIX_ROUTING_HEAD  /* header of blocks of MATRIX_CELL */
 {
 public:
-    BoardCell* m_BoardSide[2];  /* ptr to block of memory: 2-sided board */
-    DistCell*  m_DistSide[2];   /* ptr to block of memory: path distance to
-                                 * cells */
-    char*      m_DirSide[2];    /* header of blocks of chars:pointers back to
-                                 * source */
+    MATRIX_CELL* m_BoardSide[MAX_SIDES_COUNT];  /* ptr to block of memory: 2-sided board */
+    DIST_CELL*   m_DistSide[MAX_SIDES_COUNT];   /* ptr to block of memory: path distance to
+                                                * cells */
+    DIR_CELL*   m_DirSide[MAX_SIDES_COUNT];    /* header of blocks of chars:pointers back to
+                                                * source */
     bool       m_InitBoardDone;
     int        m_Layers;
+    int        m_GridRouting;                   // Size of grid for autoplace/autoroute
     int        m_Nrows, m_Ncols;
     int        m_MemSize;
 
 public:
-    BOARDHEAD();
-    ~BOARDHEAD();
+    MATRIX_ROUTING_HEAD();
+    ~MATRIX_ROUTING_HEAD();
     int     InitBoard();
     void    UnInitBoard();
 };
 
-extern BOARDHEAD Board;        /* 2-sided board */
+extern MATRIX_ROUTING_HEAD Board;        /* 2-sided board */
 
 
 /* Constants used to trace the cells on the BOARD */

pcbnew/dist.cpp

@@ -3,29 +3,19 @@
 	/***************************************************************/
 
 #include "fctsys.h"
-#include "gr_basic.h"
 
 #include "common.h"
 #include "pcbnew.h"
 #include "autorout.h"
 #include "cell.h"
 
-/* Routines exportees : */
-int GetApxDist( int, int, int, int );
-int CalcDist( int, int, int );
-
-/* Les tables de distances et penalites sont etablies sur la base du pas 
+/* Les tables de distances et penalites sont etablies sur la base du pas
 de routage de 50 unites(le pas entre les cellules est 50 unites)
 La distance vraie est calculee par un facteur d'echelle
 */
 
-
-	/************************************************/
-	/* int GetApxDist(int r1,int c1,int r2,int c2 ) */
-	/************************************************/
-
- /* calculate approximate distance */
-
+ /* calculate approximate distance
+ */
 int GetApxDist(int r1,int c1,int r2,int c2 )
 {
 int d1, d2; /* row and column deltas */
@@ -35,7 +25,7 @@ int d1, d2; /* row and column deltas */
 	if ((d2 = c1-c2) < 0) /* get absolute column delta */
 		d2 = -d2;
 
-return( (d1+d2) * 50 * E_scale);
+    return( (d1+d2) * 50 * E_scale);
 
 	if (!d1) /* in same row? */
 		return( (d2*50*E_scale) );	 /* 50 mils per cell */

pcbnew/export_vrml.cpp

@@ -1037,10 +1037,11 @@ static void export_vrml_module( BOARD* aPcb, MODULE* aModule,
 
         fname.Replace(wxT("\\"), wxT("/" ) );
         wxString source_fname = fname;
-        if( aExport3DFiles )
+        if( aExport3DFiles )    // Change dangerous characters in filenames
         {
             fname.Replace(wxT("/"), wxT("_" ) );
             fname.Replace(wxT(":_"), wxT("_" ) );
+            fname.Replace(wxT(" "), wxT("_" ) );
             fname = a3D_Subdir + wxT("/") + fname;
             if( !wxFileExists( fname ) )
                 wxCopyFile( source_fname, fname );

pcbnew/graphpcb.cpp

@@ -3,12 +3,10 @@
 /****************************************************/
 
 #include "fctsys.h"
-#include "gr_basic.h"
 
 #include "common.h"
 #include "pcbnew.h"
 #include "autorout.h"
-#include "zones.h"
 #include "trigo.h"
 #include "cell.h"
 
@@ -42,7 +40,7 @@ static void DrawSegmentQcq( int ux0,
 static void TraceFilledCercle( BOARD* Pcb,
                                int    cx,
                                int    cy,
-                               int    rayon,
+                               int    radius,
                                int    masque_layer,
                                int    color,
                                int    op_logique );
@@ -151,7 +149,7 @@ void Place_1_Pad_Board( BOARD* Pcb,
 void TraceFilledCercle( BOARD* Pcb,
                         int    cx,
                         int    cy,
-                        int    rayon,
+                        int    radius,
                         int    masque_layer,
                         int    color,
                         int    op_logique )
@@ -162,7 +160,7 @@ void TraceFilledCercle( BOARD* Pcb,
     int   trace = 0;
     float fdistmin, fdistx, fdisty;
 
-    void  (* WriteCell)( int, int, int, BoardCell );
+    void  (* WriteCell)( int, int, int, MATRIX_CELL );
     int   tstwrite = 0;
     int   distmin;
 
@@ -208,13 +206,13 @@ void TraceFilledCercle( BOARD* Pcb,
     cx -= Pcb->m_BoundaryBox.m_Pos.x;
     cy -= Pcb->m_BoundaryBox.m_Pos.y;
 
-    distmin = rayon;
+    distmin = radius;
 
     /* Calculate the bounding rectangle of the circle. */
-    ux0 = cx - rayon;
-    uy0 = cy - rayon;
-    ux1 = cx + rayon;
-    uy1 = cy + rayon;
+    ux0 = cx - radius;
+    uy0 = cy - radius;
+    ux1 = cx + radius;
+    uy1 = cy + radius;
 
     /* Calculate limit coordinates of cells belonging to the rectangle. */
     row_max = uy1 / g_GridRoutingSize;
@@ -384,7 +382,7 @@ void TraceLignePcb( int x0,
     int  dx, dy, lim;
     int  cumul, inc, il, delta;
 
-    void (* WriteCell)( int, int, int, BoardCell );
+    void (* WriteCell)( int, int, int, MATRIX_CELL );
 
     switch( op_logique )
     {
@@ -537,7 +535,7 @@ void TraceFilledRectangle( BOARD* Pcb, int ux0, int uy0, int ux1, int uy1,
     int  row_min, row_max, col_min, col_max;
     int  trace = 0;
 
-    void (* WriteCell)( int, int, int, BoardCell );
+    void (* WriteCell)( int, int, int, MATRIX_CELL );
 
     if( masque_layer & g_TabOneLayerMask[Route_Layer_BOTTOM] )
         trace = 1;     /* Trace on BOTTOM */
@@ -623,12 +621,12 @@ void TraceFilledRectangle( BOARD* Pcb, int ux0, int uy0, int ux1, int uy1,
 {
     int  row, col;
     int  cx, cy;    /* Center of rectangle */
-    int  rayon;     /* Radius of the circle */
+    int  radius;     /* Radius of the circle */
     int  row_min, row_max, col_min, col_max;
     int  rotrow, rotcol;
     int  trace = 0;
 
-    void (* WriteCell)( int, int, int, BoardCell );
+    void (* WriteCell)( int, int, int, MATRIX_CELL );
 
     if( masque_layer & g_TabOneLayerMask[Route_Layer_BOTTOM] )
         trace = 1;     /* Trace on BOTTOM */
@@ -671,16 +669,16 @@ void TraceFilledRectangle( BOARD* Pcb, int ux0, int uy0, int ux1, int uy1,
 
     cx    = (ux0 + ux1) / 2;
     cy    = (uy0 + uy1) / 2;
-    rayon = (int) sqrt( (double) ( cx - ux0 ) * ( cx - ux0 )
+    radius = (int) sqrt( (double) ( cx - ux0 ) * ( cx - ux0 )
                        + (double) ( cy - uy0 ) * ( cy - uy0 ) );
 
     /* Calculating coordinate limits belonging to the rectangle. */
-    row_max = ( cy + rayon ) / g_GridRoutingSize;
-    col_max = ( cx + rayon ) / g_GridRoutingSize;
-    row_min = ( cy - rayon ) / g_GridRoutingSize;
+    row_max = ( cy + radius ) / g_GridRoutingSize;
+    col_max = ( cx + radius ) / g_GridRoutingSize;
+    row_min = ( cy - radius ) / g_GridRoutingSize;
     if( uy0 > row_min * g_GridRoutingSize )
         row_min++;
-    col_min = ( cx - rayon ) / g_GridRoutingSize;
+    col_min = ( cx - radius ) / g_GridRoutingSize;
     if( ux0 > col_min * g_GridRoutingSize )
         col_min++;
 
@@ -730,7 +728,7 @@ void DrawSegmentQcq( int ux0, int uy0, int ux1, int uy1, int lg, int layer,
     int  row_max, col_max, row_min, col_min;
     int  demi_pas;
 
-    void (* WriteCell)( int, int, int, BoardCell );
+    void (* WriteCell)( int, int, int, MATRIX_CELL );
     int  angle;
     int  cx, cy, dx, dy;
 
@@ -859,19 +857,19 @@ void DrawSegmentQcq( int ux0, int uy0, int ux1, int uy1, int lg, int layer,
 void TraceCercle( int ux0, int uy0, int ux1, int uy1, int lg, int layer,
                   int color, int op_logique )
 {
-    int rayon, nb_segm;
+    int radius, nb_segm;
     int x0, y0,             // Starting point of the current segment trace.
         x1, y1;             // End point.
     int ii;
     int angle;
 
-    rayon = (int) hypot( (double) (ux1 - ux0), (double) (uy1 - uy0) );
+    radius = (int) hypot( (double) (ux1 - ux0), (double) (uy1 - uy0) );
 
-    x0 = x1 = rayon;
+    x0 = x1 = radius;
     y0 = y1 = 0;
     if( lg < 1 )
         lg = 1;
-    nb_segm = ( 2 * rayon ) / lg;
+    nb_segm = ( 2 * radius ) / lg;
     if( nb_segm < 5 )
         nb_segm = 5;
     if( nb_segm > 100 )
@@ -879,42 +877,42 @@ void TraceCercle( int ux0, int uy0, int ux1, int uy1, int lg, int layer,
     for( ii = 1; ii < nb_segm; ii++ )
     {
         angle = (3600 * ii) / nb_segm;
-        x1    = (int) ( rayon * fcosinus[angle] );
-        y1    = (int) ( rayon * fsinus[angle] );
+        x1    = (int) ( radius * fcosinus[angle] );
+        y1    = (int) ( radius * fsinus[angle] );
         DrawSegmentQcq( x0 + ux0, y0 + uy0, x1 + ux0, y1 + uy0, lg,
                         layer, color, op_logique );
         x0 = x1;
         y0 = y1;
     }
 
-    DrawSegmentQcq( x1 + ux0, y1 + uy0, ux0 + rayon, uy0, lg, layer,
+    DrawSegmentQcq( x1 + ux0, y1 + uy0, ux0 + radius, uy0, lg, layer,
                     color, op_logique );
 }
 
 
-/* Fills all cells BOARD contained in the arc of "L" angle
+/* Fills all cells contained in arc with color , using op_logique.
  * half-width lg ux center, starting in ux y0, y1 is set to color.
- * coord in PCB units (0.1 million) relating to the origin
- * Pt_pcb->m_PcbBox.m_Xmin, Y's board.
+ * coord in PCB units (0.1 mil) relating to the origin
+ * of the board.
  */
 void TraceArc( int ux0, int uy0, int ux1, int uy1, int ArcAngle, int lg,
                int layer, int color, int op_logique )
 {
-    int rayon, nb_segm;
+    int radius, nb_segm;
     int x0, y0,             // Starting point of the current segment trace
         x1, y1;             // End point
     int ii;
     int angle, StAngle;
 
 
-    rayon = (int) hypot( (double) (ux1 - ux0), (double) (uy1 - uy0) );
+    radius = (int) hypot( (double) (ux1 - ux0), (double) (uy1 - uy0) );
 
     x0 = ux1 - ux0;
     y0 = uy1 - uy0;
     StAngle = ArcTangente( uy1 - uy0, ux1 - ux0 );
     if( lg < 1 )
         lg = 1;
-    nb_segm = ( 2 * rayon ) / lg;
+    nb_segm = ( 2 * radius ) / lg;
     nb_segm = ( nb_segm * abs( ArcAngle ) ) / 3600;
     if( nb_segm < 5 )
         nb_segm = 5;
@@ -932,14 +930,14 @@ void TraceArc( int ux0, int uy0, int ux1, int uy1, int ArcAngle, int lg,
         while( angle < 0 )
             angle += 3600;
 
-        x1 = (int) ( rayon * fcosinus[angle] );
-        y1 = (int) ( rayon * fsinus[angle] );
+        x1 = (int) ( radius * fcosinus[angle] );
+        y1 = (int) ( radius * fsinus[angle] );
         DrawSegmentQcq( x0 + ux0, y0 + uy0, x1 + ux0, y1 + uy0, lg, layer,
                         color, op_logique );
         x0 = x1;
         y0 = y1;
     }
 
-//	  DrawSegmentQcq(x1+ux0,y1+uy0, ux0+rayon, uy0,lg,layer, color,
+//	  DrawSegmentQcq(x1+ux0,y1+uy0, ux0+radius, uy0,lg,layer, color,
 // op_logique);
 }

pcbnew/ioascii.cpp

@@ -10,6 +10,7 @@
 
 #include "pcbnew.h"
 #include "wxPcbStruct.h"
+#include "autorout.h"
 #include "class_board_design_settings.h"
 
 #ifdef PCBNEW

pcbnew/protos.h

@@ -249,12 +249,6 @@ int  ReturnEndsTrack( TRACK* RefTrack, int NbSegm, TRACK** StartTrack, TRACK** E
 void ListSetState( EDA_ITEM* Start, int Nbitem, int State, int onoff );
 
 
-/************/
-/* ZONES.CPP */
-/************/
-int Propagation( PCB_EDIT_FRAME* frame );
-
-
 /***************/
 /* DUPLTRAC.CPP */
 /***************/

pcbnew/queue.cpp

@@ -3,14 +3,11 @@
 /*************/
 
 #include "fctsys.h"
-#include "gr_basic.h"
 
 #include "common.h"
 #include "pcbnew.h"
 #include "autorout.h"
 
-#include "protos.h"
-
 #include "cell.h"
 
 struct PcbQueue /* search queue structure */

pcbnew/solve.cpp

@@ -3,7 +3,6 @@
 /*************/
 
 #include "fctsys.h"
-#include "gr_basic.h"
 #include "common.h"
 #include "class_drawpanel.h"
 #include "confirm.h"
@@ -12,7 +11,6 @@
 #include "wxPcbStruct.h"
 #include "class_board_design_settings.h"
 #include "autorout.h"
-#include "zones.h"
 #include "protos.h"
 
 #include "cell.h"
@@ -237,7 +235,7 @@ int PCB_EDIT_FRAME::Solve( wxDC* DC, int two_sides )
     wxString      msg;
 
     DrawPanel->m_AbortRequest = FALSE;
-    DrawPanel->m_AbortEnable  = TRUE;
+    DrawPanel->m_AbortEnable  = true;
 
     s_Clearance = GetBoard()->m_NetClasses.GetDefault()->GetClearance();
 
@@ -263,7 +261,7 @@ int PCB_EDIT_FRAME::Solve( wxDC* DC, int two_sides )
             if( IsOK( this, _( "Abort routing?" ) ) )
             {
                 success = STOP_FROM_ESC;
-                stop    = TRUE;
+                stop    = true;
                 break;
             }
             else
@@ -319,11 +317,11 @@ int PCB_EDIT_FRAME::Solve( wxDC* DC, int two_sides )
             break;
 
         case STOP_FROM_ESC:
-            stop = TRUE;
+            stop = true;
             break;
 
         case ERR_MEMORY:
-            stop = TRUE;
+            stop = true;
             break;
 
         default:
@@ -362,7 +360,7 @@ int PCB_EDIT_FRAME::Solve( wxDC* DC, int two_sides )
  *
  * Returns:
  * SUCCESS if routed
- * TRIVIAL_SUCCESS if pads connected by overlay (no track has learned)
+ * TRIVIAL_SUCCESS if pads are connected by overlay (no track needed)
  * If failure NOSUCCESS
  * Escape STOP_FROM_ESC if demand
  * ERR_MEMORY if memory allocation failed.
@@ -406,7 +404,7 @@ static int Autoroute_One_Track( PCB_EDIT_FRAME* pcbframe,
     via_marge = s_Clearance + ( pcbframe->GetBoard()->GetCurrentViaSize() / 2 );
 
     /* clear direction flags */
-    i = Nrows * Ncols * sizeof(char);
+    i = Nrows * Ncols * sizeof(DIR_CELL);
     memset( Board.m_DirSide[TOP], FROM_NOWHERE, i );
     memset( Board.m_DirSide[BOTTOM], FROM_NOWHERE, i );
 

pcbnew/work.cpp

@@ -3,15 +3,12 @@
 /************************/
 
 #include "fctsys.h"
-#include "gr_basic.h"
 
 #include "common.h"
 #include "pcbnew.h"
 #include "autorout.h"
 #include "cell.h"
 
-#include "protos.h"
-
 
 struct CWORK /* a unit of work is a hole-pair to connect */
 {

pcbnew/zones.h

@@ -35,8 +35,6 @@ enum {                          // How pads are covered by copper in zone
 /* variables used in zone dialogs and functions */
 /************************************************/
 
-/* parametre grid size for automatic routing */
-extern int g_GridRoutingSize;
 extern bool g_Zone_45_Only;
 
 // Default setting used when creating a new zone