Loading common/base_struct.cpp +0 −8 Original line number Original line Diff line number Diff line Loading @@ -222,14 +222,6 @@ EDA_ITEM& EDA_ITEM::operator=( const EDA_ITEM& aItem ) } } void EDA_ITEM::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const throw( IO_ERROR ) { wxFAIL_MSG( wxString::Format( wxT( "Format method not defined for item type %s." ), GetChars( GetClass() ) ) ); } #if defined(DEBUG) #if defined(DEBUG) // A function that should have been in wxWidgets // A function that should have been in wxWidgets Loading common/eda_text.cpp +0 −10 Original line number Original line Diff line number Diff line Loading @@ -346,14 +346,6 @@ bool EDA_TEXT::IsDefaultFormatting() const void EDA_TEXT::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const void EDA_TEXT::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const throw( IO_ERROR ) throw( IO_ERROR ) { { aFormatter->Print( aNestLevel, "(text %s (at %s", aFormatter->Quotew( m_Text ).c_str(), FMT_IU( m_Pos ).c_str() ); if( m_Orient != 0.0 ) aFormatter->Print( 0, " %s", FMT_ANGLE( m_Orient ).c_str() ); aFormatter->Print( 0, ")\n" ); if( !IsDefaultFormatting() ) if( !IsDefaultFormatting() ) { { aFormatter->Print( aNestLevel+1, "(effects\n" ); aFormatter->Print( aNestLevel+1, "(effects\n" ); Loading Loading @@ -400,6 +392,4 @@ void EDA_TEXT::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControl aFormatter->Print( aNestLevel+1, ")\n" ); aFormatter->Print( aNestLevel+1, ")\n" ); } } aFormatter->Print( aNestLevel, ")\n" ); } } common/wildcards_and_files_ext.cpp +1 −1 Original line number Original line Diff line number Diff line Loading @@ -55,7 +55,7 @@ const wxString SchematicFileWildcard( _( "KiCad schematic files (*.sch)|*.sch" ) const wxString NetlistFileWildcard( _( "KiCad netlist files (*.net)|*.net" ) ); const wxString NetlistFileWildcard( _( "KiCad netlist files (*.net)|*.net" ) ); const wxString GerberFileWildcard( _( "Gerber files (*.pho)|*.pho" ) ); const wxString GerberFileWildcard( _( "Gerber files (*.pho)|*.pho" ) ); const wxString LegacyPcbFileWildcard( _( "KiCad printed circuit board files (*.brd)|*.brd" ) ); const wxString LegacyPcbFileWildcard( _( "KiCad printed circuit board files (*.brd)|*.brd" ) ); const wxString PcbFileWildcard( _( "KiCad s-expr printed circuit board files (*.kicad_brd)|*.kicad_brd" ) ); const wxString PcbFileWildcard( _( "KiCad s-expr printed circuit board files (*.kicad_pcb)|*.kicad_pcb" ) ); const wxString FootprintLibFileWildcard( _( "KiCad footprint library file (*.mod)|*.mod" ) ); const wxString FootprintLibFileWildcard( _( "KiCad footprint library file (*.mod)|*.mod" ) ); const wxString PdfFileWildcard( _( "Portable document format files (*.pdf)|*.pdf" ) ); const wxString PdfFileWildcard( _( "Portable document format files (*.pdf)|*.pdf" ) ); const wxString MacrosFileWildcard( _( "KiCad recorded macros (*.mcr)|*.mcr" ) ); const wxString MacrosFileWildcard( _( "KiCad recorded macros (*.mcr)|*.mcr" ) ); Loading include/base_struct.h +0 −12 Original line number Original line Diff line number Diff line Loading @@ -729,18 +729,6 @@ public: */ */ virtual EDA_ITEM& operator=( const EDA_ITEM& aItem ); virtual EDA_ITEM& operator=( const EDA_ITEM& aItem ); /** * Function Format * outputs the object to \a aFormatter in s-expression form. * * @param aFormatter The #OUTPUTFORMATTER object to write to. * @param aNestLevel The indentation next level. * @param aControlBits The control bit definition for object specific formatting. * @throw IO_ERROR on write error. */ virtual void Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const throw( IO_ERROR ); #if defined(DEBUG) #if defined(DEBUG) /** /** Loading pcbnew/class_board.cpp +0 −195 Original line number Original line Diff line number Diff line Loading @@ -2142,201 +2142,6 @@ TRACK* BOARD::CreateLockPoint( wxPoint& aPosition, TRACK* aSegment, PICKED_ITEMS } } void BOARD::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const throw( IO_ERROR ) { aFormatter->Print( aNestLevel, "(general\n" ); aFormatter->Print( aNestLevel+1, "(links %d)\n", GetRatsnestsCount() ); aFormatter->Print( aNestLevel+1, "(no_connects %d)\n", m_NbNoconnect ); // Write Bounding box info aFormatter->Print( aNestLevel+1, "(area %s %s %s %s)\n", FMT_IU( m_BoundingBox.GetX() ).c_str(), FMT_IU( m_BoundingBox.GetY() ).c_str(), FMT_IU( m_BoundingBox.GetRight() ).c_str(), FMT_IU( m_BoundingBox.GetBottom() ).c_str() ); aFormatter->Print( aNestLevel+1, "(thickness %s)\n", FMT_IU( GetDesignSettings().m_BoardThickness ).c_str() ); aFormatter->Print( aNestLevel+1, "(drawings %d)\n", m_Drawings.GetCount() ); aFormatter->Print( aNestLevel+1, "(tracks %d)\n", GetNumSegmTrack() ); aFormatter->Print( aNestLevel+1, "(zones %d)\n", GetNumSegmZone() ); aFormatter->Print( aNestLevel+1, "(modules %d)\n", m_Modules.GetCount() ); aFormatter->Print( aNestLevel+1, "(nets %d)\n", GetNetCount() ); aFormatter->Print( aNestLevel, ")\n\n" ); m_paper.Format( aFormatter, aNestLevel, aControlBits ); m_titles.Format( aFormatter, aNestLevel, aControlBits ); // Layers. aFormatter->Print( aNestLevel, "(layers %d %08X", GetCopperLayerCount(), GetEnabledLayers() ); if( GetEnabledLayers() != GetVisibleLayers() ) aFormatter->Print( 0, " %08X", GetVisibleLayers() ); aFormatter->Print( 0, "\n" ); unsigned layerMask = ALL_CU_LAYERS & GetEnabledLayers(); for( int layer = 0; layerMask; ++layer, layerMask >>= 1 ) { if( layerMask & 1 ) { aFormatter->Print( aNestLevel+1, "(layer%d %s %s)\n", layer, TO_UTF8( GetLayerName( layer ) ), LAYER::ShowType( GetLayerType( layer ) ) ); } } aFormatter->Print( aNestLevel, ")\n\n" ); // Setup aFormatter->Print( aNestLevel, "(setup\n" ); // Save current default track width, for compatibility with older Pcbnew version; aFormatter->Print( aNestLevel+1, "(last_trace_width %s)\n", FMT_IU( m_TrackWidthList[m_TrackWidthSelector] ).c_str() ); // Save custom tracks width list (the first is not saved here: this is the netclass value for( unsigned ii = 1; ii < m_TrackWidthList.size(); ii++ ) aFormatter->Print( aNestLevel+1, "(user_trace_width%d %s)\n", ii+1, FMT_IU( m_TrackWidthList[ii] ).c_str() ); aFormatter->Print( aNestLevel+1, "(trace_clearance %s)\n", FMT_IU( m_NetClasses.GetDefault()->GetClearance() ).c_str() ); // ZONE_SETTINGS aFormatter->Print( aNestLevel+1, "(zone_clearance %s)\n", FMT_IU( GetZoneSettings().m_ZoneClearance ).c_str() ); aFormatter->Print( aNestLevel+1, "(zone_45_only %d)\n", GetZoneSettings().m_Zone_45_Only ); aFormatter->Print( aNestLevel+1, "(trace_min %s)\n", FMT_IU( GetDesignSettings().m_TrackMinWidth ).c_str() ); aFormatter->Print( aNestLevel+1, "(segment_width %s)\n", FMT_IU( GetDesignSettings().m_DrawSegmentWidth ).c_str() ); aFormatter->Print( aNestLevel+1, "(edge_width %s)\n", FMT_IU( GetDesignSettings().m_EdgeSegmentWidth ).c_str() ); // Save current default via size, for compatibility with older Pcbnew version; aFormatter->Print( aNestLevel+1, "(via_size %s)\n", FMT_IU( m_NetClasses.GetDefault()->GetViaDiameter() ).c_str() ); aFormatter->Print( aNestLevel+1, "(via_drill %s)\n", FMT_IU( m_NetClasses.GetDefault()->GetViaDrill() ).c_str() ); aFormatter->Print( aNestLevel+1, "(via_min_size %s)\n", FMT_IU( GetDesignSettings().m_ViasMinSize ).c_str() ); aFormatter->Print( aNestLevel+1, "(via_min_drill %s)\n", FMT_IU( GetDesignSettings().m_ViasMinDrill ).c_str() ); // Save custom vias diameters list (the first is not saved here: this is // the netclass value for( unsigned ii = 1; ii < m_ViasDimensionsList.size(); ii++ ) aFormatter->Print( aNestLevel+1, "(user_via%d %s %s)\n", ii, FMT_IU( m_ViasDimensionsList[ii].m_Diameter ).c_str(), FMT_IU( m_ViasDimensionsList[ii].m_Drill ).c_str() ); // for old versions compatibility: aFormatter->Print( aNestLevel+1, "(uvia_size %s)\n", FMT_IU( m_NetClasses.GetDefault()->GetuViaDiameter() ).c_str() ); aFormatter->Print( aNestLevel+1, "(uvia_drill %s)\n", FMT_IU( m_NetClasses.GetDefault()->GetuViaDrill() ).c_str() ); aFormatter->Print( aNestLevel+1, "(uvias_allow %s)\n", FMT_IU( GetDesignSettings().m_MicroViasAllowed ).c_str() ); aFormatter->Print( aNestLevel+1, "(uvia_min_size %s)\n", FMT_IU( GetDesignSettings().m_MicroViasMinSize ).c_str() ); aFormatter->Print( aNestLevel+1, "(uvia_min_drill %s)\n", FMT_IU( GetDesignSettings().m_MicroViasMinDrill ).c_str() ); aFormatter->Print( aNestLevel+1, "(pcb_text_width %s)\n", FMT_IU( GetDesignSettings().m_PcbTextWidth ).c_str() ); aFormatter->Print( aNestLevel+1, "(pcb_text_size %s %s)\n", FMT_IU( GetDesignSettings().m_PcbTextSize.x ).c_str(), FMT_IU( GetDesignSettings().m_PcbTextSize.y ).c_str() ); aFormatter->Print( aNestLevel+1, "(mod_edge_width %s)\n", FMT_IU( GetDesignSettings().m_ModuleSegmentWidth ).c_str() ); aFormatter->Print( aNestLevel+1, "(mod_text_size %s %s)\n", FMT_IU( GetDesignSettings().m_ModuleTextSize.x ).c_str(), FMT_IU( GetDesignSettings().m_ModuleTextSize.y ).c_str() ); aFormatter->Print( aNestLevel+1, "(mod_text_width %s)\n", FMT_IU( GetDesignSettings().m_ModuleTextWidth ).c_str() ); aFormatter->Print( aNestLevel+1, "(pad_size %s %s)\n", FMT_IU( GetDesignSettings().m_Pad_Master.GetSize().x ).c_str(), FMT_IU( GetDesignSettings().m_Pad_Master.GetSize().x ).c_str() ); aFormatter->Print( aNestLevel+1, "(pad_drill %s)\n", FMT_IU( GetDesignSettings().m_Pad_Master.GetDrillSize().x ).c_str() ); aFormatter->Print( aNestLevel+1, "(pad_to_mask_clearance %s)\n", FMT_IU( GetDesignSettings().m_SolderMaskMargin ).c_str() ); if( GetDesignSettings().m_SolderPasteMargin != 0 ) aFormatter->Print( aNestLevel+1, "(pad_to_paste_clearance %s)\n", FMT_IU( GetDesignSettings().m_SolderPasteMargin ).c_str() ); if( GetDesignSettings().m_SolderPasteMarginRatio != 0 ) aFormatter->Print( aNestLevel+1, "(pad_to_paste_clearance_ratio %g)\n", GetDesignSettings().m_SolderPasteMarginRatio ); aFormatter->Print( aNestLevel+1, "(aux_axis_origin %s %s)\n", FMT_IU( GetOriginAxisPosition().x ).c_str(), FMT_IU( GetOriginAxisPosition().y ).c_str() ); aFormatter->Print( aNestLevel+1, "(visible_elements %X)\n", GetDesignSettings().GetVisibleElements() ); aFormatter->Print( aNestLevel, ")\n\n" ); int netcount = GetNetCount(); for( int i = 0; i < netcount; ++i ) aFormatter->Print( aNestLevel, "(net %d %s)\n", FindNet( i )->GetNet(), aFormatter->Quotew( FindNet( i )->GetNetname() ).c_str() ); aFormatter->Print( 0, "\n" ); // Save the default net class first. m_NetClasses.GetDefault()->Format( aFormatter, aNestLevel, aControlBits ); // Save the rest of the net classes alphabetically. for( NETCLASSES::const_iterator it = m_NetClasses.begin(); it != m_NetClasses.end(); ++it ) { NETCLASS* netclass = it->second; netclass->Format( aFormatter, aNestLevel, aControlBits ); } // Save the graphical items on the board (not owned by a module) for( BOARD_ITEM* item = m_Drawings; item; item = item->Next() ) item->Format( aFormatter, aNestLevel, aControlBits ); aFormatter->Print( 0, "\n" ); // Save the modules. for( MODULE* module = m_Modules; module; module = (MODULE*) module->Next() ) { module->Format( aFormatter, aNestLevel, aControlBits ); aFormatter->Print( 0, "\n" ); } // Do not save MARKER_PCBs, they can be regenerated easily. // Save the tracks and vias. for( TRACK* track = m_Track; track; track = track->Next() ) track->Format( aFormatter, aNestLevel, aControlBits ); /// @todo Add warning here that the old segment filed zones are no longer supported and /// will not be saved. aFormatter->Print( 0, "\n" ); // Save the polygon (which are the newer technology) zones. for( int i=0; i < GetAreaCount(); ++i ) GetArea( i )->Format( aFormatter, aNestLevel, aControlBits ); } #if defined(DEBUG) #if defined(DEBUG) void BOARD::Show( int nestLevel, std::ostream& os ) const void BOARD::Show( int nestLevel, std::ostream& os ) const Loading Loading
common/base_struct.cpp +0 −8 Original line number Original line Diff line number Diff line Loading @@ -222,14 +222,6 @@ EDA_ITEM& EDA_ITEM::operator=( const EDA_ITEM& aItem ) } } void EDA_ITEM::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const throw( IO_ERROR ) { wxFAIL_MSG( wxString::Format( wxT( "Format method not defined for item type %s." ), GetChars( GetClass() ) ) ); } #if defined(DEBUG) #if defined(DEBUG) // A function that should have been in wxWidgets // A function that should have been in wxWidgets Loading
common/eda_text.cpp +0 −10 Original line number Original line Diff line number Diff line Loading @@ -346,14 +346,6 @@ bool EDA_TEXT::IsDefaultFormatting() const void EDA_TEXT::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const void EDA_TEXT::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const throw( IO_ERROR ) throw( IO_ERROR ) { { aFormatter->Print( aNestLevel, "(text %s (at %s", aFormatter->Quotew( m_Text ).c_str(), FMT_IU( m_Pos ).c_str() ); if( m_Orient != 0.0 ) aFormatter->Print( 0, " %s", FMT_ANGLE( m_Orient ).c_str() ); aFormatter->Print( 0, ")\n" ); if( !IsDefaultFormatting() ) if( !IsDefaultFormatting() ) { { aFormatter->Print( aNestLevel+1, "(effects\n" ); aFormatter->Print( aNestLevel+1, "(effects\n" ); Loading Loading @@ -400,6 +392,4 @@ void EDA_TEXT::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControl aFormatter->Print( aNestLevel+1, ")\n" ); aFormatter->Print( aNestLevel+1, ")\n" ); } } aFormatter->Print( aNestLevel, ")\n" ); } }
common/wildcards_and_files_ext.cpp +1 −1 Original line number Original line Diff line number Diff line Loading @@ -55,7 +55,7 @@ const wxString SchematicFileWildcard( _( "KiCad schematic files (*.sch)|*.sch" ) const wxString NetlistFileWildcard( _( "KiCad netlist files (*.net)|*.net" ) ); const wxString NetlistFileWildcard( _( "KiCad netlist files (*.net)|*.net" ) ); const wxString GerberFileWildcard( _( "Gerber files (*.pho)|*.pho" ) ); const wxString GerberFileWildcard( _( "Gerber files (*.pho)|*.pho" ) ); const wxString LegacyPcbFileWildcard( _( "KiCad printed circuit board files (*.brd)|*.brd" ) ); const wxString LegacyPcbFileWildcard( _( "KiCad printed circuit board files (*.brd)|*.brd" ) ); const wxString PcbFileWildcard( _( "KiCad s-expr printed circuit board files (*.kicad_brd)|*.kicad_brd" ) ); const wxString PcbFileWildcard( _( "KiCad s-expr printed circuit board files (*.kicad_pcb)|*.kicad_pcb" ) ); const wxString FootprintLibFileWildcard( _( "KiCad footprint library file (*.mod)|*.mod" ) ); const wxString FootprintLibFileWildcard( _( "KiCad footprint library file (*.mod)|*.mod" ) ); const wxString PdfFileWildcard( _( "Portable document format files (*.pdf)|*.pdf" ) ); const wxString PdfFileWildcard( _( "Portable document format files (*.pdf)|*.pdf" ) ); const wxString MacrosFileWildcard( _( "KiCad recorded macros (*.mcr)|*.mcr" ) ); const wxString MacrosFileWildcard( _( "KiCad recorded macros (*.mcr)|*.mcr" ) ); Loading
include/base_struct.h +0 −12 Original line number Original line Diff line number Diff line Loading @@ -729,18 +729,6 @@ public: */ */ virtual EDA_ITEM& operator=( const EDA_ITEM& aItem ); virtual EDA_ITEM& operator=( const EDA_ITEM& aItem ); /** * Function Format * outputs the object to \a aFormatter in s-expression form. * * @param aFormatter The #OUTPUTFORMATTER object to write to. * @param aNestLevel The indentation next level. * @param aControlBits The control bit definition for object specific formatting. * @throw IO_ERROR on write error. */ virtual void Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const throw( IO_ERROR ); #if defined(DEBUG) #if defined(DEBUG) /** /** Loading
pcbnew/class_board.cpp +0 −195 Original line number Original line Diff line number Diff line Loading @@ -2142,201 +2142,6 @@ TRACK* BOARD::CreateLockPoint( wxPoint& aPosition, TRACK* aSegment, PICKED_ITEMS } } void BOARD::Format( OUTPUTFORMATTER* aFormatter, int aNestLevel, int aControlBits ) const throw( IO_ERROR ) { aFormatter->Print( aNestLevel, "(general\n" ); aFormatter->Print( aNestLevel+1, "(links %d)\n", GetRatsnestsCount() ); aFormatter->Print( aNestLevel+1, "(no_connects %d)\n", m_NbNoconnect ); // Write Bounding box info aFormatter->Print( aNestLevel+1, "(area %s %s %s %s)\n", FMT_IU( m_BoundingBox.GetX() ).c_str(), FMT_IU( m_BoundingBox.GetY() ).c_str(), FMT_IU( m_BoundingBox.GetRight() ).c_str(), FMT_IU( m_BoundingBox.GetBottom() ).c_str() ); aFormatter->Print( aNestLevel+1, "(thickness %s)\n", FMT_IU( GetDesignSettings().m_BoardThickness ).c_str() ); aFormatter->Print( aNestLevel+1, "(drawings %d)\n", m_Drawings.GetCount() ); aFormatter->Print( aNestLevel+1, "(tracks %d)\n", GetNumSegmTrack() ); aFormatter->Print( aNestLevel+1, "(zones %d)\n", GetNumSegmZone() ); aFormatter->Print( aNestLevel+1, "(modules %d)\n", m_Modules.GetCount() ); aFormatter->Print( aNestLevel+1, "(nets %d)\n", GetNetCount() ); aFormatter->Print( aNestLevel, ")\n\n" ); m_paper.Format( aFormatter, aNestLevel, aControlBits ); m_titles.Format( aFormatter, aNestLevel, aControlBits ); // Layers. aFormatter->Print( aNestLevel, "(layers %d %08X", GetCopperLayerCount(), GetEnabledLayers() ); if( GetEnabledLayers() != GetVisibleLayers() ) aFormatter->Print( 0, " %08X", GetVisibleLayers() ); aFormatter->Print( 0, "\n" ); unsigned layerMask = ALL_CU_LAYERS & GetEnabledLayers(); for( int layer = 0; layerMask; ++layer, layerMask >>= 1 ) { if( layerMask & 1 ) { aFormatter->Print( aNestLevel+1, "(layer%d %s %s)\n", layer, TO_UTF8( GetLayerName( layer ) ), LAYER::ShowType( GetLayerType( layer ) ) ); } } aFormatter->Print( aNestLevel, ")\n\n" ); // Setup aFormatter->Print( aNestLevel, "(setup\n" ); // Save current default track width, for compatibility with older Pcbnew version; aFormatter->Print( aNestLevel+1, "(last_trace_width %s)\n", FMT_IU( m_TrackWidthList[m_TrackWidthSelector] ).c_str() ); // Save custom tracks width list (the first is not saved here: this is the netclass value for( unsigned ii = 1; ii < m_TrackWidthList.size(); ii++ ) aFormatter->Print( aNestLevel+1, "(user_trace_width%d %s)\n", ii+1, FMT_IU( m_TrackWidthList[ii] ).c_str() ); aFormatter->Print( aNestLevel+1, "(trace_clearance %s)\n", FMT_IU( m_NetClasses.GetDefault()->GetClearance() ).c_str() ); // ZONE_SETTINGS aFormatter->Print( aNestLevel+1, "(zone_clearance %s)\n", FMT_IU( GetZoneSettings().m_ZoneClearance ).c_str() ); aFormatter->Print( aNestLevel+1, "(zone_45_only %d)\n", GetZoneSettings().m_Zone_45_Only ); aFormatter->Print( aNestLevel+1, "(trace_min %s)\n", FMT_IU( GetDesignSettings().m_TrackMinWidth ).c_str() ); aFormatter->Print( aNestLevel+1, "(segment_width %s)\n", FMT_IU( GetDesignSettings().m_DrawSegmentWidth ).c_str() ); aFormatter->Print( aNestLevel+1, "(edge_width %s)\n", FMT_IU( GetDesignSettings().m_EdgeSegmentWidth ).c_str() ); // Save current default via size, for compatibility with older Pcbnew version; aFormatter->Print( aNestLevel+1, "(via_size %s)\n", FMT_IU( m_NetClasses.GetDefault()->GetViaDiameter() ).c_str() ); aFormatter->Print( aNestLevel+1, "(via_drill %s)\n", FMT_IU( m_NetClasses.GetDefault()->GetViaDrill() ).c_str() ); aFormatter->Print( aNestLevel+1, "(via_min_size %s)\n", FMT_IU( GetDesignSettings().m_ViasMinSize ).c_str() ); aFormatter->Print( aNestLevel+1, "(via_min_drill %s)\n", FMT_IU( GetDesignSettings().m_ViasMinDrill ).c_str() ); // Save custom vias diameters list (the first is not saved here: this is // the netclass value for( unsigned ii = 1; ii < m_ViasDimensionsList.size(); ii++ ) aFormatter->Print( aNestLevel+1, "(user_via%d %s %s)\n", ii, FMT_IU( m_ViasDimensionsList[ii].m_Diameter ).c_str(), FMT_IU( m_ViasDimensionsList[ii].m_Drill ).c_str() ); // for old versions compatibility: aFormatter->Print( aNestLevel+1, "(uvia_size %s)\n", FMT_IU( m_NetClasses.GetDefault()->GetuViaDiameter() ).c_str() ); aFormatter->Print( aNestLevel+1, "(uvia_drill %s)\n", FMT_IU( m_NetClasses.GetDefault()->GetuViaDrill() ).c_str() ); aFormatter->Print( aNestLevel+1, "(uvias_allow %s)\n", FMT_IU( GetDesignSettings().m_MicroViasAllowed ).c_str() ); aFormatter->Print( aNestLevel+1, "(uvia_min_size %s)\n", FMT_IU( GetDesignSettings().m_MicroViasMinSize ).c_str() ); aFormatter->Print( aNestLevel+1, "(uvia_min_drill %s)\n", FMT_IU( GetDesignSettings().m_MicroViasMinDrill ).c_str() ); aFormatter->Print( aNestLevel+1, "(pcb_text_width %s)\n", FMT_IU( GetDesignSettings().m_PcbTextWidth ).c_str() ); aFormatter->Print( aNestLevel+1, "(pcb_text_size %s %s)\n", FMT_IU( GetDesignSettings().m_PcbTextSize.x ).c_str(), FMT_IU( GetDesignSettings().m_PcbTextSize.y ).c_str() ); aFormatter->Print( aNestLevel+1, "(mod_edge_width %s)\n", FMT_IU( GetDesignSettings().m_ModuleSegmentWidth ).c_str() ); aFormatter->Print( aNestLevel+1, "(mod_text_size %s %s)\n", FMT_IU( GetDesignSettings().m_ModuleTextSize.x ).c_str(), FMT_IU( GetDesignSettings().m_ModuleTextSize.y ).c_str() ); aFormatter->Print( aNestLevel+1, "(mod_text_width %s)\n", FMT_IU( GetDesignSettings().m_ModuleTextWidth ).c_str() ); aFormatter->Print( aNestLevel+1, "(pad_size %s %s)\n", FMT_IU( GetDesignSettings().m_Pad_Master.GetSize().x ).c_str(), FMT_IU( GetDesignSettings().m_Pad_Master.GetSize().x ).c_str() ); aFormatter->Print( aNestLevel+1, "(pad_drill %s)\n", FMT_IU( GetDesignSettings().m_Pad_Master.GetDrillSize().x ).c_str() ); aFormatter->Print( aNestLevel+1, "(pad_to_mask_clearance %s)\n", FMT_IU( GetDesignSettings().m_SolderMaskMargin ).c_str() ); if( GetDesignSettings().m_SolderPasteMargin != 0 ) aFormatter->Print( aNestLevel+1, "(pad_to_paste_clearance %s)\n", FMT_IU( GetDesignSettings().m_SolderPasteMargin ).c_str() ); if( GetDesignSettings().m_SolderPasteMarginRatio != 0 ) aFormatter->Print( aNestLevel+1, "(pad_to_paste_clearance_ratio %g)\n", GetDesignSettings().m_SolderPasteMarginRatio ); aFormatter->Print( aNestLevel+1, "(aux_axis_origin %s %s)\n", FMT_IU( GetOriginAxisPosition().x ).c_str(), FMT_IU( GetOriginAxisPosition().y ).c_str() ); aFormatter->Print( aNestLevel+1, "(visible_elements %X)\n", GetDesignSettings().GetVisibleElements() ); aFormatter->Print( aNestLevel, ")\n\n" ); int netcount = GetNetCount(); for( int i = 0; i < netcount; ++i ) aFormatter->Print( aNestLevel, "(net %d %s)\n", FindNet( i )->GetNet(), aFormatter->Quotew( FindNet( i )->GetNetname() ).c_str() ); aFormatter->Print( 0, "\n" ); // Save the default net class first. m_NetClasses.GetDefault()->Format( aFormatter, aNestLevel, aControlBits ); // Save the rest of the net classes alphabetically. for( NETCLASSES::const_iterator it = m_NetClasses.begin(); it != m_NetClasses.end(); ++it ) { NETCLASS* netclass = it->second; netclass->Format( aFormatter, aNestLevel, aControlBits ); } // Save the graphical items on the board (not owned by a module) for( BOARD_ITEM* item = m_Drawings; item; item = item->Next() ) item->Format( aFormatter, aNestLevel, aControlBits ); aFormatter->Print( 0, "\n" ); // Save the modules. for( MODULE* module = m_Modules; module; module = (MODULE*) module->Next() ) { module->Format( aFormatter, aNestLevel, aControlBits ); aFormatter->Print( 0, "\n" ); } // Do not save MARKER_PCBs, they can be regenerated easily. // Save the tracks and vias. for( TRACK* track = m_Track; track; track = track->Next() ) track->Format( aFormatter, aNestLevel, aControlBits ); /// @todo Add warning here that the old segment filed zones are no longer supported and /// will not be saved. aFormatter->Print( 0, "\n" ); // Save the polygon (which are the newer technology) zones. for( int i=0; i < GetAreaCount(); ++i ) GetArea( i )->Format( aFormatter, aNestLevel, aControlBits ); } #if defined(DEBUG) #if defined(DEBUG) void BOARD::Show( int nestLevel, std::ostream& os ) const void BOARD::Show( int nestLevel, std::ostream& os ) const Loading