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Elphel
kicad-source-mirror
Commits
d6fbfbc0
Commit
d6fbfbc0
authored
Jul 20, 2014
by
unknown
Committed by
jean-pierre charras
Jul 20, 2014
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Pcbnew: fix bug when generating drill files for blind/buried vias.
parent
4c777241
Changes
2
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Inline
Side-by-side
Showing
2 changed files
with
36 additions
and
32 deletions
+36
-32
dialog_gendrill.cpp
pcbnew/dialogs/dialog_gendrill.cpp
+26
-25
gendrill_Excellon_writer.cpp
pcbnew/exporters/gendrill_Excellon_writer.cpp
+10
-7
No files found.
pcbnew/dialogs/dialog_gendrill.cpp
View file @
d6fbfbc0
...
@@ -354,15 +354,17 @@ void DIALOG_GENDRILL::SetParams()
...
@@ -354,15 +354,17 @@ void DIALOG_GENDRILL::SetParams()
void
DIALOG_GENDRILL
::
GenDrillAndMapFiles
(
bool
aGenDrill
,
bool
aGenMap
)
void
DIALOG_GENDRILL
::
GenDrillAndMapFiles
(
bool
aGenDrill
,
bool
aGenMap
)
{
{
wxString
layer
_extend
;
/* added to the Board FileName to
wxString
layer
name_extend
;
/* added to the Board FileName to
* create FullFileName (= Board
* create FullFileName (= Board
* FileName + layer pair names) */
* FileName + layer pair names)
*/
wxString
msg
;
wxString
msg
;
bool
hasBuriedVias
=
false
;
/* If true, drill files are created
bool
hasBuriedVias
=
false
;
/* If true, drill files are created
* layer pair by layer pair for
* layer pair by layer pair for
* buried vias */
* buried vias
int
layer1
=
B_Cu
;
*/
int
layer2
=
F_Cu
;
int
layer1
=
F_Cu
;
int
layer2
=
B_Cu
;
bool
gen_through_holes
=
true
;
bool
gen_through_holes
=
true
;
bool
gen_NPTH_holes
=
false
;
bool
gen_NPTH_holes
=
false
;
...
@@ -392,26 +394,26 @@ void DIALOG_GENDRILL::GenDrillAndMapFiles(bool aGenDrill, bool aGenMap)
...
@@ -392,26 +394,26 @@ void DIALOG_GENDRILL::GenDrillAndMapFiles(bool aGenDrill, bool aGenMap)
if
(
excellonWriter
.
GetHolesCount
()
>
0
)
// has holes?
if
(
excellonWriter
.
GetHolesCount
()
>
0
)
// has holes?
{
{
fn
=
m_parent
->
GetBoard
()
->
GetFileName
();
fn
=
m_parent
->
GetBoard
()
->
GetFileName
();
layer_extend
.
Empty
();
layer
name
_extend
.
Empty
();
if
(
gen_NPTH_holes
)
if
(
gen_NPTH_holes
)
{
{
layer_extend
<<
wxT
(
"-NPTH"
);
layer
name
_extend
<<
wxT
(
"-NPTH"
);
}
}
else
if
(
!
gen_through_holes
)
else
if
(
!
gen_through_holes
)
{
{
if
(
layer1
==
B
_Cu
)
if
(
layer1
==
F
_Cu
)
layer
_extend
<<
wxT
(
"-back
"
);
layer
name_extend
<<
wxT
(
"-front
"
);
else
else
layer_extend
<<
wxT
(
"-inner"
)
<<
layer1
;
layer
name
_extend
<<
wxT
(
"-inner"
)
<<
layer1
;
if
(
layer2
==
F
_Cu
)
if
(
layer2
==
B
_Cu
)
layer
_extend
<<
wxT
(
"-front
"
);
layer
name_extend
<<
wxT
(
"-back
"
);
else
else
layer_extend
<<
wxT
(
"-inner"
)
<<
layer2
;
layer
name
_extend
<<
wxT
(
"-inner"
)
<<
layer2
;
}
}
fn
.
SetName
(
fn
.
GetName
()
+
layer_extend
);
fn
.
SetName
(
fn
.
GetName
()
+
layer
name
_extend
);
wxString
defaultPath
=
m_plotOpts
.
GetOutputDirectory
();
wxString
defaultPath
=
m_plotOpts
.
GetOutputDirectory
();
if
(
defaultPath
.
IsEmpty
()
)
if
(
defaultPath
.
IsEmpty
()
)
...
@@ -469,13 +471,13 @@ void DIALOG_GENDRILL::GenDrillAndMapFiles(bool aGenDrill, bool aGenMap)
...
@@ -469,13 +471,13 @@ void DIALOG_GENDRILL::GenDrillAndMapFiles(bool aGenDrill, bool aGenMap)
else
else
{
{
if
(
gen_through_holes
)
if
(
gen_through_holes
)
layer2
=
layer1
+
1
;
// prepare generation of first layer pair
layer2
=
layer1
+
1
;
//
done with through-board holes,
prepare generation of first layer pair
else
else
{
{
if
(
layer2
>=
F
_Cu
)
// no more layer pair to consider
if
(
layer2
>=
B
_Cu
)
// no more layer pair to consider
{
{
layer1
=
B
_Cu
;
layer1
=
F
_Cu
;
layer2
=
F
_Cu
;
layer2
=
B
_Cu
;
gen_NPTH_holes
=
true
;
gen_NPTH_holes
=
true
;
continue
;
continue
;
}
}
...
@@ -484,8 +486,7 @@ void DIALOG_GENDRILL::GenDrillAndMapFiles(bool aGenDrill, bool aGenMap)
...
@@ -484,8 +486,7 @@ void DIALOG_GENDRILL::GenDrillAndMapFiles(bool aGenDrill, bool aGenMap)
layer2
++
;
// use next layer pair
layer2
++
;
// use next layer pair
if
(
layer2
==
m_parent
->
GetBoard
()
->
GetCopperLayerCount
()
-
1
)
if
(
layer2
==
m_parent
->
GetBoard
()
->
GetCopperLayerCount
()
-
1
)
layer2
=
F_Cu
;
// the last layer is always the
layer2
=
B_Cu
;
// the last layer is always the back layer
// Front layer
}
}
gen_through_holes
=
false
;
gen_through_holes
=
false
;
...
...
pcbnew/exporters/gendrill_Excellon_writer.cpp
View file @
d6fbfbc0
...
@@ -471,12 +471,13 @@ void EXCELLON_WRITER::BuildHolesList( int aFirstLayer,
...
@@ -471,12 +471,13 @@ void EXCELLON_WRITER::BuildHolesList( int aFirstLayer,
via
->
LayerPair
(
&
new_hole
.
m_Hole_Top_Layer
,
&
new_hole
.
m_Hole_Bottom_Layer
);
via
->
LayerPair
(
&
new_hole
.
m_Hole_Top_Layer
,
&
new_hole
.
m_Hole_Bottom_Layer
);
// LayerPair return params with m_Hole_Bottom_Layer > m_Hole_Top_Layer
// LayerPair return params with m_Hole_Bottom_Layer > m_Hole_Top_Layer
// (remember top layer = 0 and bottom layer = 31 for through hole vias)
// Remember: top layer = 0 and bottom layer = 31 for through hole vias
if
(
(
new_hole
.
m_Hole_Top_Layer
<
aFirstLayer
)
&&
(
aFirstLayer
>=
0
)
)
// the via should be at least from aFirstLayer to aLastLayer
continue
;
if
(
(
new_hole
.
m_Hole_Top_Layer
>
aFirstLayer
)
&&
(
aFirstLayer
>=
0
)
)
continue
;
// via above the first layer
if
(
(
new_hole
.
m_Hole_Bottom_Layer
>
aLastLayer
)
&&
(
aLastLayer
>=
0
)
)
if
(
(
new_hole
.
m_Hole_Bottom_Layer
<
aLastLayer
)
&&
(
aLastLayer
>=
0
)
)
continue
;
continue
;
// via below the last layer
if
(
aExcludeThroughHoles
&&
(
new_hole
.
m_Hole_Bottom_Layer
==
B_Cu
)
if
(
aExcludeThroughHoles
&&
(
new_hole
.
m_Hole_Bottom_Layer
==
B_Cu
)
&&
(
new_hole
.
m_Hole_Top_Layer
==
F_Cu
)
)
&&
(
new_hole
.
m_Hole_Top_Layer
==
F_Cu
)
)
...
@@ -494,7 +495,9 @@ void EXCELLON_WRITER::BuildHolesList( int aFirstLayer,
...
@@ -494,7 +495,9 @@ void EXCELLON_WRITER::BuildHolesList( int aFirstLayer,
// Read and analyse pads
// Read and analyse pads
for
(
D_PAD
*
pad
=
module
->
Pads
();
pad
;
pad
=
pad
->
Next
()
)
for
(
D_PAD
*
pad
=
module
->
Pads
();
pad
;
pad
=
pad
->
Next
()
)
{
{
if
(
!
aGenerateNPTH_list
&&
pad
->
GetAttribute
()
==
PAD_HOLE_NOT_PLATED
&&
!
aMergePTHNPTH
)
if
(
!
aGenerateNPTH_list
&&
pad
->
GetAttribute
()
==
PAD_HOLE_NOT_PLATED
&&
!
aMergePTHNPTH
)
continue
;
continue
;
if
(
aGenerateNPTH_list
&&
pad
->
GetAttribute
()
!=
PAD_HOLE_NOT_PLATED
)
if
(
aGenerateNPTH_list
&&
pad
->
GetAttribute
()
!=
PAD_HOLE_NOT_PLATED
)
...
...
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