Loading common/eda_text.cpp +2 −2 Original line number Original line Diff line number Diff line Loading @@ -35,9 +35,9 @@ // Conversion to application internal units defined at build time. // Conversion to application internal units defined at build time. #if defined( PCBNEW ) #if defined( PCBNEW ) #include <class_board_item.h> #include <class_board_item.h> // for FMT_IU #elif defined( EESCHEMA ) #elif defined( EESCHEMA ) #include <sch_item_struct.h> #include <sch_item_struct.h> // for FMT_IU #elif defined( GERBVIEW ) #elif defined( GERBVIEW ) #elif defined( PL_EDITOR ) #elif defined( PL_EDITOR ) #include <base_units.h> #include <base_units.h> Loading pcbnew/build_BOM_from_board.cpp +1 −1 Original line number Original line Diff line number Diff line Loading @@ -132,7 +132,7 @@ void PCB_EDIT_FRAME::RecreateBOMFileFromBoard( wxCommandEvent& aEvent ) bool valExist = false; bool valExist = false; // try to find component in existing list // try to find component in existing list for( iter = list.begin(); iter != list.end(); iter++ ) for( iter = list.begin(); iter != list.end(); ++iter ) { { cmp* current = *iter; cmp* current = *iter; Loading pcbnew/class_board_design_settings.cpp +2 −2 Original line number Original line Diff line number Diff line Loading @@ -242,7 +242,7 @@ int BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue() int clearance = m_NetClasses.GetDefault()->GetClearance(); int clearance = m_NetClasses.GetDefault()->GetClearance(); //Read list of Net Classes //Read list of Net Classes for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); nc++ ) for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc ) { { NETCLASSPTR netclass = nc->second; NETCLASSPTR netclass = nc->second; clearance = std::max( clearance, netclass->GetClearance() ); clearance = std::max( clearance, netclass->GetClearance() ); Loading @@ -257,7 +257,7 @@ int BOARD_DESIGN_SETTINGS::GetSmallestClearanceValue() int clearance = m_NetClasses.GetDefault()->GetClearance(); int clearance = m_NetClasses.GetDefault()->GetClearance(); //Read list of Net Classes //Read list of Net Classes for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); nc++ ) for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc ) { { NETCLASSPTR netclass = nc->second; NETCLASSPTR netclass = nc->second; clearance = std::min( clearance, netclass->GetClearance() ); clearance = std::min( clearance, netclass->GetClearance() ); Loading pcbnew/class_module.cpp +1 −3 Original line number Original line Diff line number Diff line Loading @@ -145,9 +145,7 @@ MODULE::MODULE( const MODULE& aModule ) : if( item->GetShape3DName().IsEmpty() ) // do not copy empty shapes. if( item->GetShape3DName().IsEmpty() ) // do not copy empty shapes. continue; continue; S3D_MASTER* t3d = m_3D_Drawings; S3D_MASTER* t3d = new S3D_MASTER( this ); t3d = new S3D_MASTER( this ); t3d->Copy( item ); t3d->Copy( item ); m_3D_Drawings.PushBack( t3d ); m_3D_Drawings.PushBack( t3d ); } } Loading pcbnew/class_pad_draw_functions.cpp +3 −3 Original line number Original line Diff line number Diff line Loading @@ -120,10 +120,10 @@ void D_PAD::Draw( EDA_DRAW_PANEL* aPanel, wxDC* aDC, GR_DRAWMODE aDraw_mode, DISPLAY_OPTIONS* displ_opts = (DISPLAY_OPTIONS*)frame->GetDisplayOptions(); DISPLAY_OPTIONS* displ_opts = (DISPLAY_OPTIONS*)frame->GetDisplayOptions(); PCB_SCREEN* screen = frame->GetScreen(); PCB_SCREEN* screen = frame->GetScreen(); if( displ_opts->m_DisplayPadFill == FILLED ) if( displ_opts && displ_opts->m_DisplayPadFill == SKETCH ) drawInfo.m_ShowPadFilled = true; else drawInfo.m_ShowPadFilled = false; drawInfo.m_ShowPadFilled = false; else drawInfo.m_ShowPadFilled = true; EDA_COLOR_T color = BLACK; EDA_COLOR_T color = BLACK; if( m_layerMask[F_Cu] ) if( m_layerMask[F_Cu] ) Loading Loading
common/eda_text.cpp +2 −2 Original line number Original line Diff line number Diff line Loading @@ -35,9 +35,9 @@ // Conversion to application internal units defined at build time. // Conversion to application internal units defined at build time. #if defined( PCBNEW ) #if defined( PCBNEW ) #include <class_board_item.h> #include <class_board_item.h> // for FMT_IU #elif defined( EESCHEMA ) #elif defined( EESCHEMA ) #include <sch_item_struct.h> #include <sch_item_struct.h> // for FMT_IU #elif defined( GERBVIEW ) #elif defined( GERBVIEW ) #elif defined( PL_EDITOR ) #elif defined( PL_EDITOR ) #include <base_units.h> #include <base_units.h> Loading
pcbnew/build_BOM_from_board.cpp +1 −1 Original line number Original line Diff line number Diff line Loading @@ -132,7 +132,7 @@ void PCB_EDIT_FRAME::RecreateBOMFileFromBoard( wxCommandEvent& aEvent ) bool valExist = false; bool valExist = false; // try to find component in existing list // try to find component in existing list for( iter = list.begin(); iter != list.end(); iter++ ) for( iter = list.begin(); iter != list.end(); ++iter ) { { cmp* current = *iter; cmp* current = *iter; Loading
pcbnew/class_board_design_settings.cpp +2 −2 Original line number Original line Diff line number Diff line Loading @@ -242,7 +242,7 @@ int BOARD_DESIGN_SETTINGS::GetBiggestClearanceValue() int clearance = m_NetClasses.GetDefault()->GetClearance(); int clearance = m_NetClasses.GetDefault()->GetClearance(); //Read list of Net Classes //Read list of Net Classes for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); nc++ ) for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc ) { { NETCLASSPTR netclass = nc->second; NETCLASSPTR netclass = nc->second; clearance = std::max( clearance, netclass->GetClearance() ); clearance = std::max( clearance, netclass->GetClearance() ); Loading @@ -257,7 +257,7 @@ int BOARD_DESIGN_SETTINGS::GetSmallestClearanceValue() int clearance = m_NetClasses.GetDefault()->GetClearance(); int clearance = m_NetClasses.GetDefault()->GetClearance(); //Read list of Net Classes //Read list of Net Classes for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); nc++ ) for( NETCLASSES::const_iterator nc = m_NetClasses.begin(); nc != m_NetClasses.end(); ++nc ) { { NETCLASSPTR netclass = nc->second; NETCLASSPTR netclass = nc->second; clearance = std::min( clearance, netclass->GetClearance() ); clearance = std::min( clearance, netclass->GetClearance() ); Loading
pcbnew/class_module.cpp +1 −3 Original line number Original line Diff line number Diff line Loading @@ -145,9 +145,7 @@ MODULE::MODULE( const MODULE& aModule ) : if( item->GetShape3DName().IsEmpty() ) // do not copy empty shapes. if( item->GetShape3DName().IsEmpty() ) // do not copy empty shapes. continue; continue; S3D_MASTER* t3d = m_3D_Drawings; S3D_MASTER* t3d = new S3D_MASTER( this ); t3d = new S3D_MASTER( this ); t3d->Copy( item ); t3d->Copy( item ); m_3D_Drawings.PushBack( t3d ); m_3D_Drawings.PushBack( t3d ); } } Loading
pcbnew/class_pad_draw_functions.cpp +3 −3 Original line number Original line Diff line number Diff line Loading @@ -120,10 +120,10 @@ void D_PAD::Draw( EDA_DRAW_PANEL* aPanel, wxDC* aDC, GR_DRAWMODE aDraw_mode, DISPLAY_OPTIONS* displ_opts = (DISPLAY_OPTIONS*)frame->GetDisplayOptions(); DISPLAY_OPTIONS* displ_opts = (DISPLAY_OPTIONS*)frame->GetDisplayOptions(); PCB_SCREEN* screen = frame->GetScreen(); PCB_SCREEN* screen = frame->GetScreen(); if( displ_opts->m_DisplayPadFill == FILLED ) if( displ_opts && displ_opts->m_DisplayPadFill == SKETCH ) drawInfo.m_ShowPadFilled = true; else drawInfo.m_ShowPadFilled = false; drawInfo.m_ShowPadFilled = false; else drawInfo.m_ShowPadFilled = true; EDA_COLOR_T color = BLACK; EDA_COLOR_T color = BLACK; if( m_layerMask[F_Cu] ) if( m_layerMask[F_Cu] ) Loading