Commit aaf6cce6 authored by Brian Sidebotham's avatar Brian Sidebotham Committed by Dick Hollenbeck

switch a template's board format to kicad_pcb format

parent 08f87038
template/raspberrypi-gpio/meta/brd.png

13.4 KB | W: | H:

template/raspberrypi-gpio/meta/brd.png

56.2 KB | W: | H:

template/raspberrypi-gpio/meta/brd.png
template/raspberrypi-gpio/meta/brd.png
template/raspberrypi-gpio/meta/brd.png
template/raspberrypi-gpio/meta/brd.png
  • 2-up
  • Swipe
  • Onion skin
File mode changed from 100644 to 100755
......@@ -5,19 +5,21 @@
<body>
<h1>Raspberry Pi</h1>
<h2>Expansion Board</h2>
This project template is the basis of an expansion board for the
<p>This project template is the basis of an expansion board for the
<a href="http://www.raspberrypi.org/" target="blank">Raspberry Pi $25 ARM
board.</a>
<br><br>
This base project includes a PCB edge defined as the same size as the
board.</a></p>
<p>This base project includes a PCB edge defined as the same size as the
Raspberry-Pi PCB with the connectors placed correctly to align the two boards.
All IO present on the Raspberry-Pi board is connected to the project through the
0.1" expansion headers.
<br><br>
The board outline looks like the following:
<P><IMG SRC="brd.png" NAME="brd" ALIGN=LEFT WIDTH=680 HEIGHT=378 BORDER=0><BR><BR>(c)2012
<br><br>
(c)2012 Brian Sidebotham<br>
(c)2012 Kicad Developers<br>
0.1" expansion headers.</p>
<p>The board outline looks like the following:</p>
<p><img src="brd.png"></p>
<p>(c)2012 Brian Sidebotham<br>
(c)2012 Kicad Developers<br></p>
</body>
</html>
EESchema-LIBRARY Version 2.3 Date: 03/08/2012 23:04:32
EESchema-LIBRARY Version 2.3 Date: 15/11/2012 21:22:43
#encoding utf-8
#
# +3.3V
......
PCBNEW-BOARD Version 1 date 03/08/2012 23:04:25
# Created by Pcbnew(2012-08-03 BZR 3666)-testing
$GENERAL
encoding utf-8
Units deci-mils
LayerCount 2
EnabledLayers 1FFF8001
VisibleLayers 1FFFFFFF
Links 0
NoConn 0
Di 64424 41924 100576 63576
Ndraw 4
Ntrack 0
Nzone 0
BoardThickness 620
Nmodule 1
Nnets 4
$EndGENERAL
$SHEETDESCR
Sheet A3 16535 11693
Title ""
Date "3 aug 2012"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndSHEETDESCR
$SETUP
Layers 2
Layer[0] Back signal
Layer[15] Front signal
TrackWidth 100
TrackClearence 100
ZoneClearence 200
Zone_45_Only 0
TrackMinWidth 100
DrawSegmWidth 150
EdgeSegmWidth 150
ViaSize 350
ViaDrill 250
ViaMinSize 350
ViaMinDrill 200
MicroViaSize 200
MicroViaDrill 50
MicroViasAllowed 0
MicroViaMinSize 200
MicroViaMinDrill 50
TextPcbWidth 120
TextPcbSize 600 800
EdgeModWidth 150
TextModSize 600 600
TextModWidth 120
PadSize 600 600
PadDrill 320
Pad2MaskClearance 100
AuxiliaryAxisOrg 0 0
VisibleElements FFFFFFBF
PcbPlotParams (pcbplotparams (layerselection 3178497) (usegerberextensions true) (excludeedgelayer true) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 2) (pscolor true) (psnegative false) (psa4output false) (plotreference true) (plotvalue true) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory ""))
$EndSETUP
$EQUIPOT
Na 0 ""
St ~
$EndEQUIPOT
$EQUIPOT
Na 1 "+3.3V"
St ~
$EndEQUIPOT
$EQUIPOT
Na 2 "+5V"
St ~
$EndEQUIPOT
$EQUIPOT
Na 3 "GND"
St ~
$EndEQUIPOT
$NCLASS
Name "Default"
Desc "This is the default net class."
Clearance 100
TrackWidth 100
ViaDia 350
ViaDrill 250
uViaDia 200
uViaDrill 50
AddNet ""
AddNet "+3.3V"
AddNet "+5V"
AddNet "GND"
$EndNCLASS
$MODULE pin_array_13x2
Po 71500 43500 0 15 501C4AA3 501C493E ~~
Li pin_array_13x2
Cd Double rangee de contacts 2 x 12 pins
Kw CONN
Sc 501C493E
AR /501C45CC
Op 0 0 0
T0 -6000 1500 400 400 0 80 N V 21 N "P1"
T1 4500 1500 400 400 0 80 N V 21 N "CONN_13X2"
DS -6500 1000 6500 1000 80 21
DS 6500 -1000 -6500 -1000 80 21
DS -6500 -1000 -6500 1000 80 21
DS 6500 1000 6500 -1000 80 21
$PAD
Sh "1" R 600 600 0 0 0
Dr 320 0 0
At STD N 00E0FFFF
Ne 1 "+3.3V"
Po -6000 500
$EndPAD
$PAD
Sh "2" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 2 "+5V"
Po -6000 -500
$EndPAD
$PAD
Sh "3" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -5000 500
$EndPAD
$PAD
Sh "4" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -5000 -500
$EndPAD
$PAD
Sh "5" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -4000 500
$EndPAD
$PAD
Sh "6" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 3 "GND"
Po -4000 -500
$EndPAD
$PAD
Sh "7" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -3000 500
$EndPAD
$PAD
Sh "8" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -3000 -500
$EndPAD
$PAD
Sh "9" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -2000 500
$EndPAD
$PAD
Sh "10" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -2000 -500
$EndPAD
$PAD
Sh "11" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -1000 500
$EndPAD
$PAD
Sh "12" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po -1000 -500
$EndPAD
$PAD
Sh "13" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 500
$EndPAD
$PAD
Sh "14" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 0 -500
$EndPAD
$PAD
Sh "15" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 1000 500
$EndPAD
$PAD
Sh "16" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 1000 -500
$EndPAD
$PAD
Sh "17" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 2000 500
$EndPAD
$PAD
Sh "18" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 2000 -500
$EndPAD
$PAD
Sh "19" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 3000 500
$EndPAD
$PAD
Sh "20" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 3000 -500
$EndPAD
$PAD
Sh "21" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 4000 500
$EndPAD
$PAD
Sh "22" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 4000 -500
$EndPAD
$PAD
Sh "23" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 5000 500
$EndPAD
$PAD
Sh "24" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 5000 -500
$EndPAD
$PAD
Sh "25" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 6000 500
$EndPAD
$PAD
Sh "26" C 600 600 0 0 0
Dr 400 0 0
At STD N 00E0FFFF
Ne 0 ""
Po 6000 -500
$EndPAD
$SHAPE3D
Na "pin_array/pins_array_13x2.wrl"
Sc 1 1 1
Of 0 0 0
Ro 0 0 0
$EndSHAPE3D
$EndMODULE pin_array_13x2
$DRAWSEGMENT
Po 0 100500 63500 64500 63500 150
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 64500 42000 64500 63500 150
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 100500 42000 100500 63500 150
De 28 0 900 0 0
$EndDRAWSEGMENT
$DRAWSEGMENT
Po 0 64500 42000 100500 42000 150
De 28 0 900 0 0
$EndDRAWSEGMENT
$TRACK
$EndTRACK
$ZONE
$EndZONE
$EndBOARD
Cmp-Mod V01 Created by CvPcb (2012-08-03 BZR 3666)-testing date = 03/08/2012 22:59:51
Cmp-Mod V01 Created by CvPcb (2012-11-15 BZR 3804)-testing date = 15/11/2012 21:23:25
BeginCmp
TimeStamp = /501C45CC;
TimeStamp = /50A55ABA;
Reference = P1;
ValeurCmp = CONN_13X2;
IdModule = pin_array_13x2;
......
This diff is collapsed.
# EESchema Netlist Version 1.1 created 03/08/2012 22:54:12
# EESchema Netlist Version 1.1 created 15/11/2012 21:22:35
(
( /501C45CC $noname P1 CONN_13X2 {Lib=CONN_13X2}
( /50A55ABA $noname P1 CONN_13X2 {Lib=CONN_13X2}
( 1 +3.3V )
( 2 +5V )
( 3 ? )
......
update=03/08/2012 22:36:35
update=15/11/2012 21:11:59
version=1
last_client=kicad
[cvpcb]
......
EESchema Schematic File Version 2 date 03/08/2012 23:04:32
EESchema Schematic File Version 2 date 15/11/2012 21:22:43
LIBS:power
LIBS:device
LIBS:transistors
......@@ -29,13 +29,14 @@ LIBS:opto
LIBS:atmel
LIBS:contrib
LIBS:valves
EELAYER 43 0
LIBS:rpi-cache
EELAYER 27 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date "3 aug 2012"
Date "15 nov 2012"
Rev ""
Comp ""
Comment1 ""
......@@ -45,124 +46,124 @@ Comment4 ""
$EndDescr
$Comp
L CONN_13X2 P1
U 1 1 501C45CC
P 9600 1500
F 0 "P1" H 9600 2200 60 0000 C CNN
F 1 "CONN_13X2" V 9600 1500 50 0000 C CNN
1 9600 1500
U 1 1 50A55ABA
P 2400 1800
F 0 "P1" H 2400 2500 60 0000 C CNN
F 1 "CONN_13X2" V 2400 1800 50 0000 C CNN
1 2400 1800
1 0 0 -1
$EndComp
$Comp
L +5V #PWR01
U 1 1 501C4637
P 10100 800
F 0 "#PWR01" H 10100 890 20 0001 C CNN
F 1 "+5V" H 10100 890 30 0000 C CNN
1 10100 800
1 0 0 -1
$EndComp
$Comp
L +3.3V #PWR02
U 1 1 501C4646
P 9100 800
F 0 "#PWR02" H 9100 760 30 0001 C CNN
F 1 "+3.3V" H 9100 910 30 0000 C CNN
1 9100 800
L +3.3V #PWR01
U 1 1 50A55B18
P 1900 1050
F 0 "#PWR01" H 1900 1010 30 0001 C CNN
F 1 "+3.3V" H 1900 1160 30 0000 C CNN
1 1900 1050
1 0 0 -1
$EndComp
Wire Wire Line
1900 1050 1900 1200
Wire Wire Line
1900 1200 2000 1200
$Comp
L GND #PWR03
U 1 1 501C4659
P 10100 2200
F 0 "#PWR03" H 10100 2200 30 0001 C CNN
F 1 "GND" H 10100 2130 30 0001 C CNN
1 10100 2200
L +5V #PWR02
U 1 1 50A55B2E
P 2900 1050
F 0 "#PWR02" H 2900 1140 20 0001 C CNN
F 1 "+5V" H 2900 1140 30 0000 C CNN
1 2900 1050
1 0 0 -1
$EndComp
Wire Wire Line
10000 1100 10100 1100
2900 1050 2900 1200
Wire Wire Line
10100 1100 10100 2200
2900 1200 2800 1200
NoConn ~ 2800 1300
Wire Wire Line
10000 900 10100 900
2000 1300 1250 1300
Wire Wire Line
10100 900 10100 800
2000 1400 1250 1400
Text Label 1250 1300 0 60 ~ 0
GPIO0(SDA)
Text Label 1250 1400 0 60 ~ 0
GPIO1(SCL)
Wire Wire Line
9200 900 9100 900
2000 1500 1250 1500
Text Label 1250 1500 0 60 ~ 0
GPIO4
NoConn ~ 2000 1600
Wire Wire Line
9100 900 9100 800
2000 1700 1250 1700
Wire Wire Line
10000 1200 11000 1200
2000 1800 1250 1800
Wire Wire Line
10000 1300 11000 1300
Text Label 11000 1200 2 60 ~ 0
GPIO14_(TxD)
Text Label 11000 1300 2 60 ~ 0
GPIO15_(RxD)
Wire Wire Line
10000 1400 11000 1400
Text Label 11000 1400 2 60 ~ 0
GPIO18_(PCM_CLK)
Wire Wire Line
10000 1600 11000 1600
2000 1900 1250 1900
Text Label 1250 1700 0 60 ~ 0
GPIO17
Text Label 1250 1800 0 60 ~ 0
GPIO21
Text Label 1250 1900 0 60 ~ 0
GPIO22
NoConn ~ 2000 2000
Wire Wire Line
10000 1700 11000 1700
Text Label 11000 1600 2 60 ~ 0
GPIO23
Text Label 11000 1700 2 60 ~ 0
GPIO24
2000 2100 1250 2100
Wire Wire Line
10000 1900 11000 1900
2000 2200 1250 2200
Wire Wire Line
10000 2000 11000 2000
2000 2300 1250 2300
Text Label 1250 2100 0 60 ~ 0
GPIO10(MOSI)
Text Label 1250 2200 0 60 ~ 0
GPIO9(MISO)
Text Label 1250 2300 0 60 ~ 0
GPIO11(SCLK)
NoConn ~ 2000 2400
$Comp
L GND #PWR03
U 1 1 50A55C3F
P 2900 2500
F 0 "#PWR03" H 2900 2500 30 0001 C CNN
F 1 "GND" H 2900 2430 30 0001 C CNN
1 2900 2500
1 0 0 -1
$EndComp
Wire Wire Line
10000 2100 11000 2100
Text Label 11000 1900 2 60 ~ 0
GPIO25
Text Label 11000 2000 2 60 ~ 0
GPIO8_(CE0)
Text Label 11000 2100 2 60 ~ 0
CPIO7_(CE1)
NoConn ~ 10000 1800
NoConn ~ 10000 1500
NoConn ~ 10000 1000
2900 2500 2900 1400
Wire Wire Line
9200 1000 8200 1000
2900 1400 2800 1400
Wire Wire Line
9200 1100 8200 1100
2800 1500 3500 1500
Wire Wire Line
9200 1200 8200 1200
2800 1600 3500 1600
Text Label 3500 1500 2 60 ~ 0
TXD
Text Label 3500 1600 2 60 ~ 0
RXD
Wire Wire Line
9200 1400 8200 1400
2800 1700 3500 1700
Text Label 3500 1700 2 60 ~ 0
GPIO18
NoConn ~ 2800 1800
Wire Wire Line
9200 1500 8200 1500
2800 1900 3500 1900
Wire Wire Line
9200 1600 8200 1600
2800 2000 3500 2000
Text Label 3500 1900 2 60 ~ 0
GPIO23
Text Label 3500 2000 2 60 ~ 0
GPIO24
NoConn ~ 2800 2100
Wire Wire Line
9200 1800 8200 1800
2800 2200 3500 2200
Text Label 3500 2200 2 60 ~ 0
GPIO25
Wire Wire Line
9200 1900 8200 1900
2800 2300 3500 2300
Wire Wire Line
9200 2000 8200 2000
NoConn ~ 9200 2100
NoConn ~ 9200 1700
NoConn ~ 9200 1300
Text Label 8200 1000 0 60 ~ 0
GPIO0_(SDA)
Text Label 8200 1100 0 60 ~ 0
GPIO1_(SCL)
Text Label 8200 1200 0 60 ~ 0
GPIO4_(GPCLK0)
Text Label 8200 1400 0 60 ~ 0
GPIO17
Text Label 8200 1500 0 60 ~ 0
GPIO21_(PCM_DOUT)
Text Label 8200 1600 0 60 ~ 0
GPIO22
Text Label 8200 1800 0 60 ~ 0
GPIO10_(MOSI)
Text Label 8200 1900 0 60 ~ 0
GPIO9_(MISO)
Text Label 8200 2000 0 60 ~ 0
GPIO11_(SCKL)
2800 2400 3500 2400
Text Label 3500 2300 2 60 ~ 0
GPIO8(CE0)
Text Label 3500 2400 2 60 ~ 0
GPIO7(CE1)
$EndSCHEMATC
File mode changed from 100644 to 100755
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment