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Elphel
kicad-source-mirror
Commits
7693e34e
Commit
7693e34e
authored
Oct 19, 2007
by
dickelbeck
Browse files
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Plain Diff
fixed compilation errors with VIA symbols
parent
ab436f0a
Changes
12
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Showing
12 changed files
with
44 additions
and
43 deletions
+44
-43
export_to_pcbnew.cpp
gerbview/export_to_pcbnew.cpp
+3
-3
class_board_item.cpp
pcbnew/class_board_item.cpp
+3
-3
class_track.cpp
pcbnew/class_track.cpp
+7
-6
class_track.h
pcbnew/class_track.h
+5
-5
classpcb.cpp
pcbnew/classpcb.cpp
+4
-4
clean.cpp
pcbnew/clean.cpp
+3
-3
dialog_track_options.cpp
pcbnew/dialog_track_options.cpp
+2
-2
editrack-part2.cpp
pcbnew/editrack-part2.cpp
+2
-2
pcbcfg.h
pcbnew/pcbcfg.h
+4
-4
router.cpp
pcbnew/router.cpp
+2
-2
set_color.h
pcbnew/set_color.h
+8
-8
swap_layers.cpp
pcbnew/swap_layers.cpp
+1
-1
No files found.
gerbview/export_to_pcbnew.cpp
View file @
7693e34e
...
@@ -180,7 +180,7 @@ static int SavePcbFormatAscii( WinEDA_GerberFrame* frame, FILE* File,
...
@@ -180,7 +180,7 @@ static int SavePcbFormatAscii( WinEDA_GerberFrame* frame, FILE* File,
// A spot is found, and can be a via: change it to via, and delete other
// A spot is found, and can be a via: change it to via, and delete other
// spots at same location
// spots at same location
newtrack
->
m_Shape
=
VIA_
NORMALE
;
newtrack
->
m_Shape
=
VIA_
THROUGH
;
newtrack
->
SetLayer
(
0x0F
);
// Layers are 0 to 15 (Cu/Cmp)
newtrack
->
SetLayer
(
0x0F
);
// Layers are 0 to 15 (Cu/Cmp)
...
@@ -205,7 +205,7 @@ static int SavePcbFormatAscii( WinEDA_GerberFrame* frame, FILE* File,
...
@@ -205,7 +205,7 @@ static int SavePcbFormatAscii( WinEDA_GerberFrame* frame, FILE* File,
// delete redundant vias
// delete redundant vias
for
(
track
=
Pcb
->
m_Track
;
track
!=
NULL
;
track
=
track
->
Next
()
)
for
(
track
=
Pcb
->
m_Track
;
track
!=
NULL
;
track
=
track
->
Next
()
)
{
{
if
(
track
->
m_Shape
!=
VIA_
NORMALE
)
if
(
track
->
m_Shape
!=
VIA_
THROUGH
)
continue
;
continue
;
// Search and delete others vias
// Search and delete others vias
...
@@ -213,7 +213,7 @@ static int SavePcbFormatAscii( WinEDA_GerberFrame* frame, FILE* File,
...
@@ -213,7 +213,7 @@ static int SavePcbFormatAscii( WinEDA_GerberFrame* frame, FILE* File,
for
(
;
alt_track
!=
NULL
;
alt_track
=
next_track
)
for
(
;
alt_track
!=
NULL
;
alt_track
=
next_track
)
{
{
next_track
=
alt_track
->
Next
();
next_track
=
alt_track
->
Next
();
if
(
alt_track
->
m_Shape
!=
VIA_
NORMALE
)
if
(
alt_track
->
m_Shape
!=
VIA_
THROUGH
)
continue
;
continue
;
if
(
alt_track
->
m_Start
!=
track
->
m_Start
)
if
(
alt_track
->
m_Start
!=
track
->
m_Start
)
...
...
pcbnew/class_board_item.cpp
View file @
7693e34e
...
@@ -170,9 +170,9 @@ wxString BOARD_ITEM::MenuText( const BOARD* aPcb ) const
...
@@ -170,9 +170,9 @@ wxString BOARD_ITEM::MenuText( const BOARD* aPcb ) const
text
<<
_
(
"Via"
)
<<
wxT
(
" "
)
<<
via
->
ShowWidth
();
text
<<
_
(
"Via"
)
<<
wxT
(
" "
)
<<
via
->
ShowWidth
();
int
shape
=
via
->
Shape
();
int
shape
=
via
->
Shape
();
if
(
shape
==
BURIED_VIA
)
if
(
shape
==
VIA_BURIED
)
text
<<
wxT
(
" "
)
<<
_
(
"Blind"
);
text
<<
wxT
(
" "
)
<<
_
(
"Blind"
);
else
if
(
shape
==
BLIND_VIA
)
else
if
(
shape
==
VIA_BLIND
)
text
<<
wxT
(
" "
)
<<
_
(
"Buried"
);
text
<<
wxT
(
" "
)
<<
_
(
"Buried"
);
// else say nothing about normal vias
// else say nothing about normal vias
...
@@ -182,7 +182,7 @@ wxString BOARD_ITEM::MenuText( const BOARD* aPcb ) const
...
@@ -182,7 +182,7 @@ wxString BOARD_ITEM::MenuText( const BOARD* aPcb ) const
text
<<
wxT
(
" ["
)
<<
net
->
m_Netname
<<
wxT
(
"]"
);
text
<<
wxT
(
" ["
)
<<
net
->
m_Netname
<<
wxT
(
"]"
);
}
}
if
(
shape
!=
THROUGH_VIA
)
if
(
shape
!=
VIA_THROUGH
)
{
{
// say which layers, only two for now
// say which layers, only two for now
int
topLayer
;
int
topLayer
;
...
...
pcbnew/class_track.cpp
View file @
7693e34e
...
@@ -8,6 +8,7 @@
...
@@ -8,6 +8,7 @@
#include "common.h"
#include "common.h"
#include "pcbnew.h"
#include "pcbnew.h"
#ifdef CVPCB
#ifdef CVPCB
#include "cvpcb.h"
#include "cvpcb.h"
#endif
#endif
...
@@ -264,10 +265,10 @@ int TRACK::ReturnMaskLayer()
...
@@ -264,10 +265,10 @@ int TRACK::ReturnMaskLayer()
{
{
int
via_type
=
Shape
();
int
via_type
=
Shape
();
if
(
via_type
==
THROUGH_VIA
)
if
(
via_type
==
VIA_THROUGH
)
return
ALL_CU_LAYERS
;
return
ALL_CU_LAYERS
;
//
BLIND_VIA ou BURIED_VIA
:
//
VIA_BLIND ou VIA_BURIED
:
int
bottom_layer
,
top_layer
;
int
bottom_layer
,
top_layer
;
...
@@ -302,7 +303,7 @@ void SEGVIA::SetLayerPair( int top_layer, int bottom_layer )
...
@@ -302,7 +303,7 @@ void SEGVIA::SetLayerPair( int top_layer, int bottom_layer )
{
{
int
via_type
=
Shape
();
int
via_type
=
Shape
();
if
(
via_type
==
THROUGH_VIA
)
if
(
via_type
==
VIA_THROUGH
)
{
{
top_layer
=
LAYER_CMP_N
;
top_layer
=
LAYER_CMP_N
;
bottom_layer
=
COPPER_LAYER_N
;
bottom_layer
=
COPPER_LAYER_N
;
...
@@ -903,15 +904,15 @@ void SEGVIA::Show( int nestLevel, std::ostream& os )
...
@@ -903,15 +904,15 @@ void SEGVIA::Show( int nestLevel, std::ostream& os )
switch
(
Shape
()
)
switch
(
Shape
()
)
{
{
case
THROUGH_VIA
:
case
VIA_THROUGH
:
cp
=
"through"
;
cp
=
"through"
;
break
;
break
;
case
BURIED_VIA
:
case
VIA_BURIED
:
cp
=
"blind"
;
cp
=
"blind"
;
break
;
break
;
case
BLIND_VIA
:
case
VIA_BLIND
:
cp
=
"buried"
;
cp
=
"buried"
;
break
;
break
;
...
...
pcbnew/class_track.h
View file @
7693e34e
...
@@ -9,11 +9,11 @@
...
@@ -9,11 +9,11 @@
// Via attributes (m_Shape parmeter)
// Via attributes (m_Shape parmeter)
#define
THROUGH_VIA
3
/* Always a through hole via */
#define
VIA_THROUGH
3
/* Always a through hole via */
#define
BURIED_VIA
2
/* this via can be on internal layers */
#define
VIA_BURIED
2
/* this via can be on internal layers */
#define
BLIND_VIA
1
/* this via which connect from internal layers to an external layer */
#define
VIA_BLIND
1
/* this via which connect from internal layers to an external layer */
#define
NOT_DEFINED_VIA
0
/* reserved (unused) */
#define
VIA_NOT_DEFINED
0
/* reserved (unused) */
#define
SQUARE_VIA
_SHAPE 0x80000000
/* Flag pour forme carree */
#define
VIA_SQUARE
_SHAPE 0x80000000
/* Flag pour forme carree */
/***/
/***/
...
...
pcbnew/classpcb.cpp
View file @
7693e34e
...
@@ -433,7 +433,7 @@ EDA_BoardDesignSettings::EDA_BoardDesignSettings()
...
@@ -433,7 +433,7 @@ EDA_BoardDesignSettings::EDA_BoardDesignSettings()
m_CopperLayerCount
=
2
;
// Default design is a double sided board
m_CopperLayerCount
=
2
;
// Default design is a double sided board
m_ViaDrill
=
250
;
// via drill (for the entire board)
m_ViaDrill
=
250
;
// via drill (for the entire board)
m_CurrentViaSize
=
450
;
// Current via size
m_CurrentViaSize
=
450
;
// Current via size
m_CurrentViaType
=
THROUGH_VIA
;
/* via type (BLIND, TROUGHT ...), bits 1 and 2 (not 0 and 1)*/
m_CurrentViaType
=
VIA_THROUGH
;
/* via type (BLIND, TROUGHT ...), bits 1 and 2 (not 0 and 1)*/
m_CurrentTrackWidth
=
170
;
// current track width
m_CurrentTrackWidth
=
170
;
// current track width
for
(
ii
=
0
;
ii
<
HIST0RY_NUMBER
;
ii
++
)
for
(
ii
=
0
;
ii
<
HIST0RY_NUMBER
;
ii
++
)
{
{
...
@@ -454,9 +454,9 @@ EDA_BoardDesignSettings::EDA_BoardDesignSettings()
...
@@ -454,9 +454,9 @@ EDA_BoardDesignSettings::EDA_BoardDesignSettings()
m_LayerColor
[
ii
]
=
default_layer_color
[
ii
];
m_LayerColor
[
ii
]
=
default_layer_color
[
ii
];
// Layer colors (tracks and graphic items)
// Layer colors (tracks and graphic items)
m_ViaColor
[
BLIND_VIA
]
=
CYAN
;
m_ViaColor
[
VIA_BLIND
]
=
CYAN
;
m_ViaColor
[
BURIED_VIA
]
=
BROWN
;
m_ViaColor
[
VIA_BURIED
]
=
BROWN
;
m_ViaColor
[
THROUGH_VIA
]
=
WHITE
;
m_ViaColor
[
VIA_THROUGH
]
=
WHITE
;
m_ModuleTextCMPColor
=
LIGHTGRAY
;
// Text module color for modules on the COMPONENT layer
m_ModuleTextCMPColor
=
LIGHTGRAY
;
// Text module color for modules on the COMPONENT layer
m_ModuleTextCUColor
=
MAGENTA
;
// Text module color for modules on the COPPER layer
m_ModuleTextCUColor
=
MAGENTA
;
// Text module color for modules on the COPPER layer
m_ModuleTextNOVColor
=
DARKGRAY
;
// Text module color for "invisible" texts (must be BLACK if really not displayed)
m_ModuleTextNOVColor
=
DARKGRAY
;
// Text module color for "invisible" texts (must be BLACK if really not displayed)
...
...
pcbnew/clean.cpp
View file @
7693e34e
...
@@ -81,7 +81,7 @@ void Clean_Pcb_Items( WinEDA_PcbFrame* frame, wxDC* DC )
...
@@ -81,7 +81,7 @@ void Clean_Pcb_Items( WinEDA_PcbFrame* frame, wxDC* DC )
TRACK
*
next_track
;
TRACK
*
next_track
;
for
(
track
=
frame
->
m_Pcb
->
m_Track
;
track
!=
NULL
;
track
=
track
->
Next
()
)
for
(
track
=
frame
->
m_Pcb
->
m_Track
;
track
!=
NULL
;
track
=
track
->
Next
()
)
{
{
if
(
track
->
m_Shape
!=
THROUGH_VIA
)
if
(
track
->
m_Shape
!=
VIA_THROUGH
)
continue
;
continue
;
/* Search and delete others vias at same location */
/* Search and delete others vias at same location */
...
@@ -89,7 +89,7 @@ void Clean_Pcb_Items( WinEDA_PcbFrame* frame, wxDC* DC )
...
@@ -89,7 +89,7 @@ void Clean_Pcb_Items( WinEDA_PcbFrame* frame, wxDC* DC )
for
(
;
alt_track
!=
NULL
;
alt_track
=
next_track
)
for
(
;
alt_track
!=
NULL
;
alt_track
=
next_track
)
{
{
next_track
=
alt_track
->
Next
();
next_track
=
alt_track
->
Next
();
if
(
alt_track
->
m_Shape
!=
THROUGH_VIA
)
if
(
alt_track
->
m_Shape
!=
VIA_THROUGH
)
continue
;
continue
;
if
(
alt_track
->
m_Start
!=
track
->
m_Start
)
if
(
alt_track
->
m_Start
!=
track
->
m_Start
)
...
@@ -105,7 +105,7 @@ void Clean_Pcb_Items( WinEDA_PcbFrame* frame, wxDC* DC )
...
@@ -105,7 +105,7 @@ void Clean_Pcb_Items( WinEDA_PcbFrame* frame, wxDC* DC )
for
(
track
=
frame
->
m_Pcb
->
m_Track
;
track
!=
NULL
;
track
=
next_track
)
for
(
track
=
frame
->
m_Pcb
->
m_Track
;
track
!=
NULL
;
track
=
next_track
)
{
{
next_track
=
track
->
Next
();
next_track
=
track
->
Next
();
if
(
track
->
m_Shape
!=
THROUGH_VIA
)
if
(
track
->
m_Shape
!=
VIA_THROUGH
)
continue
;
continue
;
D_PAD
*
pad
=
Fast_Locate_Pad_Connecte
(
frame
->
m_Pcb
,
track
->
m_Start
,
ALL_CU_LAYERS
);
D_PAD
*
pad
=
Fast_Locate_Pad_Connecte
(
frame
->
m_Pcb
,
track
->
m_Start
,
ALL_CU_LAYERS
);
...
...
pcbnew/dialog_track_options.cpp
View file @
7693e34e
...
@@ -251,11 +251,11 @@ void WinEDA_PcbTracksDialog::AcceptPcbOptions(wxCommandEvent& event)
...
@@ -251,11 +251,11 @@ void WinEDA_PcbTracksDialog::AcceptPcbOptions(wxCommandEvent& event)
/*******************************************************************/
/*******************************************************************/
{
{
g_DesignSettings
.
m_CurrentViaType
=
m_OptViaType
->
GetSelection
()
+
1
;
g_DesignSettings
.
m_CurrentViaType
=
m_OptViaType
->
GetSelection
()
+
1
;
if
(
g_DesignSettings
.
m_CurrentViaType
!=
THROUGH_VIA
)
if
(
g_DesignSettings
.
m_CurrentViaType
!=
VIA_THROUGH
)
{
{
if
(
!
IsOK
(
this
,
if
(
!
IsOK
(
this
,
_
(
"You have selected VIA Blind or VIA Buried
\n
WARNING: this feature is EXPERIMENTAL!!! Accept ?"
)
)
)
_
(
"You have selected VIA Blind or VIA Buried
\n
WARNING: this feature is EXPERIMENTAL!!! Accept ?"
)
)
)
g_DesignSettings
.
m_CurrentViaType
=
THROUGH_VIA
;
g_DesignSettings
.
m_CurrentViaType
=
VIA_THROUGH
;
}
}
g_DesignSettings
.
m_CurrentViaSize
=
g_DesignSettings
.
m_CurrentViaSize
=
...
...
pcbnew/editrack-part2.cpp
View file @
7693e34e
...
@@ -231,12 +231,12 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC )
...
@@ -231,12 +231,12 @@ void WinEDA_PcbFrame::Other_Layer_Route( TRACK* track, wxDC* DC )
GetScreen
()
->
m_Active_Layer
=
GetScreen
()
->
m_Route_Layer_BOTTOM
;
GetScreen
()
->
m_Active_Layer
=
GetScreen
()
->
m_Route_Layer_BOTTOM
;
/* Adjust the via layer pair */
/* Adjust the via layer pair */
if
(
Via
->
Shape
()
==
BURIED_VIA
)
if
(
Via
->
Shape
()
==
VIA_BURIED
)
{
{
Via
->
SetLayerPair
(
old_layer
,
GetScreen
()
->
m_Active_Layer
);
Via
->
SetLayerPair
(
old_layer
,
GetScreen
()
->
m_Active_Layer
);
}
}
else
if
(
Via
->
Shape
()
==
BLIND_VIA
)
//blind via
else
if
(
Via
->
Shape
()
==
VIA_BLIND
)
//blind via
{
{
// A revoir! ( la via devrait deboucher sur 1 cote )
// A revoir! ( la via devrait deboucher sur 1 cote )
Via
->
SetLayerPair
(
old_layer
,
GetScreen
()
->
m_Active_Layer
);
Via
->
SetLayerPair
(
old_layer
,
GetScreen
()
->
m_Active_Layer
);
...
...
pcbnew/pcbcfg.h
View file @
7693e34e
...
@@ -140,7 +140,7 @@ static PARAM_CFG_INT TypeViaCfg
...
@@ -140,7 +140,7 @@ static PARAM_CFG_INT TypeViaCfg
(
(
wxT
(
"TypeVia"
),
/* Keyword */
wxT
(
"TypeVia"
),
/* Keyword */
&
g_DesignSettings
.
m_CurrentViaType
,
/* Parameter address */
&
g_DesignSettings
.
m_CurrentViaType
,
/* Parameter address */
VIA_
NORMALE
,
/* Default value */
VIA_
THROUGH
,
/* Default value */
0
,
3
/* Valeurs extremes */
0
,
3
/* Valeurs extremes */
);
);
...
@@ -586,7 +586,7 @@ static PARAM_CFG_SETCOLOR ColorViaNormCfg
...
@@ -586,7 +586,7 @@ static PARAM_CFG_SETCOLOR ColorViaNormCfg
(
(
INSETUP
,
INSETUP
,
wxT
(
"CoViaNo"
),
/* Keyword */
wxT
(
"CoViaNo"
),
/* Keyword */
&
g_DesignSettings
.
m_ViaColor
[
VIA_
NORMALE
],
/* Parameter address */
&
g_DesignSettings
.
m_ViaColor
[
VIA_
THROUGH
],
/* Parameter address */
LIGHTGRAY
/* Default value */
LIGHTGRAY
/* Default value */
);
);
...
@@ -594,7 +594,7 @@ static PARAM_CFG_SETCOLOR ColorViaborgneCfg
...
@@ -594,7 +594,7 @@ static PARAM_CFG_SETCOLOR ColorViaborgneCfg
(
(
INSETUP
,
INSETUP
,
wxT
(
"CoViaBo"
),
/* Keyword */
wxT
(
"CoViaBo"
),
/* Keyword */
&
g_DesignSettings
.
m_ViaColor
[
VIA_B
ORGNE
],
/* Parameter address */
&
g_DesignSettings
.
m_ViaColor
[
VIA_B
URIED
],
/* Parameter address */
CYAN
/* Default value */
CYAN
/* Default value */
);
);
...
@@ -602,7 +602,7 @@ static PARAM_CFG_SETCOLOR ColorViaEnterreeCfg // Buried Via Color
...
@@ -602,7 +602,7 @@ static PARAM_CFG_SETCOLOR ColorViaEnterreeCfg // Buried Via Color
(
(
INSETUP
,
INSETUP
,
wxT
(
"CoViaEn"
),
/* Keyword */
wxT
(
"CoViaEn"
),
/* Keyword */
&
g_DesignSettings
.
m_ViaColor
[
VIA_
ENTERREE
],
/* Parameter address */
&
g_DesignSettings
.
m_ViaColor
[
VIA_
BLIND
],
/* Parameter address */
BROWN
/* Default value */
BROWN
/* Default value */
);
);
...
...
pcbnew/router.cpp
View file @
7693e34e
...
@@ -604,9 +604,9 @@ void WinEDA_PcbFrame::ReadAutoroutedTracks( wxDC* DC )
...
@@ -604,9 +604,9 @@ void WinEDA_PcbFrame::ReadAutoroutedTracks( wxDC* DC )
NewVia
->
m_Width
=
via_size
;
NewVia
->
m_Width
=
via_size
;
NewVia
->
SetLayer
(
via_layer1
+
(
via_layer2
<<
4
)
);
NewVia
->
SetLayer
(
via_layer1
+
(
via_layer2
<<
4
)
);
if
(
NewVia
->
GetLayer
()
==
0x0F
||
NewVia
->
GetLayer
()
==
0xF0
)
if
(
NewVia
->
GetLayer
()
==
0x0F
||
NewVia
->
GetLayer
()
==
0xF0
)
NewVia
->
m_Shape
=
THROUGH_VIA
;
NewVia
->
m_Shape
=
VIA_THROUGH
;
else
else
NewVia
->
m_Shape
=
BURIED_VIA
;
NewVia
->
m_Shape
=
VIA_BURIED
;
NewVia
->
Insert
(
m_Pcb
,
NULL
);
NewVia
->
Insert
(
m_Pcb
,
NULL
);
NbTrack
++
;
NbTrack
++
;
...
...
pcbnew/set_color.h
View file @
7693e34e
...
@@ -249,27 +249,27 @@ static ColorButton Msg_Others_Items =
...
@@ -249,27 +249,27 @@ static ColorButton Msg_Others_Items =
wxT
(
"Others"
),
-
1
// Title
wxT
(
"Others"
),
-
1
// Title
};
};
static
ColorButton
V
ia_Normale
_Butt
=
static
ColorButton
V
IA_THROUGH
_Butt
=
{
{
wxT
(
"*"
),
wxT
(
"*"
),
VIA_
NORMALE
,
// Layer
VIA_
THROUGH
,
// Layer
&
g_DesignSettings
.
m_ViaColor
[
VIA_
NORMALE
],
// Address of optional parameter
&
g_DesignSettings
.
m_ViaColor
[
VIA_
THROUGH
],
// Address of optional parameter
TRUE
// Toggle ITEM_NOT_SHOW bit of the color variable
TRUE
// Toggle ITEM_NOT_SHOW bit of the color variable
};
};
static
ColorButton
Via_Aveugle_Butt
=
static
ColorButton
Via_Aveugle_Butt
=
{
{
wxT
(
"*"
),
wxT
(
"*"
),
VIA_
ENTERREE
,
// Layer
VIA_
BLIND
,
// Layer
&
g_DesignSettings
.
m_ViaColor
[
VIA_
ENTERREE
],
// Address of optional parameter
&
g_DesignSettings
.
m_ViaColor
[
VIA_
BLIND
],
// Address of optional parameter
TRUE
// Toggle ITEM_NOT_SHOW bit of the color variable
TRUE
// Toggle ITEM_NOT_SHOW bit of the color variable
};
};
static
ColorButton
Via_Borgne_Butt
=
static
ColorButton
Via_Borgne_Butt
=
{
{
wxT
(
"*"
),
wxT
(
"*"
),
VIA_B
ORGNE
,
// Layer
VIA_B
URIED
,
// Layer
&
g_DesignSettings
.
m_ViaColor
[
VIA_B
ORGNE
],
// Address of optional parameter
&
g_DesignSettings
.
m_ViaColor
[
VIA_B
URIED
],
// Address of optional parameter
TRUE
// Toggle ITEM_NOT_SHOW bit of the color variable
TRUE
// Toggle ITEM_NOT_SHOW bit of the color variable
};
};
...
@@ -414,7 +414,7 @@ static ColorButton* laytool_list[] = {
...
@@ -414,7 +414,7 @@ static ColorButton* laytool_list[] = {
// &Layer_32_Butt,
// &Layer_32_Butt,
&
Msg_Others_Items
,
&
Msg_Others_Items
,
&
V
ia_Normale
_Butt
,
&
V
IA_THROUGH
_Butt
,
&
Via_Aveugle_Butt
,
&
Via_Aveugle_Butt
,
&
Via_Borgne_Butt
,
&
Via_Borgne_Butt
,
&
Ratsnest_Butt
,
&
Ratsnest_Butt
,
...
...
pcbnew/swap_layers.cpp
View file @
7693e34e
...
@@ -218,7 +218,7 @@ void WinEDA_PcbFrame::Swap_Layers( wxCommandEvent& event )
...
@@ -218,7 +218,7 @@ void WinEDA_PcbFrame::Swap_Layers( wxCommandEvent& event )
if
(
pt_segm
->
Type
()
==
TYPEVIA
)
if
(
pt_segm
->
Type
()
==
TYPEVIA
)
{
{
SEGVIA
*
Via
=
(
SEGVIA
*
)
pt_segm
;
SEGVIA
*
Via
=
(
SEGVIA
*
)
pt_segm
;
if
(
Via
->
Shape
()
==
THROUGH_VIA
)
if
(
Via
->
Shape
()
==
VIA_THROUGH
)
continue
;
continue
;
int
top_layer
,
bottom_layer
;
int
top_layer
,
bottom_layer
;
Via
->
ReturnLayerPair
(
&
top_layer
,
&
bottom_layer
);
Via
->
ReturnLayerPair
(
&
top_layer
,
&
bottom_layer
);
...
...
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