Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
K
kicad-source-mirror
Project
Project
Details
Activity
Releases
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Commits
Open sidebar
Elphel
kicad-source-mirror
Commits
4121c272
Commit
4121c272
authored
Jun 06, 2014
by
Tomasz Wlostowski
Committed by
Maciej Suminski
Jun 06, 2014
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Clang-alike lightweight RTTI for pcbnew + type casting cleanup.
parent
7a110d0c
Changes
19
Hide whitespace changes
Inline
Side-by-side
Showing
19 changed files
with
297 additions
and
168 deletions
+297
-168
base_struct.h
include/base_struct.h
+13
-4
typeinfo.h
include/core/typeinfo.h
+180
-0
sch_item_struct.h
include/sch_item_struct.h
+2
-0
view_item.h
include/view/view_item.h
+0
-109
class_board.h
pcbnew/class_board.h
+4
-0
class_board_connected_item.h
pcbnew/class_board_connected_item.h
+15
-0
class_edge_mod.h
pcbnew/class_edge_mod.h
+5
-0
class_module.cpp
pcbnew/class_module.cpp
+2
-1
class_module.h
pcbnew/class_module.h
+5
-0
class_text_mod.h
pcbnew/class_text_mod.h
+17
-13
class_track.h
pcbnew/class_track.h
+20
-12
clean.cpp
pcbnew/clean.cpp
+3
-2
edgemod.cpp
pcbnew/edgemod.cpp
+3
-2
editrack.cpp
pcbnew/editrack.cpp
+1
-1
kicad_plugin.cpp
pcbnew/kicad_plugin.cpp
+1
-1
librairi.cpp
pcbnew/librairi.cpp
+1
-1
pcb_painter.cpp
pcbnew/pcb_painter.cpp
+18
-16
plot_board_layers.cpp
pcbnew/plot_board_layers.cpp
+3
-3
plot_brditems_plotter.cpp
pcbnew/plot_brditems_plotter.cpp
+4
-3
No files found.
include/base_struct.h
View file @
4121c272
...
...
@@ -32,13 +32,13 @@
#ifndef BASE_STRUCT_H_
#define BASE_STRUCT_H_
#include <core/typeinfo.h>
#include <colors.h>
#include <bitmaps.h>
#include <richio.h>
#include <view/view_item.h>
#include <boost/ptr_container/ptr_vector.hpp>
#if defined(DEBUG)
#include <iostream> // needed for Show()
extern
std
::
ostream
&
operator
<<
(
std
::
ostream
&
out
,
const
wxSize
&
size
);
...
...
@@ -369,8 +369,17 @@ public:
EDA_ITEM
(
const
EDA_ITEM
&
base
);
virtual
~
EDA_ITEM
()
{
};
/// @copydoc VIEW_ITEM::Type()
KICAD_T
Type
()
const
{
return
m_StructType
;
}
/**
* Function Type()
*
* returns the type of object. This attribute should never be changed
* after a constructor sets it, so there is no public "setter" method.
* @return KICAD_T - the type of object.
*/
inline
KICAD_T
Type
()
const
{
return
m_StructType
;
}
void
SetTimeStamp
(
time_t
aNewTimeStamp
)
{
m_TimeStamp
=
aNewTimeStamp
;
}
time_t
GetTimeStamp
()
const
{
return
m_TimeStamp
;
}
...
...
include/core/typeinfo.h
0 → 100644
View file @
4121c272
/*
* This program source code file is part of KiCad, a free EDA CAD application.
*
* Copyright (C) 2014 CERN
* Copyright (C) 2004-2013 KiCad Developers, see change_log.txt for contributors.
* @author Tomasz Wlostowski <tomasz.wlostowski@cern.ch>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, you may find one here:
* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
* or you may search the http://www.gnu.org website for the version 2 license,
* or you may write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
#ifndef __KICAD_TYPEINFO_H
#define __KICAD_TYPEINFO_H
#include <cstdio>
class
EDA_ITEM
;
/**
* Enum KICAD_T
* is the set of class identification values, stored in EDA_ITEM::m_StructType
*/
enum
KICAD_T
{
NOT_USED
=
-
1
,
///< the 3d code uses this value
EOT
=
0
,
///< search types array terminator (End Of Types)
TYPE_NOT_INIT
=
0
,
PCB_T
,
SCREEN_T
,
///< not really an item, used to identify a screen
// Items in pcb
PCB_MODULE_T
,
///< class MODULE, a footprint
PCB_PAD_T
,
///< class D_PAD, a pad in a footprint
PCB_LINE_T
,
///< class DRAWSEGMENT, a segment not on copper layers
PCB_TEXT_T
,
///< class TEXTE_PCB, text on a layer
PCB_MODULE_TEXT_T
,
///< class TEXTE_MODULE, text in a footprint
PCB_MODULE_EDGE_T
,
///< class EDGE_MODULE, a footprint edge
PCB_TRACE_T
,
///< class TRACK, a track segment (segment on a copper layer)
PCB_VIA_T
,
///< class VIA, a via (like a track segment on a copper layer)
PCB_ZONE_T
,
///< class SEGZONE, a segment used to fill a zone area (segment on a
///< copper layer)
PCB_MARKER_T
,
///< class MARKER_PCB, a marker used to show something
PCB_DIMENSION_T
,
///< class DIMENSION, a dimension (graphic item)
PCB_TARGET_T
,
///< class PCB_TARGET, a target (graphic item)
PCB_ZONE_AREA_T
,
///< class ZONE_CONTAINER, a zone area
PCB_ITEM_LIST_T
,
///< class BOARD_ITEM_LIST, a list of board items
// Schematic draw Items. The order of these items effects the sort order.
// It is currently ordered to mimic the old Eeschema locate behavior where
// the smallest item is the selected item.
SCH_MARKER_T
,
SCH_JUNCTION_T
,
SCH_NO_CONNECT_T
,
SCH_BUS_WIRE_ENTRY_T
,
SCH_BUS_BUS_ENTRY_T
,
SCH_LINE_T
,
SCH_BITMAP_T
,
SCH_TEXT_T
,
SCH_LABEL_T
,
SCH_GLOBAL_LABEL_T
,
SCH_HIERARCHICAL_LABEL_T
,
SCH_FIELD_T
,
SCH_COMPONENT_T
,
SCH_SHEET_PIN_T
,
SCH_SHEET_T
,
// Be prudent with these 3 types:
// they should be used only to locate a specific field type
// among SCH_FIELD_T items types
SCH_FIELD_LOCATE_REFERENCE_T
,
SCH_FIELD_LOCATE_VALUE_T
,
SCH_FIELD_LOCATE_FOOTPRINT_T
,
// General
SCH_SCREEN_T
,
/*
* Draw items in library component.
*
* The order of these items effects the sort order for items inside the
* "DRAW/ENDDRAW" section of the component definition in a library file.
* If you add a new draw item, type, please make sure you add it so the
* sort order is logical.
*/
LIB_COMPONENT_T
,
LIB_ALIAS_T
,
LIB_ARC_T
,
LIB_CIRCLE_T
,
LIB_TEXT_T
,
LIB_RECTANGLE_T
,
LIB_POLYLINE_T
,
LIB_BEZIER_T
,
LIB_PIN_T
,
/*
* Fields are not saved inside the "DRAW/ENDDRAW". Add new draw item
* types before this line.
*/
LIB_FIELD_T
,
/*
* For GerbView: items type:
*/
TYPE_GERBER_DRAW_ITEM
,
/*
* for Pl_Editor, in undo/redo commands
*/
TYPE_PL_EDITOR_LAYOUT
,
// End value
MAX_STRUCT_TYPE_ID
};
template
<
typename
T
>
struct
remove_pointer
{
typedef
T
type
;
};
template
<
typename
T
>
struct
remove_pointer
<
T
*>
{
typedef
typename
remove_pointer
<
T
>::
type
type
;
};
/**
* Function IsA()
*
* Checks if the type of aObject is T.
* @param aObject object for type check
* @return true, if aObject type equals T.
*/
template
<
class
T
,
class
I
>
bool
IsA
(
const
I
*
aObject
)
{
return
remove_pointer
<
T
>::
type
::
ClassOf
(
aObject
);
}
template
<
class
T
,
class
I
>
bool
IsA
(
const
I
&
aObject
)
{
return
remove_pointer
<
T
>::
type
::
ClassOf
(
&
aObject
);
}
/**
* Function dyn_cast()
*
* A lightweight dynamic downcast. Casts aObject to type Casted*.
* Uses EDA_ITEM::Type() and EDA_ITEM::ClassOf() to check if type matches.
* @param aObject object to be casted
* @return down-casted object or NULL if type doesn't match Casted.
*/
template
<
class
Casted
,
class
From
>
Casted
dyn_cast
(
From
aObject
)
{
if
(
remove_pointer
<
Casted
>::
type
::
ClassOf
(
aObject
)
)
return
static_cast
<
Casted
>
(
aObject
);
return
NULL
;
}
#endif // __KICAD_TYPEINFO_H
include/sch_item_struct.h
View file @
4121c272
...
...
@@ -34,6 +34,8 @@
#include <class_base_screen.h>
#include <general.h>
#include <boost/ptr_container/ptr_vector.hpp>
class
SCH_ITEM
;
class
SCH_SHEET_PATH
;
class
LINE_READER
;
...
...
include/view/view_item.h
View file @
4121c272
...
...
@@ -36,104 +36,6 @@
#include <view/view.h>
#include <gal/definitions.h>
/**
* Enum KICAD_T
* is the set of class identification values, stored in EDA_ITEM::m_StructType
*/
enum
KICAD_T
{
NOT_USED
=
-
1
,
///< the 3d code uses this value
EOT
=
0
,
///< search types array terminator (End Of Types)
TYPE_NOT_INIT
=
0
,
PCB_T
,
SCREEN_T
,
///< not really an item, used to identify a screen
// Items in pcb
PCB_MODULE_T
,
///< class MODULE, a footprint
PCB_PAD_T
,
///< class D_PAD, a pad in a footprint
PCB_LINE_T
,
///< class DRAWSEGMENT, a segment not on copper layers
PCB_TEXT_T
,
///< class TEXTE_PCB, text on a layer
PCB_MODULE_TEXT_T
,
///< class TEXTE_MODULE, text in a footprint
PCB_MODULE_EDGE_T
,
///< class EDGE_MODULE, a footprint edge
PCB_TRACE_T
,
///< class TRACK, a track segment (segment on a copper layer)
PCB_VIA_T
,
///< class VIA, a via (like a track segment on a copper layer)
PCB_ZONE_T
,
///< class SEGZONE, a segment used to fill a zone area (segment on a
///< copper layer)
PCB_MARKER_T
,
///< class MARKER_PCB, a marker used to show something
PCB_DIMENSION_T
,
///< class DIMENSION, a dimension (graphic item)
PCB_TARGET_T
,
///< class PCB_TARGET, a target (graphic item)
PCB_ZONE_AREA_T
,
///< class ZONE_CONTAINER, a zone area
PCB_ITEM_LIST_T
,
///< class BOARD_ITEM_LIST, a list of board items
// Schematic draw Items. The order of these items effects the sort order.
// It is currently ordered to mimic the old Eeschema locate behavior where
// the smallest item is the selected item.
SCH_MARKER_T
,
SCH_JUNCTION_T
,
SCH_NO_CONNECT_T
,
SCH_BUS_WIRE_ENTRY_T
,
SCH_BUS_BUS_ENTRY_T
,
SCH_LINE_T
,
SCH_BITMAP_T
,
SCH_TEXT_T
,
SCH_LABEL_T
,
SCH_GLOBAL_LABEL_T
,
SCH_HIERARCHICAL_LABEL_T
,
SCH_FIELD_T
,
SCH_COMPONENT_T
,
SCH_SHEET_PIN_T
,
SCH_SHEET_T
,
// Be prudent with these 3 types:
// they should be used only to locate a specific field type
// among SCH_FIELD_T items types
SCH_FIELD_LOCATE_REFERENCE_T
,
SCH_FIELD_LOCATE_VALUE_T
,
SCH_FIELD_LOCATE_FOOTPRINT_T
,
// General
SCH_SCREEN_T
,
/*
* Draw items in library component.
*
* The order of these items effects the sort order for items inside the
* "DRAW/ENDDRAW" section of the component definition in a library file.
* If you add a new draw item, type, please make sure you add it so the
* sort order is logical.
*/
LIB_COMPONENT_T
,
LIB_ALIAS_T
,
LIB_ARC_T
,
LIB_CIRCLE_T
,
LIB_TEXT_T
,
LIB_RECTANGLE_T
,
LIB_POLYLINE_T
,
LIB_BEZIER_T
,
LIB_PIN_T
,
/*
* Fields are not saved inside the "DRAW/ENDDRAW". Add new draw item
* types before this line.
*/
LIB_FIELD_T
,
/*
* For GerbView: items type:
*/
TYPE_GERBER_DRAW_ITEM
,
/*
* for Pl_Editor, in undo/redo commands
*/
TYPE_PL_EDITOR_LAYOUT
,
// End value
MAX_STRUCT_TYPE_ID
};
namespace
KIGFX
{
...
...
@@ -186,17 +88,6 @@ public:
delete
[]
m_groups
;
}
/**
* Function Type
* returns the type of object. This attribute should never be changed
* after a constructor sets it, so there is no public "setter" method.
* @return KICAD_T - the type of object.
*/
virtual
KICAD_T
Type
()
const
{
return
NOT_USED
;
}
/**
* Function ViewBBox()
* returns the bounding box of the item covering all its layers.
...
...
pcbnew/class_board.h
View file @
4121c272
...
...
@@ -220,6 +220,10 @@ private:
void
chainMarkedSegments
(
wxPoint
aPosition
,
LAYER_MSK
aLayerMask
,
TRACK_PTRS
*
aList
);
public
:
static
inline
bool
ClassOf
(
const
EDA_ITEM
*
aItem
)
{
return
PCB_T
==
aItem
->
Type
();
}
void
SetFileName
(
const
wxString
&
aFileName
)
{
m_fileName
=
aFileName
;
}
...
...
pcbnew/class_board_connected_item.h
View file @
4121c272
...
...
@@ -58,6 +58,21 @@ public:
BOARD_CONNECTED_ITEM
(
const
BOARD_CONNECTED_ITEM
&
aItem
);
static
inline
bool
ClassOf
(
const
EDA_ITEM
*
aItem
)
{
switch
(
aItem
->
Type
()
)
{
case
PCB_PAD_T
:
case
PCB_TRACE_T
:
case
PCB_VIA_T
:
case
PCB_ZONE_AREA_T
:
return
true
;
default:
return
false
;
}
}
///> @copydoc BOARD_ITEM::IsConnected()
bool
IsConnected
()
const
{
...
...
pcbnew/class_edge_mod.h
View file @
4121c272
...
...
@@ -54,6 +54,11 @@ public:
/// skip the linked list stuff, and parent
const
EDGE_MODULE
&
operator
=
(
const
EDGE_MODULE
&
rhs
);
static
inline
bool
ClassOf
(
const
EDA_ITEM
*
aItem
)
{
return
PCB_MODULE_EDGE_T
==
aItem
->
Type
();
}
void
Copy
(
EDGE_MODULE
*
source
);
// copy structure
void
SetStart0
(
const
wxPoint
&
aPoint
)
{
m_Start0
=
aPoint
;
}
...
...
pcbnew/class_module.cpp
View file @
4121c272
...
...
@@ -424,7 +424,8 @@ EDA_RECT MODULE::GetFootprintRect() const
for
(
const
BOARD_ITEM
*
item
=
m_Drawings
.
GetFirst
();
item
;
item
=
item
->
Next
()
)
{
const
EDGE_MODULE
*
edge
=
dynamic_cast
<
const
EDGE_MODULE
*>
(
item
);
const
EDGE_MODULE
*
edge
=
dyn_cast
<
const
EDGE_MODULE
*>
(
item
);
if
(
edge
)
area
.
Merge
(
edge
->
GetBoundingBox
()
);
}
...
...
pcbnew/class_module.h
View file @
4121c272
...
...
@@ -77,6 +77,11 @@ public:
~
MODULE
();
static
inline
bool
ClassOf
(
const
EDA_ITEM
*
aItem
)
{
return
PCB_MODULE_T
==
aItem
->
Type
();
}
MODULE
*
Next
()
const
{
return
static_cast
<
MODULE
*>
(
Pnext
);
}
MODULE
*
Back
()
const
{
return
static_cast
<
MODULE
*>
(
Pback
);
}
...
...
pcbnew/class_text_mod.h
View file @
4121c272
...
...
@@ -60,25 +60,18 @@ public:
TEXT_is_DIVERS
=
2
};
private
:
/* Note: orientation in 1/10 deg relative to the footprint
* Physical orient is m_Orient + m_Parent->m_Orient
*/
TEXT_TYPE
m_Type
;
///< 0=ref, 1=val, etc.
bool
m_NoShow
;
///< true = invisible
wxPoint
m_Pos0
;
///< text coordinates relatives to the footprint anchor, orient 0.
///< text coordinate ref point is the text centre
public
:
TEXTE_MODULE
(
MODULE
*
parent
,
TEXT_TYPE
text_type
=
TEXT_is_DIVERS
);
// Do not create a copy constructor. The one generated by the compiler is adequate.
~
TEXTE_MODULE
();
static
inline
bool
ClassOf
(
const
EDA_ITEM
*
aItem
)
{
return
PCB_MODULE_TEXT_T
==
aItem
->
Type
();
}
virtual
const
wxPoint
&
GetPosition
()
const
{
return
m_Pos
;
...
...
@@ -172,6 +165,17 @@ public:
#if defined(DEBUG)
virtual
void
Show
(
int
nestLevel
,
std
::
ostream
&
os
)
const
{
ShowDummy
(
os
);
}
// override
#endif
private
:
/* Note: orientation in 1/10 deg relative to the footprint
* Physical orient is m_Orient + m_Parent->m_Orient
*/
TEXT_TYPE
m_Type
;
///< 0=ref, 1=val, etc.
bool
m_NoShow
;
///< true = invisible
wxPoint
m_Pos0
;
///< text coordinates relatives to the footprint anchor, orient 0.
///< text coordinate ref point is the text centre
};
#endif // TEXT_MODULE_H_
pcbnew/class_track.h
View file @
4121c272
...
...
@@ -79,18 +79,12 @@ extern TRACK* GetTrack( TRACK* aStartTrace, const TRACK* aEndTrace,
class
TRACK
:
public
BOARD_CONNECTED_ITEM
{
// make SetNext() and SetBack() private so that they may not be called from anywhere.
// list management is done on TRACKs using DLIST<TRACK> only.
private
:
void
SetNext
(
EDA_ITEM
*
aNext
)
{
Pnext
=
aNext
;
}
void
SetBack
(
EDA_ITEM
*
aBack
)
{
Pback
=
aBack
;
}
protected
:
int
m_Width
;
// Thickness of track, or via diameter
wxPoint
m_Start
;
// Line start point
wxPoint
m_End
;
// Line end point
public
:
static
inline
bool
ClassOf
(
const
EDA_ITEM
*
aItem
)
{
return
PCB_TRACE_T
==
aItem
->
Type
();
}
BOARD_CONNECTED_ITEM
*
start
;
// pointers to a connected item (pad or track)
BOARD_CONNECTED_ITEM
*
end
;
...
...
@@ -339,6 +333,16 @@ protected:
* Helper for drawing the short netname in tracks */
void
DrawShortNetname
(
EDA_DRAW_PANEL
*
panel
,
wxDC
*
aDC
,
GR_DRAWMODE
aDrawMode
,
EDA_COLOR_T
aBgColor
);
int
m_Width
;
///< Thickness of track, or via diameter
wxPoint
m_Start
;
///< Line start point
wxPoint
m_End
;
///< Line end point
private
:
// make SetNext() and SetBack() private so that they may not be called from anywhere.
// list management is done on TRACKs using DLIST<TRACK> only.
void
SetNext
(
EDA_ITEM
*
aNext
)
{
Pnext
=
aNext
;
}
void
SetBack
(
EDA_ITEM
*
aBack
)
{
Pback
=
aBack
;
}
};
...
...
@@ -376,6 +380,11 @@ class VIA : public TRACK
public
:
VIA
(
BOARD_ITEM
*
aParent
);
static
inline
bool
ClassOf
(
const
EDA_ITEM
*
aItem
)
{
return
PCB_VIA_T
==
aItem
->
Type
();
}
// Do not create a copy constructor. The one generated by the compiler is adequate.
void
Draw
(
EDA_DRAW_PANEL
*
panel
,
wxDC
*
DC
,
...
...
@@ -467,7 +476,6 @@ public:
*/
bool
IsDrillDefault
()
const
{
return
m_Drill
<=
0
;
}
protected
:
virtual
void
GetMsgPanelInfoBase
(
std
::
vector
<
MSG_PANEL_ITEM
>&
aList
);
...
...
pcbnew/clean.cpp
View file @
4121c272
...
...
@@ -284,7 +284,7 @@ const ZONE_CONTAINER* TRACKS_CLEANER::zoneForTrackEndpoint( const TRACK *aTrack,
{
// Vias are special cased, since they get a layer range, not a single one
LAYER_NUM
top_layer
,
bottom_layer
;
const
VIA
*
via
=
dynamic
_cast
<
const
VIA
*>
(
aTrack
);
const
VIA
*
via
=
dyn
_cast
<
const
VIA
*>
(
aTrack
);
if
(
via
)
via
->
LayerPair
(
&
top_layer
,
&
bottom_layer
);
...
...
@@ -318,7 +318,8 @@ bool TRACKS_CLEANER::testTrackEndpointDangling( TRACK *aTrack, ENDPOINT_T aEndPo
/* If a via is connected to this end, test if this via has a second item connected.
* If not, remove the current segment (the via would then become
* unconnected and remove on the following pass) */
VIA
*
via
=
dynamic_cast
<
VIA
*>
(
other
);
VIA
*
via
=
dyn_cast
<
VIA
*>
(
other
);
if
(
via
)
{
// search for another segment following the via
...
...
pcbnew/edgemod.cpp
View file @
4121c272
...
...
@@ -171,7 +171,8 @@ void FOOTPRINT_EDIT_FRAME::Edit_Edge_Width( EDGE_MODULE* aEdge )
for
(
BOARD_ITEM
*
item
=
module
->
GraphicalItems
();
item
;
item
=
item
->
Next
()
)
{
aEdge
=
dynamic_cast
<
EDGE_MODULE
*>
(
item
);
aEdge
=
dyn_cast
<
EDGE_MODULE
*>
(
item
);
if
(
aEdge
)
aEdge
->
SetWidth
(
GetDesignSettings
().
m_ModuleSegmentWidth
);
}
...
...
@@ -218,7 +219,7 @@ void FOOTPRINT_EDIT_FRAME::Edit_Edge_Layer( EDGE_MODULE* aEdge )
for
(
BOARD_ITEM
*
item
=
module
->
GraphicalItems
()
;
item
!=
NULL
;
item
=
item
->
Next
()
)
{
aEdge
=
dyn
amic
_cast
<
EDGE_MODULE
*>
(
item
);
aEdge
=
dyn_cast
<
EDGE_MODULE
*>
(
item
);
if
(
aEdge
&&
(
aEdge
->
GetLayer
()
!=
new_layer
)
)
{
...
...
pcbnew/editrack.cpp
View file @
4121c272
...
...
@@ -62,7 +62,7 @@ static void Abort_Create_Track( EDA_DRAW_PANEL* Panel, wxDC* DC )
{
PCB_EDIT_FRAME
*
frame
=
(
PCB_EDIT_FRAME
*
)
Panel
->
GetParent
();
BOARD
*
pcb
=
frame
->
GetBoard
();
TRACK
*
track
=
dynamic
_cast
<
TRACK
*>
(
frame
->
GetCurItem
()
);
TRACK
*
track
=
dyn
_cast
<
TRACK
*>
(
frame
->
GetCurItem
()
);
if
(
track
)
{
...
...
pcbnew/kicad_plugin.cpp
View file @
4121c272
...
...
@@ -1671,7 +1671,7 @@ BOARD* PCB_IO::Load( const wxString& aFileName, BOARD* aAppendToMe, const PROPER
m_parser
->
SetLineReader
(
&
reader
);
m_parser
->
SetBoard
(
aAppendToMe
);
BOARD
*
board
=
dyn
amic
_cast
<
BOARD
*>
(
m_parser
->
Parse
()
);
BOARD
*
board
=
dyn_cast
<
BOARD
*>
(
m_parser
->
Parse
()
);
wxASSERT
(
board
);
// Give the filename to the board if it's new
...
...
pcbnew/librairi.cpp
View file @
4121c272
...
...
@@ -249,7 +249,7 @@ MODULE* FOOTPRINT_EDIT_FRAME::Import_Module()
f
.
ReadAll
(
&
fcontents
);
module
=
dyn
amic
_cast
<
MODULE
*>
(
pcb_io
.
Parse
(
fcontents
)
);
module
=
dyn_cast
<
MODULE
*>
(
pcb_io
.
Parse
(
fcontents
)
);
if
(
!
module
)
{
...
...
pcbnew/pcb_painter.cpp
View file @
4121c272
...
...
@@ -146,18 +146,18 @@ void PCB_RENDER_SETTINGS::LoadDisplayOptions( const DISPLAY_OPTIONS& aOptions )
const
COLOR4D
&
PCB_RENDER_SETTINGS
::
GetColor
(
const
VIEW_ITEM
*
aItem
,
int
aLayer
)
const
{
int
netCode
=
-
1
;
const
EDA_ITEM
*
item
=
static_cast
<
const
EDA_ITEM
*>
(
aItem
);
if
(
aI
tem
)
if
(
i
tem
)
{
if
(
static_cast
<
const
EDA_ITEM
*>
(
aItem
)
->
IsSelected
()
)
if
(
item
->
IsSelected
()
)
{
return
m_layerColorsSel
[
aLayer
];
}
// Try to obtain the netcode for the item
const
BOARD_CONNECTED_ITEM
*
item
=
dynamic_cast
<
const
BOARD_CONNECTED_ITEM
*>
(
aItem
);
if
(
item
)
netCode
=
item
->
GetNetCode
();
if
(
const
BOARD_CONNECTED_ITEM
*
conItem
=
dyn_cast
<
const
BOARD_CONNECTED_ITEM
*>
(
item
)
)
netCode
=
conItem
->
GetNetCode
();
}
// Return grayish color for non-highlighted layers in the high contrast mode
...
...
@@ -200,49 +200,51 @@ PCB_PAINTER::PCB_PAINTER( GAL* aGal ) :
bool
PCB_PAINTER
::
Draw
(
const
VIEW_ITEM
*
aItem
,
int
aLayer
)
{
const
EDA_ITEM
*
item
=
static_cast
<
const
EDA_ITEM
*>
(
aItem
);
// the "cast" applied in here clarifies which overloaded draw() is called
switch
(
aI
tem
->
Type
()
)
switch
(
i
tem
->
Type
()
)
{
case
PCB_ZONE_T
:
case
PCB_TRACE_T
:
draw
(
(
const
TRACK
*
)
aI
tem
,
aLayer
);
draw
(
(
const
TRACK
*
)
i
tem
,
aLayer
);
break
;
case
PCB_VIA_T
:
draw
(
(
const
VIA
*
)
aI
tem
,
aLayer
);
draw
(
(
const
VIA
*
)
i
tem
,
aLayer
);
break
;
case
PCB_PAD_T
:
draw
(
(
const
D_PAD
*
)
aI
tem
,
aLayer
);
draw
(
(
const
D_PAD
*
)
i
tem
,
aLayer
);
break
;
case
PCB_LINE_T
:
case
PCB_MODULE_EDGE_T
:
draw
(
(
DRAWSEGMENT
*
)
aI
tem
);
draw
(
(
DRAWSEGMENT
*
)
i
tem
);
break
;
case
PCB_TEXT_T
:
draw
(
(
TEXTE_PCB
*
)
aI
tem
,
aLayer
);
draw
(
(
TEXTE_PCB
*
)
i
tem
,
aLayer
);
break
;
case
PCB_MODULE_TEXT_T
:
draw
(
(
TEXTE_MODULE
*
)
aI
tem
,
aLayer
);
draw
(
(
TEXTE_MODULE
*
)
i
tem
,
aLayer
);
break
;
case
PCB_ZONE_AREA_T
:
draw
(
(
ZONE_CONTAINER
*
)
aI
tem
);
draw
(
(
ZONE_CONTAINER
*
)
i
tem
);
break
;
case
PCB_DIMENSION_T
:
draw
(
(
DIMENSION
*
)
aI
tem
,
aLayer
);
draw
(
(
DIMENSION
*
)
i
tem
,
aLayer
);
break
;
case
PCB_TARGET_T
:
draw
(
(
PCB_TARGET
*
)
aI
tem
);
draw
(
(
PCB_TARGET
*
)
i
tem
);
break
;
case
PCB_MARKER_T
:
draw
(
(
MARKER_PCB
*
)
aI
tem
);
draw
(
(
MARKER_PCB
*
)
i
tem
);
break
;
default
:
...
...
pcbnew/plot_board_layers.cpp
View file @
4121c272
...
...
@@ -377,7 +377,7 @@ void PlotStandardLayer( BOARD *aBoard, PLOTTER* aPlotter,
// plot them on solder mask
for
(
TRACK
*
track
=
aBoard
->
m_Track
;
track
;
track
=
track
->
Next
()
)
{
const
VIA
*
Via
=
dyn
amic
_cast
<
const
VIA
*>
(
track
);
const
VIA
*
Via
=
dyn_cast
<
const
VIA
*>
(
track
);
if
(
!
Via
)
continue
;
...
...
@@ -562,7 +562,7 @@ void PlotLayerOutlines( BOARD *aBoard, PLOTTER* aPlotter,
// Plot vias holes
for
(
TRACK
*
track
=
aBoard
->
m_Track
;
track
;
track
=
track
->
Next
()
)
{
const
VIA
*
via
=
dyn
amic
_cast
<
const
VIA
*>
(
track
);
const
VIA
*
via
=
dyn_cast
<
const
VIA
*>
(
track
);
if
(
via
&&
via
->
IsOnLayer
(
layer
)
)
// via holes can be not through holes
{
...
...
@@ -663,7 +663,7 @@ void PlotSolderMaskLayer( BOARD *aBoard, PLOTTER* aPlotter,
int
via_margin
=
via_clearance
+
inflate
;
for
(
TRACK
*
track
=
aBoard
->
m_Track
;
track
;
track
=
track
->
Next
()
)
{
const
VIA
*
via
=
dyn
amic
_cast
<
const
VIA
*>
(
track
);
const
VIA
*
via
=
dyn_cast
<
const
VIA
*>
(
track
);
if
(
!
via
)
continue
;
...
...
pcbnew/plot_brditems_plotter.cpp
View file @
4121c272
...
...
@@ -151,7 +151,8 @@ bool BRDITEMS_PLOTTER::PlotAllTextsModule( MODULE* aModule )
for
(
BOARD_ITEM
*
item
=
aModule
->
GraphicalItems
().
GetFirst
();
item
!=
NULL
;
item
=
item
->
Next
()
)
{
textModule
=
dynamic_cast
<
TEXTE_MODULE
*>
(
item
);
textModule
=
dyn_cast
<
TEXTE_MODULE
*>
(
item
);
if
(
!
textModule
)
continue
;
...
...
@@ -350,7 +351,7 @@ void BRDITEMS_PLOTTER::Plot_Edges_Modules()
{
for
(
BOARD_ITEM
*
item
=
module
->
GraphicalItems
().
GetFirst
();
item
;
item
=
item
->
Next
()
)
{
EDGE_MODULE
*
edge
=
dynamic
_cast
<
EDGE_MODULE
*>
(
item
);
EDGE_MODULE
*
edge
=
dyn
_cast
<
EDGE_MODULE
*>
(
item
);
if
(
!
edge
||
((
GetLayerMask
(
edge
->
GetLayer
()
)
&
m_layerMask
)
==
0
)
)
continue
;
...
...
@@ -682,7 +683,7 @@ void BRDITEMS_PLOTTER::PlotDrillMarks()
for
(
TRACK
*
pts
=
m_board
->
m_Track
;
pts
!=
NULL
;
pts
=
pts
->
Next
()
)
{
const
VIA
*
via
=
dynamic
_cast
<
const
VIA
*>
(
pts
);
const
VIA
*
via
=
dyn
_cast
<
const
VIA
*>
(
pts
);
if
(
via
)
plotOneDrillMark
(
PAD_DRILL_CIRCLE
,
via
->
GetStart
(),
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment