1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
/*
* This program source code file is part of KiCad, a free EDA CAD application.
*
* Copyright (C) 1992-2012 KiCad Developers, see AUTHORS.txt for contributors.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, you may find one here:
* http://www.gnu.org/licenses/old-licenses/gpl-2.0.html
* or you may search the http://www.gnu.org website for the version 2 license,
* or you may write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
*/
/**
* @file class_board_design_settings.cpp
* BOARD_DESIGN_SETTINGS class functions.
*/
#include <fctsys.h>
#include <common.h>
#include <layers_id_colors_and_visibility.h>
#include <pcbnew.h>
#include <class_board_design_settings.h>
#include <class_track.h>
#include <convert_from_iu.h>
// Board thickness, mainly for 3D view:
#define DEFAULT_BOARD_THICKNESS_MM 1.6
// Default values for some board items
#define DEFAULT_TEXT_PCB_SIZE Millimeter2iu( 1.5 )
#define DEFAULT_TEXT_PCB_THICKNESS Millimeter2iu( 0.3 )
#define DEFAULT_PCB_EDGE_THICKNESS Millimeter2iu( 0.15 )
#define DEFAULT_GRAPHIC_THICKNESS Millimeter2iu( 0.2 )
#define DEFAULT_TEXT_MODULE_SIZE Millimeter2iu( 1.5 )
#define DEFAULT_GR_MODULE_THICKNESS Millimeter2iu( 0.15 )
#define DEFAULT_SOLDERMASK_CLEARANCE Millimeter2iu( 0.2 )
#define DEFAULT_SOLDERMASK_MIN_WIDTH Millimeter2iu( 0.0 )
BOARD_DESIGN_SETTINGS::BOARD_DESIGN_SETTINGS() :
m_Pad_Master( 0 )
{
m_EnabledLayers = ALL_LAYERS; // All layers enabled at first.
// SetCopperLayerCount() will adjust this.
SetVisibleLayers( FULL_LAYERS );
// set all but hidden text as visible.
m_VisibleElements = ~( 1 << MOD_TEXT_INVISIBLE );
SetCopperLayerCount( 2 ); // Default design is a double sided board
// via type (VIA_BLIND_BURIED, VIA_THROUGH VIA_MICROVIA).
m_CurrentViaType = VIA_THROUGH;
// if true, when creating a new track starting on an existing track, use this track width
m_UseConnectedTrackWidth = false;
m_MicroViasAllowed = false; // true to allow micro vias
m_DrawSegmentWidth = DEFAULT_GRAPHIC_THICKNESS; // current graphic line width (not EDGE layer)
m_EdgeSegmentWidth = DEFAULT_PCB_EDGE_THICKNESS; // current graphic line width (EDGE layer only)
m_PcbTextWidth = DEFAULT_TEXT_PCB_THICKNESS; // current Pcb (not module) Text width
m_PcbTextSize = wxSize( DEFAULT_TEXT_PCB_SIZE,
DEFAULT_TEXT_PCB_SIZE ); // current Pcb (not module) Text size
m_TrackMinWidth = DMils2iu( 100 ); // track min value for width ((min copper size value
m_ViasMinSize = DMils2iu( 350 ); // vias (not micro vias) min diameter
m_ViasMinDrill = DMils2iu( 200 ); // vias (not micro vias) min drill diameter
m_MicroViasMinSize = DMils2iu( 200 ); // micro vias (not vias) min diameter
m_MicroViasMinDrill = DMils2iu( 50 ); // micro vias (not vias) min drill diameter
// Global mask margins:
m_SolderMaskMargin = DEFAULT_SOLDERMASK_CLEARANCE; // Solder mask margin
m_SolderMaskMinWidth = DEFAULT_SOLDERMASK_MIN_WIDTH; // Solder mask min width
m_SolderPasteMargin = 0; // Solder paste margin absolute value
m_SolderPasteMarginRatio = 0.0; // Solder pask margin ratio value of pad size
// The final margin is the sum of these 2 values
// Usually < 0 because the mask is smaller than pad
m_ModuleTextSize = wxSize( DEFAULT_TEXT_MODULE_SIZE,
DEFAULT_TEXT_MODULE_SIZE );
m_ModuleTextWidth = DEFAULT_GR_MODULE_THICKNESS;
m_ModuleSegmentWidth = DEFAULT_GR_MODULE_THICKNESS;
// Layer thickness for 3D viewer
m_boardThickness = Millimeter2iu( DEFAULT_BOARD_THICKNESS_MM );
}
// Add parameters to save in project config.
// values are saved in mm
void BOARD_DESIGN_SETTINGS::AppendConfigs( PARAM_CFG_ARRAY* aResult )
{
m_Pad_Master.AppendConfigs( aResult );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "PcbTextSizeV" ),
&m_PcbTextSize.y,
DEFAULT_TEXT_PCB_SIZE, TEXTS_MIN_SIZE, TEXTS_MAX_SIZE,
NULL, MM_PER_IU ) );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "PcbTextSizeH" ),
&m_PcbTextSize.x,
DEFAULT_TEXT_PCB_SIZE, TEXTS_MIN_SIZE, TEXTS_MAX_SIZE,
NULL, MM_PER_IU ) );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "PcbTextThickness" ),
&m_PcbTextWidth,
DEFAULT_TEXT_PCB_THICKNESS,
Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
NULL, MM_PER_IU ) );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "ModuleTextSizeV" ),
&m_ModuleTextSize.y,
DEFAULT_TEXT_MODULE_SIZE, TEXTS_MIN_SIZE, TEXTS_MAX_SIZE,
NULL, MM_PER_IU ) );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "ModuleTextSizeH" ),
&m_ModuleTextSize.x,
DEFAULT_TEXT_MODULE_SIZE, TEXTS_MIN_SIZE, TEXTS_MAX_SIZE,
NULL, MM_PER_IU ) );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "ModuleTextSizeThickness" ),
&m_ModuleTextWidth,
DEFAULT_GR_MODULE_THICKNESS, 1, TEXTS_MAX_WIDTH,
NULL, MM_PER_IU ) );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderMaskClearance" ),
&m_SolderMaskMargin,
DEFAULT_SOLDERMASK_CLEARANCE, 0, Millimeter2iu( 1.0 ),
NULL, MM_PER_IU ) );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "SolderMaskMinWidth" ),
&m_SolderMaskMinWidth,
DEFAULT_SOLDERMASK_MIN_WIDTH, 0, Millimeter2iu( 0.5 ),
NULL, MM_PER_IU ) );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "DrawSegmentWidth" ),
&m_DrawSegmentWidth,
DEFAULT_GRAPHIC_THICKNESS,
Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
NULL, MM_PER_IU ) );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "BoardOutlineThickness" ),
&m_EdgeSegmentWidth,
DEFAULT_PCB_EDGE_THICKNESS,
Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
NULL, MM_PER_IU ) );
aResult->push_back( new PARAM_CFG_INT_WITH_SCALE( wxT( "ModuleOutlineThickness" ),
&m_ModuleSegmentWidth,
DEFAULT_GR_MODULE_THICKNESS,
Millimeter2iu( 0.01 ), Millimeter2iu( 5.0 ),
NULL, MM_PER_IU ) );
}
// see pcbstruct.h
LAYER_MSK BOARD_DESIGN_SETTINGS::GetVisibleLayers() const
{
return m_VisibleLayers;
}
void BOARD_DESIGN_SETTINGS::SetVisibleAlls()
{
SetVisibleLayers( FULL_LAYERS );
m_VisibleElements = -1;
}
void BOARD_DESIGN_SETTINGS::SetVisibleLayers( LAYER_MSK aMask )
{
m_VisibleLayers = aMask & m_EnabledLayers & FULL_LAYERS;
}
void BOARD_DESIGN_SETTINGS::SetLayerVisibility( LAYER_NUM aLayer, bool aNewState )
{
if( aNewState && IsLayerEnabled( aLayer ) )
m_VisibleLayers |= GetLayerMask( aLayer );
else
m_VisibleLayers &= ~GetLayerMask( aLayer );
}
void BOARD_DESIGN_SETTINGS::SetElementVisibility( int aElementCategory, bool aNewState )
{
if( aElementCategory < 0 || aElementCategory >= END_PCB_VISIBLE_LIST )
return;
if( aNewState )
m_VisibleElements |= 1 << aElementCategory;
else
m_VisibleElements &= ~( 1 << aElementCategory );
}
void BOARD_DESIGN_SETTINGS::SetCopperLayerCount( int aNewLayerCount )
{
// if( aNewLayerCount < 2 ) aNewLayerCount = 2;
m_CopperLayerCount = aNewLayerCount;
// ensure consistency with the m_EnabledLayers member
m_EnabledLayers &= ~ALL_CU_LAYERS;
m_EnabledLayers |= LAYER_BACK;
if( m_CopperLayerCount > 1 )
m_EnabledLayers |= LAYER_FRONT;
for( LAYER_NUM ii = LAYER_N_2; ii < aNewLayerCount - 1; ++ii )
m_EnabledLayers |= GetLayerMask( ii );
}
void BOARD_DESIGN_SETTINGS::SetEnabledLayers( LAYER_MSK aMask )
{
// Back and front layers are always enabled.
aMask |= LAYER_BACK | LAYER_FRONT;
m_EnabledLayers = aMask;
// A disabled layer cannot be visible
m_VisibleLayers &= aMask;
// update m_CopperLayerCount to ensure its consistency with m_EnabledLayers
m_CopperLayerCount = LayerMaskCountSet( aMask & ALL_CU_LAYERS);
}