Commit 07606a27 authored by Andrey Filippov's avatar Andrey Filippov

CLAUDE: C3/C3b close-out - conditioning freeze FALSIFIED, default = per-cycle (0)

C3b gate (log 191867): azimuth RMS 0.0454 (C2 bar 0.0349, +30%), roll
0.0415 (+54%), NOT-settled 228 (C2: 51). Better than the cycle-1 freeze
(0.0518/0.0542/267) but still fails the pre-declared C2-level gate.
CONCLUSION: per-cycle conditioning re-derivation carries convergence
dynamics through ALL cycles (228 scenes not settled by cycle 4 - 'cycle 2
~= converged' does not hold for half the sequence); not a noise source to
freeze away for ~0.6 ms/scene. pose_freeze_cycle default 0 = per-cycle
(restores C2 quality); parameter + bit-exact light-path mechanism stay for
DP-era experiments (previous-scene conditioning candidate).
Co-Authored-By: 's avatarClaude Fable 5 <noreply@anthropic.com>
parent 8449dc7d
......@@ -37,7 +37,7 @@ public class CuasRtParameters {
public int pose_recenter = 0; // rung-2 frozen GPU contract (Andrey's ruling 07/13/2026): recentering passes for the lean peak measurement - the 15-arg Correlation2d.getMaxXYCmEig cosine-mask refinement (window over the eigen-ellipse, imp.eig_scale_axes*sqrt(lambda)+imp.eig_inc_axes half-axes, re-centroid each pass). 0 = single-pass (today's validated baseline behavior); imp.eig_recenter (2) = the oracle engine's setting - candidate for wide lean peaks, needs its own A/B run. The GPU argmax/centroid/eigen kernel implements the SAME superset contract with this as a runtime parameter. // By Claude on 07/13/2026
public double pose_debias = 0.0; // rung-2 optional envelope de-bias hook (Andrey's ruling 07/13/2026, default OFF): fraction of the MCLT window-autocorr envelope divided out of the pixel-domain correlation BEFORE peak extraction (corr *= envelope^-frac, envelope normalized 1.0 at center). The envelope multiplies the true correlation peak and pulls the centroid toward center - argmax under-reports offsets by alpha ~0.75-0.9 (probed 07/13, the residual per-cycle convergence tax). 0 = off (bit-identical to no hook); 1 = full divide. GPU kernel contract: optional precomputed de-bias array pointer, NULL = off. Enabling needs its own A/B run. // By Claude on 07/13/2026
public int pose_lma_debug = 0; // inner-LMA debug level, passed to the inner runLma (max with the run's own debugLevel): 0 = quiet (default; ALSO gates the per-scene "CuasPoseRT cycles:" trace line - >=1 to print it); 2 = one line PER INNER STEP ("LMA step N: {good,done} full RMS= ... pure RMS= ... + lambda=...") - the convergence trajectory INSIDE each outer cycle; 3-4 = progressively deeper solver dumps (parameter vectors, matrices). VERBOSE at >=2 - use for short investigation runs, not production. // By Claude on 07/12/2026, trace gate 07/13
public int pose_freeze_cycle = 2; // rung C3b: freeze the lean-pose LMA conditioning (weights/eigen/selection/pull/reg) at this FULL prepare count; later cycles run light (fresh offsets only). 0 = never freeze = re-derive every cycle (highest accuracy, the pre-C3 behavior); 1 = freeze at cycle 1 (FAILED its gate: blurriest-pose conditioning, azimuth +48%); 2 = freeze at cycle 2 (post-first-correction measurement ~= converged). Keeps the high-accuracy opportunity selectable at runtime (Andrey 07/16). // By Claude on 07/16/2026
public int pose_freeze_cycle = 0; // rung C3/C3b FALSIFIED 07/16 (freeze@1: az +48% roll +100%; freeze@2: az +30% roll +54%, NOT-settled 51->228): conditioning re-derivation matters through ALL cycles. 0 = never freeze = per-cycle (DEFAULT, restores C2 quality). Mechanism kept validated (bit-exact light path) for DP-era experiments (e.g. previous-scene conditioning). Was: freeze the lean-pose LMA conditioning (weights/eigen/selection/pull/reg) at this FULL prepare count; later cycles run light (fresh offsets only). 0 = never freeze = re-derive every cycle (highest accuracy, the pre-C3 behavior); 1 = freeze at cycle 1 (FAILED its gate: blurriest-pose conditioning, azimuth +48%); 2 = freeze at cycle 2 (post-first-correction measurement ~= converged). Keeps the high-accuracy opportunity selectable at runtime (Andrey 07/16). // By Claude on 07/16/2026
public boolean rend_test = false; // RT full-render product (CuasRender.testRenderSequence): per scene raw /jp4/ -> conditionSceneToGpu -> virtual-grid render at BORROWED stored pose+ERS rates -> -CUAS-RT-RENDER hyperstack [s00..s15, merged][scenes], comparable to -CUAS-INDIVIDUAL/MERGED-CUAS-DBG. NON-exclusive: runs AFTER the pose stage when both are ON (the pose stage is part of the RT cycle - Andrey 07/06/2026). // By Claude on 07/05/2026
public boolean log_test = false; // LoG A/B with the RT render (CuasRender): also save -CUAS-RT-RENDER-LOG-ORACLE (product convolved with the EXISTING pre-DNN pixel LoG, LINEAR alpha=1) and -CUAS-RT-RENDER-LOG-FOLDED (same render, LoG folded into the GPU aberration kernels via CuasLogFold - no pixel convolution; originals restored). The aberration+LoG kernel-fold validation (RT-seed step 1b). // By Claude on 07/06/2026
public boolean log_ident = false; // LoG ISOLATION test with the RT render (CuasRender): render with IDENTITY kernels (-CUAS-RT-RENDER-ID, aberrations skipped), pixel-LoG it (-ID-LOG-ORACLE), and render with PURE-LoG kernels (-LOG-ONLY). If -LOG-ONLY vs -ID-LOG-ORACLE residual persists, the fold/L0 is wrong; if it collapses to the wrap floor, the aberration-kernel interaction was responsible (Andrey 07/06/2026). // By Claude on 07/06/2026
......
......@@ -2078,7 +2078,7 @@ public class IntersceneLma {
// essentially converged pose = converged-quality eigen/weights.
// By Claude on 07/16/2026.
private int poseResidentFullPrepares = 0; // full resident prepares this scene (instance = per-scene)
private int poseFreezeCycles = 2; // 0 = never freeze (per-cycle re-derivation, highest accuracy) // By Claude on 07/16/2026
private int poseFreezeCycles = 0; // 0 = never freeze (per-cycle re-derivation; C3/C3b freeze FALSIFIED 07/16) // By Claude on 07/16/2026
public void setPoseFreezeCycles(final int cycles) { poseFreezeCycles = cycles; }
/** Run the resident GPU prepare at the current parameters_vector (mirrors the
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