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Elphel
ezynq
Commits
9d5f01cc
Commit
9d5f01cc
authored
Nov 01, 2013
by
Oleg Dzhimiev
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corrected parameter name
parent
435a11b3
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ezynq_XC7Z030_1FBG484C.h
u-boot-tree/include/configs/ezynq/ezynq_XC7Z030_1FBG484C.h
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u-boot-tree/include/configs/ezynq/ezynq_XC7Z030_1FBG484C.h
View file @
9d5f01cc
...
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@@ -13,8 +13,8 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __CONFIG_XC7Z0
10_1CLG400
_H
#define __CONFIG_XC7Z0
10_1CLG400
_H
#ifndef __CONFIG_XC7Z0
30_1FBG484C
_H
#define __CONFIG_XC7Z0
30_1FBG484C
_H
/* datasheet data for specific speed grades */
#define CONFIG_EZYNQ_CLK_DS_PLL_MAX_1_MHZ 1600.0
/* Maximal PLL clock frequency for speed grade 1 (MHz) */
...
...
@@ -70,4 +70,4 @@
#define CONFIG_EZYNQ_DDR_CLOCK_3_PROPOGATION_DELAY 160
#endif
/* __CONFIG_XC7Z0
10_1CLG400
_H */
#endif
/* __CONFIG_XC7Z0
30_1FBG484C
_H */
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