Commit 52f60c25 authored by Oleg Dzhimiev's avatar Oleg Dzhimiev

Added couple links

parent 023675f3
# Ezynq
Ezynq project is started to create a bootloader for systems based on the Xilinx Zynq SoC without Ezynq project is started to create a bootloader for systems based on the Xilinx Zynq SoC without
the inconvenience of the non-free tools and/or files. the inconvenience of the non-free tools and/or files.
The goal is not just to "free" the code, but to provide users with the higher degree of flexibi- The goal is not just to "free" the code, but to provide users with the higher degree of flexibi-
...@@ -18,13 +19,13 @@ This software consists of Python program that processes data from U-boot configu ...@@ -18,13 +19,13 @@ This software consists of Python program that processes data from U-boot configu
include/autoconf.mk (it is generated by "make include/autoconf.mk") and generates several output include/autoconf.mk (it is generated by "make include/autoconf.mk") and generates several output
files: files:
1 - the header file (default name boot_head.bin) formatted for the Zynq ROM Boot Loader (RBL) 1. the header file (default name boot_head.bin) formatted for the Zynq ROM Boot Loader (RBL)
according to section 6.3.2 of Xilinx UG585 -"Zynq-7000 AP SoC Technical Reference Manual". This according to section 6.3.2 of Xilinx UG585 -"Zynq-7000 AP SoC Technical Reference Manual". This
file uses RBL register initialization feature to set registers (MIO, DDR) that can be written file uses RBL register initialization feature to set registers (MIO, DDR) that can be written
before system clocks and DDR memory are initialized - that requires polling status information before system clocks and DDR memory are initialized - that requires polling status information
and waiting for particular states are reached. and waiting for particular states are reached.
2 - ezynq.c file to be compiled and linked with other U-boot files. All ezynq-specific code is 2. *ezynq.c* file to be compiled and linked with other U-boot files. All ezynq-specific code is
called by a modified version of the arch_cpu_init() function - the only difference from the called by a modified version of the arch_cpu_init() function - the only difference from the
U-boot version for Xilinx Zynq designed to be used with the proprietary FSBL program. This code U-boot version for Xilinx Zynq designed to be used with the proprietary FSBL program. This code
finishes register initialization (contrary to RBL it can wait for certain states are reached) finishes register initialization (contrary to RBL it can wait for certain states are reached)
...@@ -32,7 +33,7 @@ and performs relocation of the code from the on-chip memory (OCM) to the main sy ...@@ -32,7 +33,7 @@ and performs relocation of the code from the on-chip memory (OCM) to the main sy
U-boot takes over from there. Optionally the debug code is generated that controls the LED state U-boot takes over from there. Optionally the debug code is generated that controls the LED state
at different stages of the boot process and outputs register states to the serial port. at different stages of the boot process and outputs register states to the serial port.
3 - html output file (default name u-boot.html) that lists the configuration parameters used 3. html output file (default name u-boot.html) that lists the configuration parameters used
(specified and calculated from others), used PLLs and clocks, configured interfaces and their (specified and calculated from others), used PLLs and clocks, configured interfaces and their
usage of the MIO pins. It then lists all the registers written by RBL and written/tested during usage of the MIO pins. It then lists all the registers written by RBL and written/tested during
execution of the arch_cpu_init(). Most of the registers are listed in the same sequence as they execution of the arch_cpu_init(). Most of the registers are listed in the same sequence as they
...@@ -55,7 +56,7 @@ load by itself. It is quite a lot (192K is just for code, data uses DRAM and is ...@@ -55,7 +56,7 @@ load by itself. It is quite a lot (192K is just for code, data uses DRAM and is
the OCM) so U-boot can be loaded in a simple one-stage process without the need of the SPL when the OCM) so U-boot can be loaded in a simple one-stage process without the need of the SPL when
first a mini-version of U-boot is loaded, and that version later loads the full U-boot to DRAM. first a mini-version of U-boot is loaded, and that version later loads the full U-boot to DRAM.
Generated arch_cpu_init() starts running in OCM, initializes DRAM, copies itself (first 192K Generated *arch_cpu_init()* starts running in OCM, initializes DRAM, copies itself (first 192K
OCM) to DRAM to 0x4000000.0x402ffff (using just C, not assembly code) and than adds 0x4000000 to OCM) to DRAM to 0x4000000.0x402ffff (using just C, not assembly code) and than adds 0x4000000 to
the program counter. In this state it is possible to map DRAM to the 0x0.0x2ffff instead of the the program counter. In this state it is possible to map DRAM to the 0x0.0x2ffff instead of the
OCM and copy 0x4000000.0x402ffff back to 0x0.0x2ffff and so return from the function OCM and copy 0x4000000.0x402ffff back to 0x0.0x2ffff and so return from the function
...@@ -64,7 +65,8 @@ the DRAM, not in the OCM. U-boot relocation functionality nicely skips actual re ...@@ -64,7 +65,8 @@ the DRAM, not in the OCM. U-boot relocation functionality nicely skips actual re
the source and destination addresses are the same) and the data memory is initialized when 192K the source and destination addresses are the same) and the data memory is initialized when 192K
OCM limit is not in effect anymore. OCM limit is not in effect anymore.
INSTALLATION (see below for testing without U-boot installation)
## INSTALLATION (see below for testing without U-boot installation)
When Ezynq repository is cloned, there is install_uboot.sh script in the top directory. Running When Ezynq repository is cloned, there is install_uboot.sh script in the top directory. Running
this script clones u-boot-xlnx and then adds links to the files in Ezynq sub-directory this script clones u-boot-xlnx and then adds links to the files in Ezynq sub-directory
...@@ -73,6 +75,7 @@ project files by "git pull". ...@@ -73,6 +75,7 @@ project files by "git pull".
These links created by install_uboot.sh add new configuration files and replace 3 files in the These links created by install_uboot.sh add new configuration files and replace 3 files in the
u-boot-xlnx: u-boot-xlnx:
* boards.cfg - adding zynq-microzed there * boards.cfg - adding zynq-microzed there
* arch/arm/cpu/armv7/zynq/cpu.c - disabling arch_cpu_init() there if configuration was made for * arch/arm/cpu/armv7/zynq/cpu.c - disabling arch_cpu_init() there if configuration was made for
Ezynq Ezynq
...@@ -80,23 +83,24 @@ These links created by install_uboot.sh add new configuration files and replace ...@@ -80,23 +83,24 @@ These links created by install_uboot.sh add new configuration files and replace
arch/arm/cpu/armv7/zynq/ezynq.c arch/arm/cpu/armv7/zynq/ezynq.c
New files include: New files include:
* include/configs/zynq_microzed.h configuration parameters for U-boot features, described in
* *include/configs/zynq_microzed.h* configuration parameters for U-boot features, described in
U-boot README file U-boot README file
* include/configs/ezynq/ezynq_MT41K256M16RE125.h - Ezynq configuration parameters containing * *include/configs/ezynq/ezynq_MT41K256M16RE125.h* - Ezynq configuration parameters containing
Micron DDR3 memory datasheet for the memory used by MicroZed board Micron DDR3 memory datasheet for the memory used by MicroZed board
* include/configs/ezynq/ezynq_XC7Z010_1CLG400.h - Ezynq configuration parameters containing * *include/configs/ezynq/ezynq_XC7Z010_1CLG400.h* - Ezynq configuration parameters containing
Xilinx Zynq datasheet data for the SoC used by MicroZed board Xilinx Zynq datasheet data for the SoC used by MicroZed board
* include/configs/ezynq/ezynq_XC7Z010_1CLG400.h - Ezynq configuration parameters containing * *include/configs/ezynq/ezynq_XC7Z010_1CLG400.h* - Ezynq configuration parameters containing
Xilinx Zynq datasheet data for the SoC used by MicroZed board Xilinx Zynq datasheet data for the SoC used by MicroZed board
* include/configs/ezynq/zed_ezynq.h - rest of the Ezynq configuration parameters (it has the * include/configs/ezynq/zed_ezynq.h - rest of the Ezynq configuration parameters (it has the
include lines for the 2 datasheet files listed above) include lines for the 2 datasheet files listed above)
* makeuboot - script that configures U-boot for the microzed board, creates include/autoconf.mk, * *makeuboot* - script that configures U-boot for the microzed board, creates include/autoconf.mk,
runs ezynqcfg.py to create Ezynq code (RBL header and ezynq.c), builds and links U-boot runs ezynqcfg.py to create Ezynq code (RBL header and ezynq.c), builds and links U-boot
generating u-boot.bin, reruns ezynqcfg.py to include the length of the u-boot.bin into generating u-boot.bin, reruns ezynqcfg.py to include the length of the u-boot.bin into
boot_head.bin and then combines boot_head.bin and u-boot.bin into boot.bin with a simple boot_head.bin and then combines boot_head.bin and u-boot.bin into boot.bin with a simple
'cat' command. 'cat' command.
TESTING WITHOUT U-BOOT AND CROSS-COMPILER TOOLCHAIN ## Testing without u-boot and cross-compiler toolchain
It is possible to try just the ezynqcfg.py script without building u-boot, no ARM toolchain It is possible to try just the ezynqcfg.py script without building u-boot, no ARM toolchain
is required is required
...@@ -104,11 +108,13 @@ New files include: ...@@ -104,11 +108,13 @@ New files include:
This command uses a demo test.mk that mimics include/autoconf.mk and generates test.html and This command uses a demo test.mk that mimics include/autoconf.mk and generates test.html and
ezynq.c files ezynq.c files
KNOWN ISSUES ## Useful links
* [Ezynq wiki page](http://wiki.elphel.com/index.php?title=Ezynq)
* [meta-ezynq](https://sourceforge.net/p/elphel/meta-ezynq) - recipes for Yocto Poky
## Known issues
1. USB does not work yet. 1. USB does not work yet.
2. Ethernet is not tested (on the board we have it does not work with provided images, so we 2. Ethernet is not tested (on the board we have it does not work with provided images, so we
suspect a hardware problem. suspect a hardware problem.
3. Bitstream loading is not tested, current code does not enable level shifters - it may be 3. Bitstream loading is not tested, current code does not enable level shifters - it may be
more appropriate to do just before loading of the bitstream. more appropriate to do just before loading of the bitstream.
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