Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
D
doxverilog
Project
Project
Details
Activity
Releases
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Commits
Open sidebar
Elphel
doxverilog
Commits
c4007c3a
Commit
c4007c3a
authored
Aug 30, 2014
by
Dimitri van Heesch
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
Bug 735499 - [PATCH] Fix potential modulo by zero in src/template.cpp
parent
cb5d8e61
Changes
1
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
9 additions
and
1 deletion
+9
-1
template.cpp
src/template.cpp
+9
-1
No files found.
src/template.cpp
View file @
c4007c3a
...
...
@@ -1319,7 +1319,15 @@ class FilterDivisibleBy
}
if
(
v
.
type
()
==
TemplateVariant
::
Integer
&&
n
.
type
()
==
TemplateVariant
::
Integer
)
{
return
TemplateVariant
((
v
.
toInt
()
%
n
.
toInt
())
==
0
);
int
ni
=
n
.
toInt
();
if
(
ni
>
0
)
{
return
TemplateVariant
((
v
.
toInt
()
%
ni
)
==
0
);
}
else
{
return
TemplateVariant
(
FALSE
);
}
}
else
{
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment