Skip to content

D
doxverilog
Commit 99433b3d authored by Dimitri van Heesch's avatar Dimitri van Heesch
Browse files
Options

Replaced the VHDL parser with the VHDL scanner from 1.7.5 to avoid potential licensing issues

parent 28f40b3a
Hide whitespace changes
Inline Side-by-side
Showing with 2813 additions and 6519 deletions
src/Makefile.in
View file @ 99433b3d
......@@ -48,7 +48,6 @@ distclean: clean
ce_parse.cpp ce_parse.h tag.cpp commentscan.cpp \
declinfo.cpp defargs.cpp commentcnv.cpp doctokenizer.cpp \
pycode.cpp pyscanner.cpp fortrancode.cpp fortranscanner.cpp \
vhdlscanner.cpp vhdlcode.cpp tclscanner.cpp vhdlparser.h \
vhdlparser.cpp
vhdlscanner.cpp vhdlcode.cpp tclscanner.cpp
FORCE:
src/context.cpp
View file @ 99433b3d
......@@ -23,6 +23,7 @@
#include "membername.h"
#include "parserintf.h"
#include "portable.h"
#include "arguments.h"
// TODO: pass the current file to Dot*::writeGraph, so the user can put dot graphs in other
// files as well
......
src/docparser.cpp
View file @ 99433b3d
......@@ -2904,8 +2904,6 @@ void DocVhdlFlow::parse()
DBG(("DocVhdlFlow::parse() end\n"));
DocNode *n=g_nodeStack.pop();
ASSERT(n==this);
VhdlDocGen::createFlowChart(g_memberDef);
}
......
src/doxygen.cpp
View file @ 99433b3d
......@@ -11049,7 +11049,7 @@ void parseInput()
flushUnresolvedRelations();
if (Config_getBool("OPTIMIZE_OUTPUT_VHDL"))
{
VhdlDocGen::computeVhdlComponentRelations();
VhdlDocGen::computeVhdlComponentRelations();
}
computeClassRelations();
g_classEntries.clear();
......@@ -11192,13 +11192,6 @@ void parseInput()
g_s.begin("Adding members to index pages...\n");
addMembersToIndex();
g_s.end();
if (Config_getBool("OPTIMIZE_OUTPUT_VHDL") &&
Config_getBool("HAVE_DOT") &&
Config_getEnum("DOT_IMAGE_FORMAT")=="svg")
{
VhdlDocGen::writeOverview();
}
}
void generateOutput()
......
src/htmldocvisitor.cpp
View file @ 99433b3d
......@@ -1773,35 +1773,14 @@ void HtmlDocVisitor::visitPost(DocHtmlBlockQuote *b)
forceStartParagraph(b);
}
void HtmlDocVisitor::visitPre(DocVhdlFlow *vf)
void HtmlDocVisitor::visitPre(DocVhdlFlow *)
{
if (m_hide) return;
if (VhdlDocGen::getFlowMember()) // use VHDL flow chart creator
{
forceEndParagraph(vf);
QCString fname=FlowChart::convertNameToFileName();
m_t << "<p>";
m_t << "flowchart: " ; // TODO: translate me
m_t << "<a href=\"";
m_t << fname.data();
m_t << ".svg\">";
m_t << VhdlDocGen::getFlowMember()->name().data();
m_t << "</a>";
if (vf->hasCaption())
{
m_t << "<br />";
}
}
}
void HtmlDocVisitor::visitPost(DocVhdlFlow *vf)
void HtmlDocVisitor::visitPost(DocVhdlFlow *)
{
if (m_hide) return;
if (VhdlDocGen::getFlowMember()) // use VHDL flow chart creator
{
m_t << "</p>";
forceStartParagraph(vf);
}
}
void HtmlDocVisitor::visitPre(DocParBlock *)
......
src/index.cpp
View file @ 99433b3d
......@@ -2053,10 +2053,6 @@ static void writeAnnotatedIndex(OutputList &ol)
QCString title = lne ? lne->title() : theTranslator->trCompoundList();
bool addToIndex = lne==0 || lne->visible();
if (Config_getBool("OPTIMIZE_OUTPUT_VHDL"))
{
VhdlDocGen::findConstraintFile(lne);
}
startFile(ol,"annotated",0,title,HLI_Annotated);
......
src/libdoxygen.pro.in
View file @ 99433b3d
......@@ -201,7 +201,6 @@ SOURCES = arguments.cpp \
../generated_src/doxygen/ce_parse.cpp \
../generated_src/doxygen/constexp.cpp \
../generated_src/doxygen/vhdlcode.cpp \
../generated_src/doxygen/vhdlparser.cpp \
../generated_src/doxygen/vhdlscanner.cpp \
../generated_src/doxygen/code.cpp \
../generated_src/doxygen/commentcnv.cpp \
......
src/libdoxygen.t.in
View file @ 99433b3d
......@@ -111,16 +111,9 @@ sub GenerateLex {
$(YACC) -l -d -p ce_parsexpYY constexp.y -o \$(GENERATED_SRC)/ce_parse.c
-rm $(GENERATED_SRC)/ce_parse.c
#$ GenerateDep("\$(GENERATED_SRC)/vhdlscanner.cpp","vhdlscanner.l","\$(GENERATED_SRC)/vhdlparser.h");
#$ GenerateDep("\$(GENERATED_SRC)/vhdlscanner.cpp","vhdlscanner.l");
#$ GenerateLex("vhdlscanner",1);
#$ GenerateDep("\$(GENERATED_SRC)/vhdlparser.cpp","vhdlparser.y");
$(YACC) -l -p vhdlscannerYY vhdlparser.y -o \$(GENERATED_SRC)/vhdlparser.cpp
#$ GenerateDep("\$(GENERATED_SRC)/vhdlparser.h","vhdlparser.y");
$(YACC) -l -d -p vhdlscannerYY vhdlparser.y -o \$(GENERATED_SRC)/vhdlparser.c
-rm $(GENERATED_SRC)/vhdlparser.c
TO_C_CMD=$(PYTHON) to_c_cmd.py < $< > $@
#$ GenerateDep("layout.cpp","\$(GENERATED_SRC)/layout_default.xml.h");
......
src/outputlist.cpp
View file @ 99433b3d
......@@ -169,8 +169,6 @@ void OutputList::writeDoc(DocRoot *root,Definition *ctx,MemberDef *md)
// ctx?ctx->getDefFileExtension().data():"<null>");
if (og->isEnabled()) og->writeDoc(root,ctx,md);
}
VhdlDocGen::setFlowMember(0);
}
bool OutputList::parseText(const QCString &textStr)
......
src/vhdldocgen.cpp
View file @ 99433b3d
This source diff could not be displayed because it is too large. You can view the blob instead.
src/vhdldocgen.h
View file @ 99433b3d
/******************************************************************************
*
*
*
* Copyright (C) 1997-2014 by Dimitri van Heesch.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation under the terms of the GNU General Public License is hereby
* granted. No representations are made about the suitability of this software
* documentation under the terms of the GNU General Public License is hereby
* granted. No representations are made about the suitability of this software
* for any purpose. It is provided "as is" without express or implied warranty.
* See the GNU General Public License for more details.
*
......@@ -16,31 +18,27 @@
#ifndef VHDLDOCGEN_H
#define VHDLDOCGEN_H
/**
* This class implements functions for parsing and generating
/**
* This class implements functions for parsing and generating
* vhdl documents
*/
#include <qdict.h>
#include <qlist.h>
#include <qcstring.h>
#include "layout.h"
#include "arguments.h"
#include "entry.h"
#include "memberlist.h"
class QStringList;
class Entry;
class ClassSDict;
class FileStorage;
class EntryNav;
class ClassDef;
class MemberList;
class MemberDef;
class FTextStream;
class OutputList;
class Definition;
class GroupDef;
class FileDef;
class NamespaceDef;
struct Argument;
/** Class for generating documentation specific for VHDL */
class VhdlDocGen
class VhdlDocGen
{
public:
......@@ -51,7 +49,6 @@ class VhdlDocGen
ARCHITECTURECLASS, // Overlays: Private
PACKAGECLASS // Overlays: Package
};
enum VhdlKeyWords
{
LIBRARY=1,
......@@ -71,11 +68,12 @@ class VhdlDocGen
USE,
PROCESS,
PORT,
UNITS,
DOCUMENT, //18 0x12
UNITS,
GENERIC,
INSTANTIATION,
COMPONENT_INST,
GROUP,
VFILE,
VFILE,
SHAREDVARIABLE,
CONFIG,
ALIAS,
......@@ -86,16 +84,18 @@ class VhdlDocGen
VhdlDocGen();
virtual ~VhdlDocGen();
static void init();
static QCString convertFileNameToClassName(QCString name);
// --- used by vhdlscanner.l -----------
static bool isSubClass(ClassDef* cd,ClassDef *scd, bool followInstances,int level);
// --- used by vhdlscanner.l -----------
static QCString getIndexWord(const char* ,int index);
static bool foundInsertedComponent(const QCString& name,Entry* root);
static bool deleteCharRev(QCString &s,char c);
static bool isFunctionProto(QCString& ss);
static Entry* findFunction(Entry* func);
static void deleteAllChars(QCString &s,char c);
static bool getSigName(QList<QCString>& ql, const char* str,QCString& buffer);
static bool getSigTypeName(QList<QCString>& ql,const char* str,QCString& buffer);
static void parseFuncProto(const char* text,
QList<Argument>& ,
QList<Argument>& ,
QCString& name,
QCString& ret,
bool doc=false);
......@@ -104,9 +104,15 @@ class VhdlDocGen
static void computeVhdlComponentRelations();
static QCString* findKeyWord(const QCString& word);
static void addFuncDoc(EntryNav* root);
//static void MapArchitecturesToEntity(Entry* cur_root);
//static void MapComponentToEntity(const ClassSDict*);
static ClassDef* findComponent(int type);
static ClassDef* getPackageName(const QCString& name);
static MemberDef* findMember(const QCString& className,
static MemberDef* findMember(const QCString& className,
const QCString& memName);
static void findAllPackages(const QCString& className,
QDict<QCString>&);
......@@ -114,44 +120,73 @@ class VhdlDocGen
const QCString& key,
MemberListType type);
static ClassDef *getClass(const char *name);
static Entry* findFunction(Entry* root,Entry* func);
static MemberDef* findFunction(const QList<Argument> &ql,
const QCString& name,
const QCString& package, bool type);
static bool compareString(const QCString& s1,
const QCString& s2);
static QCString getClassTitle(const ClassDef*);
static void writeInlineClassLink(const ClassDef*,
OutputList &ol);
static bool isConstraint(const MemberDef *mdef);
static bool isConfig(const MemberDef *mdef);
static bool isAlias(const MemberDef *mdef);
static bool isLibrary(const MemberDef *mdef);
static bool isGeneric(const MemberDef *mdef);
static bool isPort(const MemberDef *mdef);
static bool isComponent(const MemberDef *mdef);
static bool isPackage(const MemberDef *mdef);
static bool isEntity(const MemberDef *mdef);
static bool isConstant(const MemberDef *mdef);
static bool isVType(const MemberDef *mdef);
static bool isSubType(const MemberDef *mdef);
static bool isVhdlFunction(const MemberDef *mdef);
static bool isProcess(const MemberDef *mdef);
static bool isSignal(const MemberDef *mdef);
static bool isAttribute(const MemberDef *mdef);
static bool isSignals(const MemberDef *mdef);
static bool isProcedure(const MemberDef *mdef);
static bool isRecord(const MemberDef *mdef);
static bool isArchitecture(const MemberDef *mdef);
static bool isUnit(const MemberDef *mdef);
static bool isPackageBody(const MemberDef *mdef);
static bool isVariable(const MemberDef *mdef);
static bool isFile(const MemberDef *mdef);
static bool isGroup(const MemberDef *mdef);
static bool isCompInst(const MemberDef *mdef);
static bool isMisc(const MemberDef *mdef);
//static void writeVhdlComponentList(OutputList &ol,int type);
static bool isMisc(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::MISCELLANEOUS; }
static bool isConfig(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::CONFIG; }
static bool isAlias(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::ALIAS; }
static bool isLibrary(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::LIBRARY; }
static bool isGeneric(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::GENERIC; }
static bool isPort(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::PORT; }
static bool isComponent(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::COMPONENT; }
static bool isPackage(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::USE; }
static bool isEntity(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::ENTITY; }
static bool isConstant(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::CONSTANT; }
static bool isVType(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::TYPE; }
static bool isSubType(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::SUBTYPE; }
static bool isVhdlFunction(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::FUNCTION; }
static bool isProcess(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::PROCESS; }
static bool isSignal(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::SIGNAL; }
static bool isAttribute(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::ATTRIBUTE; }
static bool isSignals(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::SIGNAL; }
static bool isProcedure(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::PROCEDURE; }
static bool isRecord(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::RECORD; }
static bool isArchitecture(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::ARCHITECTURE; }
static bool isUnit(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::UNITS; }
static bool isPackageBody(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::PACKAGE_BODY; }
static bool isVariable(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::SHAREDVARIABLE; }
static bool isFile(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::VFILE; }
static bool isGroup(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::GROUP; }
static bool isCompInst(const MemberDef *mdef)
{ return mdef->getMemberSpecifiers()==VhdlDocGen::COMPONENT_INST; }
//-----------------------------------------------------
// translatable items
static QCString trTypeString(uint64 type);
static QCString trVhdlType(uint64 type,bool sing=true);
......@@ -176,10 +211,17 @@ class VhdlDocGen
// trFunctions
static QCString trFunctionAndProc();
//-----------------------------------------------------
static void prepareComment(QCString&);
static void formatString(const QCString&,OutputList& ol,const MemberDef*);
static QCString getpackname(const char* text,
const char* word,
const char* patter);
static void parseProcessProto(const char* text,
QCString&,
QStringList&);
static void formatString(QCString&,OutputList& ol,const MemberDef*);
static void writeFormatString(const QCString&,OutputList& ol,const MemberDef*);
static void writeFunctionProto(OutputList& ol,const ArgumentList *al,const MemberDef*);
......@@ -188,6 +230,10 @@ class VhdlDocGen
static bool writeFuncProcDocu(const MemberDef *mdef, OutputList& ol,const ArgumentList* al,bool type=false);
static void writeRecordProto(const MemberDef *mdef, OutputList& ol,const ArgumentList *al);
static QCString convertArgumentListToString(const ArgumentList* al,bool f);
static QCString getProcessNumber();
static QCString getRecordNumber();
static bool writeVHDLTypeDocumentation(const MemberDef* mdef, const Definition* d, OutputList &ol);
static void writeVhdlDeclarations(MemberList*,OutputList&,GroupDef*,ClassDef*,FileDef*,NamespaceDef*);
......@@ -203,144 +249,28 @@ class VhdlDocGen
ClassDef *cd,NamespaceDef *nd,FileDef *fd,GroupDef *gd,
const char *title,const char *subtitle,bool showEnumValues,int type);
static bool writeClassType(ClassDef *&,OutputList &ol ,QCString & cname);
static QCString convertArgumentListToString(const ArgumentList* al,bool f);
static QCString getProcessNumber();
static QCString getRecordNumber();
static QCString getClassName(const ClassDef*);
static bool writeClassType(ClassDef *,OutputList &ol ,QCString & cname);
static void adjustRecordMember(MemberDef *mdef);
static bool writeDoc(EntryNav* rootNav);
static void writeLink(const MemberDef* mdef,OutputList &ol);
static void adjustMemberName(QCString& nn);
static bool membersHaveSpecificType(MemberList *ml,uint64 type);
static void startFonts(const QCString& q, const char *keyword,OutputList& ol);
static bool isNumber(const QCString& s);
static QCString getProtectionName(int prot);
static void parseUCF(const char* input,Entry* entity,QCString f,bool vendor);
static bool findConstraintFile( LayoutNavEntry *lne);
static ClassDef* findArchitecture(const ClassDef *cd);
static ClassDef* findArchitecture(QCString identifier, QCString entity_name);
static void writeSource(MemberDef *mdef,OutputList& ol,QCString & cname);
static void writeAlphbeticalClass(OutputList& ol,const ClassDef* cd,const QCString &);
static QCString parseForConfig(QCString & entity,QCString & arch);
static QCString parseForBinding(QCString & entity,QCString & arch);
static void addBaseClass(ClassDef* cd,ClassDef *ent);
static ClassDef* findVhdlClass(const char *className );
static void writeOverview(OutputList &ol);
static void writeOverview();
// flowcharts
static void createFlowChart(const MemberDef*);
//static void addFlowImage(const FTextStream &,const QCString &);
static void setFlowMember( const MemberDef *flowMember);
static const MemberDef *getFlowMember();
static bool isVhdlClass (const Entry *cu)
{
return cu->spec==VhdlDocGen::ENTITY ||
cu->spec==VhdlDocGen::PACKAGE ||
cu->spec==VhdlDocGen::ARCHITECTURE ||
cu->spec==VhdlDocGen::PACKAGE_BODY;
}
static void writeSource(MemberDef *mdef,OutputList& ol,QCString &);
static void writeRecorUnit(QCString & largs,OutputList& ol ,const MemberDef *mdef);
private:
static void findAllArchitectures(QList<QCString>& ql,const ClassDef *cd);
static void getFuncParams(QList<Argument>&, const char* str);
static bool compareArgList(ArgumentList*,ArgumentList*);
static void writeVhdlLink(const ClassDef* cdd ,OutputList& ol,QCString& type,QCString& name,QCString& beh);
static void findAllArchitectures(QList<QCString>& ql,const ClassDef *cd);
static void writeStringLink(const MemberDef *mdef,QCString mem,OutputList& ol);
static void writeRecUnitDocu( const MemberDef *md, OutputList& ol,QCString largs);
static void writeRecorUnit(QCString & largs,OutputList& ol ,const MemberDef *mdef);
};
//-------------------------------------------------------------------------------------------------------------------
//-------------- VHDL Flowcharts -------------------------------------------------------------------------------
//-------------------------------------------------------------------------------------------------------------------
//#define DEBUGFLOW
class FlowChart
{
public:
enum nodeTypes {
IF_NO = 1<<1,
ELSIF_NO = 1<<2,
ELSE_NO = 1<<3,
CASE_NO = 1<<4,
WHEN_NO = 1<<5,
EXIT_NO = 1<<6,
END_NO = 1<<7,
TEXT_NO = 1<<8,
START_NO = 1<<9,
ENDIF_NO = 1<<10,
FOR_NO = 1<<11,
WHILE_NO = 1<<12,
END_LOOP = 1<<13,
END_CASE = 1<<14,
VARIABLE_NO = 1<<15,
RETURN_NO = 1<<16,
LOOP_NO = 1<<17,
NEXT_NO = 1<<18,
EMPTY_NO = 1<<19,
COMMENT_NO = 1<<20,
BEGIN_NO = 1<<21
};
static void writeCodeFragment(MemberDef *mdef,OutputList& ol);
//---------- create svg -------------------------------------------------------------
static void createSVG();
static void startDot(FTextStream &t);
static void endDot(FTextStream &t);
static void codify(FTextStream &t,const char *str);
static void writeShape(FTextStream &t,const FlowChart* fl);
static void writeEdge(FTextStream &t,int fl_from,int fl_to,int i,bool bFrom=FALSE,bool bTo=FALSE);
static void writeEdge(FTextStream &t,const FlowChart* fl_from,const FlowChart* fl_to,int i);
static void writeFlowLinks(FTextStream &t);
static QCString getNodeName(int n);
static void colTextNodes();
static int getNextTextLink(const FlowChart* fl,uint index);
static int getNextIfLink(const FlowChart*,uint);
static int getNextNode(int,int);
static int findNode(int index,int stamp,int type);
static int findNode(int index,int type);
static int findNextLoop(int j,int stamp);
static int findPrevLoop(int j,int stamp,bool endif=FALSE);
static int findLabel(int j,QCString &);
static void delFlowList();
static const char* getNodeType(int c);
static void addFlowChart(int type,const char* text,const char* exp,const char * label=NULL);
static void moveToPrevLevel();
static int getTimeStamp();
static void writeFlowChart();
static void alignFuncProc(QCString & q,const ArgumentList* al,bool isFunc);
static QCString convertNameToFileName();
static void printNode(const FlowChart* n);
static void printFlowTree();
static void buildCommentNodes(FTextStream &t);
static void alignCommentNode(FTextStream &t,QCString com);
static QList<FlowChart> flowList;
FlowChart(int typ,const char* t,const char* ex,const char* label=0);
~FlowChart();
private:
int id;
int stamp;
int type;
int line;
QCString label;
QCString text;
QCString exp;
};
#endif
src/vhdlparser.y deleted 100644 → 0
View file @ 28f40b3a
/******************************************************************************
*
* Copyright (C) 1997-2014 by Dimitri van Heesch.
*
* Permission to use, copy, modify, and distribute this software and its
* documentation under the terms of the GNU General Public License is hereby
* granted. No representations are made about the suitability of this software
* for any purpose. It is provided "as is" without express or implied warranty.
* See the GNU General Public License for more details.
*
* Documents produced by Doxygen are derivative works derived from the
* input used in their production; they are not affected by this license.
*
*/
/*********************************************************************************************
* The original was a VHDL parser description to be used with GMD Compiler
* Tool Box
* written from:
* Jan den Ouden, Jaap Hofstede
* Department of Computer Science (INF/SPA)
* University of Twente
* PB 217, 7500 AE ENSCHEDE, The Netherlands
* Tel: +31 53 893788
* Email: hofstede@cs.utwente.nl
* avail at: ftp.cs.utwente.nl in pub/src/VHDL/Grammar
*
* author of YACC transformation:
* Thomas Dettmer
* Dortmund University
* Dept. of Computer Scienc, LS1
* PB 500 500
* D-44221 Dortmund (Germany)
* Phone: +49-231-755-6464
* e-mail: dettmer@ls1.informatik.uni-dortmund.de
*****************************************************************
*
* This file is intended not to be used for commercial purposes
* without permission of the University of Twente and permission
* of the University of Dortmund
*
* NOTE THAT THERE IS NO WARRANTY FOR CORRECTNES, COMPLETENESS, SUPPORT
* OR ANYTHING ELSE.
*
*******************************************************/
/******************************************************************************
* modified for doxygen by M. Kreis
* extended to VHDL 93/2008
******************************************************************************/
%{
#include <stdio.h>
#include <qcstring.h>
#include <qstringlist.h>
#include "config.h"
#ifndef YYSTYPE
typedef int YYSTYPE;
#endif
struct YYMM
{
int itype;
QCString qstr;
};
// define struct instead of union
#define YYSTYPE YYMM
#include "membergroup.h"
#include "vhdldocgen.h"
#include "doxygen.h"
#include "searchindex.h"
#include "vhdlscanner.h"
#include "commentscan.h"
#include "entry.h"
#include "arguments.h"
#include "memberdef.h"
#include "vhdldocgen.h"
//-----------------------------variables ---------------------------------------------------------------------------
static VhdlContainer s_str;
static QList<Entry>instFiles;
static QList<Entry>libUse;
static int yyLineNr;
static Entry* lastCompound;
static Entry* currentCompound;
static Entry* lastEntity;
static Entry* current;
static Entry* tempEntry;
static Entry* current_root;
static QCString compSpec;
static QCString currName;
static int levelCounter;
static QCString confName;
static QCString genLabels;
static QCString lab;
static QCString forL;
static QList<VhdlConfNode> configL;
static int currP=0;
enum { GEN_SEC=0x1, PARAM_SEC,CONTEXT_SEC,PROTECTED_SEC } ;
static int param_sec = 0;
static int parse_sec=0;
//---------------------------- functions --------------------------------------------------------------------------------
int vhdlscannerYYlex ();
void vhdlscannerYYerror (char const *);
static void addVhdlType(const QCString &name,int startLine,
int section,uint64 spec,
const char* args,const char* type,
Protection prot=Public);
static void addCompInst(char *n, char* instName,char* comp,int line);
static void newEntry();
static void initEntry(Entry *e);
static void pushLabel(QCString &,QCString&);
static QCString popLabel(QCString&);
static void addConfigureNode(const char* a,const char*b,
bool isRoot,bool isLeave,bool inlineConf=FALSE);
//static bool addLibUseClause(const QCString &type);
static bool isFuncProcProced();
static void initEntry(Entry *e);
static void addProto(const char *s1,const char *s2,const char *s3,
const char *s4,const char *s5,const char *s6);
static void createFunction(const QCString &impure,uint64 spec,
const QCString &fname);
static void createFlow();
void newVhdlEntry()
{
newEntry();
}
Entry* getCurrentVhdlEntry()
{
return current;
}
void initVhdlParser()
{
lastCompound=0;
lastEntity=0;
currentCompound=0;
lastEntity=0;
current_root=s_str.root;
current=new Entry();
initEntry(current);
libUse.clear();
}
QList<Entry> & getVhdlInstList()
{
return instFiles;
}
QList<Entry> & getLibUse()
{
return libUse;
}
%}
%token
t_ABSTRLIST
t_CHARLIST
t_DIGIT
t_STRING
t_LETTER
t_ACCESS
t_AFTER
t_ALIAS
t_ALL
t_AND
t_ARCHITECTURE
t_ARRAY
t_ASSERT
t_ATTRIBUTE
t_BEGIN
t_BLOCK
t_BODY
t_BUFFER
t_BUS
t_CASE
t_COMPONENT
t_CONFIGURATION
t_CONSTANT
t_DISCONNECT
t_DOWNTO
t_ELSE
t_ELSIF
t_END
t_ENTITY
t_EXIT
t_FILE
t_FOR
t_FUNCTION
t_GENERATE
t_GENERIC
t_GUARDED
t_IF
t_IN
t_INOUT
t_IS
t_LABEL
t_LIBRARY
t_LINKAGE
t_LOOP
t_MAP
t_NAND
t_NEW
t_NEXT
t_NOR
t_NULL
t_OF
t_ON
t_OPEN
t_OR
t_OTHERS
t_OUT
t_PACKAGE
t_PORT
t_PROCEDURE
t_PROCESS
t_RANGE
t_RECORD
t_REGISTER
t_REPORT
t_RETURN
t_SELECT
t_SEVERITY
t_SIGNAL
t_SUBTYPE
t_THEN
t_TO
t_TRANSPORT
t_TYPE
t_UNITS
t_UNTIL
t_USE
t_VARIABLE
t_WAIT
t_WHEN
t_WHILE
t_WITH
t_XOR
/* new keywords */
t_IMPURE
t_PURE
t_GROUP
t_POSTPONED
t_SHARED
t_XNOR
t_SLL
t_SRA
t_SLA
t_SRL
t_ROR
t_ROL
t_UNAFFECTED
/*============== VHDL 2008 keywords ======================= */
t_ASSUME_GUARANTEE
t_ASSUME
t_CONTEXT
t_COVER
t_DEFAULT
t_FAIRNESS
t_FORCE
t_INERTIAL
t_LITERAL
t_PARAMETER
t_PROTECTED
t_PROPERTY
t_REJECT
t_RELEASE
t_RESTRICT
t_RESTRICT_GUARANTEE
t_SEQUENCE
t_STRONG
t_VMODE
t_VPROP
t_VUNIT
/*============== VHDL binary operators 2008 ======================= */
t_SLSL
t_SRSR
t_QQ
t_QGT
t_QLT
t_QG
t_QL
t_QEQU
t_QNEQU
%nonassoc t_EQSym t_NESym t_LTSym t_LESym t_GTSym t_GESym t_QNEQU t_QEQU t_QL t_QG t_QLT t_QGT
%left t_Plus t_Minus t_Ampersand
%left MED_PRECEDENCE
%left t_Star t_Slash t_MOD t_REM
%nonassoc t_DoubleStar t_ABS t_NOT MAX_PRECEDENCE
/* misc syms */
/*t_Space */
%token
t_Apostrophe
t_LeftParen
t_RightParen
t_Comma
t_VarAsgn
t_Colon
t_Semicolon
t_Arrow
t_Box
t_Bar
t_Dot
t_Q
t_At
t_Neg
t_LEFTBR
t_RIGHTBR
t_ToolDir
%type<qstr> designator literal enumeration_literal physical_literal physical_literal_no_default physical_literal_1
%type<qstr> lib_clause use_clause sel_list entity_decl entity_start entity_decl_2 entity_decl_1 arch_body arch_start arch_body_1
%type<qstr> config_decl config_start config_decl_2 config_decl_1 config_decl_3 package_decl package_start package_body pack_body_start package_body_2 package_body_1 common_decltve_item
%type<qstr> config_decltve_item subprog_decl subprog_body interf_list interf_element interf_element_4 interf_element_3 interf_element_2 interf_element_1 mode
%type<qstr> association_list association_list_1 association_list_2 gen_association_list gen_association_list_1 gen_association_list_2 association_element gen_association_element formal_part actual_part mark expr and_relation relation primary name name2 sel_name suffix ifts_name
%type<qstr> attribute_name aggregate element_association_list2 qualified_expr element_association choices choices_1 choices_2 choice type_decl type_decl_1 type_definition enumeration_type_definition enumeration_type_definition_1 enumeration_type_definition_2 physical_type_definition physical_type_definition_1 physical_type_definition_2 base_unit_decl secondary_unit_decl unconstrained_array_definition unconstrained_array_definition_1 unconstrained_array_definition_2 index_subtype_definition constrained_array_definition record_type_definition record_type_definition_1 record_type_definition_2 element_decl
%type<qstr> access_type_definition file_type_definition subtype_decl subtype_indic subtype_indic_1 subtype_indic1 subtype_indic1_1 range_constraint index_constraint index_constraint_1 index_constraint_2 discrete_range discrete_range1 range_spec direction constant_decl constant_decl_1 signal_decl signal_decl_2 signal_decl_1 variable_decl variable_decl_1 object_class signal_kind alias_decl file_decl file_decl_1 attribute_decl attribute_spec entity_spec entity_name_list entity_name_list_1
%type<qstr> entity_name_list_2 entity_class block_stat
%type<qstr> generate_stat generate_stat_1 procs_stat procs_stat1 procs_stat1_1 sensitivity_list sensitivity_list_1 sensitivity_list_2
%type<qstr> procedure_call_stat comp_decl comp_decl_2 comp_decl_1 block_config block_config_2 block_config_3 block_config_1 block_config_4 block_spec config_item comp_config comp_config_2 comp_config_1 config_spec binding_indic comp_spec
%type<qstr> inst_list entity_aspect idf_list procs_stat1_6
%type<qstr> t_Identifier t_StringLit t_BitStringLit t_AbstractLit t_CharacterLit tbox group_name record_type_simple_name
%type<qstr> entity_class_entry_list entity_class_entry group_constituent_list group_constituent group_declaration group_template_declaration
%type<qstr> procs_stat1_5 comp_1 mark_comp dot_name fi_dec multiplying_operator factor term adding_op
%type<qstr> simple_exp alias_spec sigma signature1 mark_stats mark_stats_1 signature
%type<qstr> protected_type_body protected_type_declaration alias_name_stat vcomp_stat comp_spec_stat procs_decltve_item
%type<qstr> sig_stat external_name absolute_pathname relative_pathname package_path_name external_pathname pathname_element_list neg_list pathname_element
%type<qstr> func_name return_is param func_prec iproc ifunc interface_subprogram_decl interface_package_decl package_instantiation_decl
%type<qstr> subprogram_instantiation_decl procs_stat1_4
%type<qstr> context_ref libustcont_stats libustcont_stat context_decl entity_decltve_item case_stat
%type<qstr> exit_stat if_stat loop_stat next_stat null_stat return_stat signal_assign_stat
%type<qstr> variable_assign_stat wait_stat report_statement assertion_stat_2 assertion_stat_1
%type<qstr> binding_indic_2 binding_indic_1 shift_op block_decltve_item disconnection_spec seq_stats_1 seq_stats_2 seq_stats
%type<qstr> signal_list signal_list_1 signal_list_2 seq_stat assertion_stat choice_stat choice_stat_1
%type<qstr> case_stat_1 case_stat_2 case_stat_alternative exit_stat_1 exit_stat_2 if_stat_2 if_stat_3 if_stat_1 loop_stat_2 loop_stat_1 loop_stat_3
%type<qstr> next_stat_1 next_stat_2 return_stat_1 lable variable_assign_stat_1
%type<qstr> wait_stat_1 wait_stat_2 wait_stat_3 target delay_mechanism
%type<qstr> if_generation_scheme if_scheme if_scheme_1 if_scheme_2 if_scheme_3 iteration_scheme for_scheme while_scheme concurrent_stats
%type<qstr> concurrent_stats_1 concurrent_stats_2 concurrent_stat block_stat_5 block_stat_4 block_stat_3 block_stat_2 block_stat_1 block_stat_0
%type<qstr> generate_statement_body generation_scheme concurrent_assertion_stat concurrent_procedure_call concurrent_signal_assign_stat
%type<qstr> block_stat_6 block_stat_7 block_stat_8 condal_signal_assign sel_signal_assign opts condal_wavefrms wavefrm wavefrm_element
%type<qstr> wavefrm_1 wavefrm_2 wavefrm_element_1 wavefrm_element_2 opts_1 opts_2 sel_wavefrms
%type<qstr> sel_wavefrms_1 sel_wavefrms_2 gen_stat1 block_declarative_part end_stats inout_stat
%type<qstr> selected_signal_assignment comp_inst_stat
%type<qstr> conditional_signal_assignment selected_variable_assignment conditional_variable_assignment
%type<qstr> subprog_decltve_item subprog_body_3 subprog_body_1 procs_stat1_2 gen_assoc
%debug
// for debugging set yydebug=1
%initial-action { yydebug=0; }
%expect 3
// minimum bison version
//%required "2.2"
%%
start: design_file
design_file : design_unit_list
/* parse function/process/procedure for vhdlflow */
| procs_stat
| subprog_body
design_unit_list: design_unit
| design_unit_list design_unit
;
designator : t_Identifier { $$=$1; }
| t_StringLit { $$=$1; }
;
literal : t_AbstractLit { $$=$1; }
| t_CharacterLit { $$=$1; }
| t_BitStringLit { $$=$1; }
| physical_literal_no_default { $$=$1; }
| t_NULL { $$="null"; }
;
enumeration_literal : t_CharacterLit { $$=$1; }
| t_Identifier { $$=$1; }
physical_literal : physical_literal_1 t_Identifier { $$=$1+" "+$2; }
physical_literal_1 : /* empty */ { $$=""; }
| t_AbstractLit { $$=$1; }
physical_literal_no_default : t_AbstractLit t_Identifier { $$=$1+" "+$2; }
idf_list : t_Identifier { $$=$1; }
| idf_list t_Comma t_Identifier { $$=$1+","+$3; }
;
/*------------------------------------------
-- Desing Unit
--------------------------------------------*/
design_unit : context_list lib_unit
context_list : /* empty */
| context_list context_item
lib_unit : entity_decl
| config_decl
| package_decl
| arch_body
| package_body
| context_decl
| package_instantiation_decl
;
context_item : lib_clause
| use_clause
;
lib_clause : t_LIBRARY idf_list t_Semicolon
{
if ( parse_sec==0 && Config_getBool("SHOW_INCLUDE_FILES") )
{
addVhdlType($2,getParsedLine(t_LIBRARY),Entry::VARIABLE_SEC,VhdlDocGen::LIBRARY,$2.data(),"_library_");
}
$$="library "+$2;
}
use_clause : t_USE sel_list t_Semicolon
{
QStringList ql1=QStringList::split(",",$2,FALSE);
for (uint j=0;j<ql1.count();j++)
{
//QStringList ql=QStringList::split(".",ql1[j],FALSE);
QCString it=ql1[j].utf8();
if ( parse_sec==0 && Config_getBool("SHOW_INCLUDE_FILES") )
{
addVhdlType(it,getParsedLine(t_USE),Entry::VARIABLE_SEC,VhdlDocGen::USE,it.data(),"_use_");
}
}
$$="use "+$2;
}
sel_list : sel_name { $$=$1; }
| sel_list t_Comma sel_name { $$=$1+","+$3; }
;
/*------------------------------------------
-- Library Units
--------------------------------------------*/
entity_decl : entity_start error comp_end_dec t_Semicolon
entity_decl : entity_start entity_decl_1 entity_decl_2
entity_decl_3 entity_decl_4 comp_end_dec t_Semicolon
entity_start: t_ENTITY t_Identifier t_IS
{
$$=$2;
lastEntity=current;
lastCompound=0;
getParsedLine(t_ENTITY);
addVhdlType($$,getParsedLine(t_ENTITY),Entry::CLASS_SEC,VhdlDocGen::ENTITY,0,0,Public);
}
;
entity_decl_5 : /* empty */
| t_Identifier
;
entity_decl_4 : /* empty */
| t_BEGIN concurrent_stats
;
entity_decl_3 : /* empty */
| entity_decl_3 entity_decl_6
;
entity_decl_6 : entity_decltve_item
entity_decl_2 : /* empty */ { $$=""; }
| t_PORT { currP=VhdlDocGen::PORT; } interf_list t_Semicolon { currP=0; }
;
entity_decl_1 : /* empty */ { $$=""; }
| t_GENERIC { currP=VhdlDocGen::GENERIC;parse_sec=GEN_SEC; } interf_list t_Semicolon{ currP=0;parse_sec=0; }
| t_GENERIC error t_Semicolon{ currP=0; }
;
arch_body : arch_start arch_body_1 t_BEGIN concurrent_stats t_END arch_body_2 t_Semicolon {lastCompound=0;}
arch_body : arch_start error t_END arch_body_2 t_Semicolon {lastCompound=0;}
arch_start : t_ARCHITECTURE t_Identifier t_OF t_Identifier t_IS
{
$$=$4+"::"+$2;
genLabels.resize(0);
pushLabel(genLabels,$2);
lastCompound=current;
addVhdlType($$,getParsedLine(t_ARCHITECTURE),Entry::CLASS_SEC,VhdlDocGen::ARCHITECTURE,0,0,Private);
}
arch_body_2 : /* empty */
arch_body_2 : t_Identifier
arch_body_2 : t_ARCHITECTURE t_Identifier
arch_body_2 : t_ARCHITECTURE
arch_body_1 : /* empty */ { $$=""; }
arch_body_1 : arch_body_1 arch_body_3
arch_body_3 : block_decltve_item
config_decl : config_start error t_END config_decl_2 t_Semicolon { genLabels.resize(0); }
config_decl : config_start config_decl_1 block_config t_END config_decl_2 t_Semicolon { genLabels.resize(0); }
{
QCString k=$3;
QCString k2=$2;
confName="";
}
config_start : t_CONFIGURATION t_Identifier t_OF t_Identifier t_IS
{
forL.resize(0);
confName=$2+"::"+$4;
addVhdlType($2.data(),getParsedLine(t_CONFIGURATION),Entry::VARIABLE_SEC,VhdlDocGen::CONFIG,"configuration",$4.data());
}
config_decl_2 : /* empty */ { $$=""; }
config_decl_2 : t_Identifier
{
QCString l=$1;
$$=$1;
}
config_decl_2 : t_CONFIGURATION { $$="configuration"; }
config_decl_2 : t_CONFIGURATION t_Identifier { $$=$2; }
config_decl_1 : /* empty */ { $$=""; }
config_decl_1 : config_decl_1 config_decl_3 { $$=$1+" "+$2; }
config_decl_3 : config_decltve_item { $$=$1; }
package_decl : package_start error t_END package_decl_2 t_Semicolon
package_decl : package_start package_decl_1 t_END package_decl_2 t_Semicolon
package_start : t_PACKAGE t_Identifier t_IS
{
lastCompound=current;
Entry *clone=new Entry(*current);
clone->section=Entry::NAMESPACE_SEC;
clone->spec=VhdlDocGen::PACKAGE;
clone->name=$2;
clone->startLine=s_str.iLine;
clone->bodyLine=s_str.iLine;
clone->protection=Package;
current_root->addSubEntry(clone);
addVhdlType($2,s_str.iLine,Entry::CLASS_SEC,VhdlDocGen::PACKAGE,0,0,Package);
}
package_decl_2 : /* empty */
package_decl_2 : t_Identifier { lastCompound=0; }
package_decl_2 : t_PACKAGE t_Identifier { lastCompound=0; }
package_decl_2 : t_PACKAGE { lastCompound=0; }
package_decl_1 : /* empty */
package_decl_1 : package_decl_22
package_decl_1 : package_decl_1 package_decl_3
package_decl_3 : package_decltve_item
package_decl_22: gen_interface_list t_Semicolon
package_decl_22: gen_interface_list
package_decl_22: gen_interface_list gen_assoc_list
package_decl_22: gen_interface_list gen_assoc_list t_Semicolon
package_body : pack_body_start error t_END package_body_2 t_Semicolon {lastCompound=0;}
package_body : pack_body_start package_body_1 t_END package_body_2 t_Semicolon {lastCompound=0;}
pack_body_start : t_PACKAGE t_BODY t_Identifier t_IS
{
$$=$3;
lastCompound=current;
$$.prepend("_");
addVhdlType($$,getParsedLine(t_PACKAGE) ,Entry::CLASS_SEC,VhdlDocGen::PACKAGE_BODY,0,0,Protected);
}
package_body_2 : /* empty */ { $$="";lastCompound=0; }
package_body_2 : t_Identifier { lastCompound=0; }
package_body_2 : t_PACKAGE t_BODY { lastCompound=0; }
package_body_2 : t_PACKAGE t_BODY t_Identifier { lastCompound=0; }
package_body_1 : /* empty */ { $$=""; }
package_body_1 : package_body_1 package_body_3
package_body_3 : package_body_decltve_item
/*------------------------------------------
-- Declarative Item
--------------------------------------------*/
common_decltve_item_1: package_decl
common_decltve_item_1: package_instantiation_decl
common_decltve_item_1: package_body
common_decltve_item_1: subprogram_instantiation_decl
common_decltve_item: type_decl{ $$=$1; }
common_decltve_item: subtype_decl{ $$=$1; }
common_decltve_item: constant_decl{ $$=$1; }
common_decltve_item: file_decl{ $$=$1; }
common_decltve_item: alias_decl{ $$=$1; }
common_decltve_item: subprog_decl{ $$=$1; }
common_decltve_item: use_clause { $$=$1; }
entity_decltve_item: common_decltve_item { $$=$1; }
entity_decltve_item: subprog_body { $$=$1; }
entity_decltve_item: attribute_decl { $$=$1; }
entity_decltve_item: attribute_spec { $$=$1; }
entity_decltve_item: disconnection_spec { $$=$1; }
entity_decltve_item: signal_decl { $$=$1; }
entity_decltve_item: variable_decl { $$=$1; }
entity_decltve_item: group_template_declaration { $$=$1; }
entity_decltve_item: group_declaration { $$=$1; }
entity_decltve_item: common_decltve_item_1 { $$=""; }
block_decltve_item: common_decltve_item
block_decltve_item: subprog_body
block_decltve_item: comp_decl
block_decltve_item: attribute_decl
block_decltve_item: attribute_spec
block_decltve_item: config_spec
block_decltve_item: disconnection_spec
block_decltve_item: signal_decl
block_decltve_item: variable_decl
block_decltve_item: group_template_declaration
block_decltve_item: group_declaration
block_decltve_item: common_decltve_item_1 { $$=""; }
block_decltve_item: tool_directive { $$=""; }
block_declarative_part: block_decltve_item
| block_declarative_part block_decltve_item
package_decltve_item: common_decltve_item
package_decltve_item: comp_decl
package_decltve_item: attribute_decl
package_decltve_item: attribute_spec
package_decltve_item: disconnection_spec
package_decltve_item: signal_decl
package_decltve_item: variable_decl
package_decltve_item: group_template_declaration
package_decltve_item: group_declaration
package_decltve_item: package_decl
package_decltve_item: package_instantiation_decl
package_decltve_item: subprogram_instantiation_decl
package_body_decltve_item: common_decltve_item
package_body_decltve_item: subprog_body
package_body_decltve_item: variable_decl
package_body_decltve_item: group_template_declaration
package_body_decltve_item: group_declaration
package_body_decltve_item: attribute_decl
package_body_decltve_item: attribute_spec
package_body_decltve_item: common_decltve_item_1
subprog_decltve_item: common_decltve_item { $$=$1; }
subprog_decltve_item: subprog_body { $$=""; }
subprog_decltve_item: attribute_decl { $$=$1; }
subprog_decltve_item: attribute_spec { $$=$1; }
subprog_decltve_item: variable_decl { $$=$1; }
subprog_decltve_item: group_template_declaration
subprog_decltve_item: group_declaration { $$=""; }
subprog_decltve_item: common_decltve_item_1 { $$=""; }
procs_decltve_item: subprog_decltve_item { $$=$1; }
config_decltve_item: attribute_spec { $$=$1; }
config_decltve_item: use_clause { $$=$1; }
config_decltve_item: group_declaration { $$=$1; }
config_decltve_item: t_USE t_VUNIT idf_list t_Semicolon { $$=$3; }
/*------------------------------------------
-- Subprograms
--------------------------------------------*/
func_prec: t_PURE { $$="pure"; }
func_prec: t_IMPURE { $$="impure"; }
subprog_decl: subprog_spec t_Semicolon { currP=0; }
subprog_spec: t_PROCEDURE t_Identifier
{
currP=VhdlDocGen::PROCEDURE;
createFunction($2,currP,0);
tempEntry=current;
}
subprog_spec_1 { newEntry(); }
subprog_spec: func_prec t_FUNCTION designator
{
currP=VhdlDocGen::FUNCTION;
createFunction($1,currP,$3.data());
}
subprog_spec_2 t_RETURN mark
{
tempEntry=current;
current->type=$7;
newEntry();
}
subprog_spec : t_FUNCTION designator
{
currP=VhdlDocGen::FUNCTION;
createFunction(0,currP,$2.data());
}
subprog_spec_2 t_RETURN mark
{
tempEntry=current;
current->type=$6;
newEntry();
}
subprog_spec_22: gen_interface_list
subprog_spec_22: gen_interface_list gen_assoc_list
subprog_spec_33: t_PARAMETER
{ param_sec=PARAM_SEC; }
interf_list
{ param_sec= 0; }
subprog_spec_33: { param_sec=PARAM_SEC; }
interf_list
{ param_sec= 0; }
subprog_spec_2: /* empty */
subprog_spec_2: subprog_spec_22 subprog_spec_33
subprog_spec_2: subprog_spec_33
subprog_spec_2: subprog_spec_22
subprog_spec_1: subprog_spec_2
subprog_body: subprog_spec t_IS subprog_body_1
{
if ($3.data())
{
FlowChart::addFlowChart(FlowChart::VARIABLE_NO,$3,0);
}
FlowChart::addFlowChart(FlowChart::BEGIN_NO,"BEGIN",0);
}
t_BEGIN seq_stats t_END subprog_body_2 t_Semicolon
{
tempEntry->endBodyLine=s_str.yyLineNr;
createFlow();
currP=0;
}
subprog_body: subprog_spec t_IS error t_END subprog_body_2 t_Semicolon
{
currP=0;
}
subprog_body_2: /* empty */
subprog_body_2: designator
subprog_body_2: t_FUNCTION
subprog_body_2: t_PROCEDURE
subprog_body_2: t_PROCEDURE t_Identifier
subprog_body_2: t_FUNCTION t_Identifier
subprog_body_2: t_FUNCTION t_STRING
subprog_body_1: /* empty */ { $$=""; }
//subprog_body_1 : subprogram_instantiation_decl
subprog_body_1: subprog_body_1 subprog_body_3 { $$=$1+$2; }
subprog_body_3: subprog_decltve_item { $$=$1; }
/*--------------------------------------------------
-- Interface Lists and Associaton Lists
----------------------------------------------------*/
interf_list: t_LeftParen interf_element interf_list_1 t_RightParen { $$=""; }
interf_list: t_LeftParen error t_RightParen { $$=""; }
interf_list_1: /* empty */
interf_list_1: interf_list_1 interf_list_2
interf_list_2: t_Semicolon interf_element
interf_element: interface_package_decl
{
// adding generic : [ package foo is new bar]
if (parse_sec==GEN_SEC)
{
addVhdlType(current->name.data(),getParsedLine(t_PACKAGE),Entry::VARIABLE_SEC,VhdlDocGen::GENERIC,$1.data(),0);
}
}
interf_element: interface_subprogram_decl
{
if (parse_sec==GEN_SEC)
{
int a=getParsedLine(t_FUNCTION);
int b=getParsedLine(t_PROCEDURE);
if (a>b) b=a;
addVhdlType(current->name.data(),b,Entry::VARIABLE_SEC,VhdlDocGen::GENERIC,$1.data(),0);
}
}
interf_element: interf_element_1 t_Identifier
{
if (parse_sec==GEN_SEC)
{
addVhdlType($2,s_str.iLine,Entry::VARIABLE_SEC,currP,$1.data(),0);
}
}
interf_element: interf_element_1 idf_list t_Colon interf_element_2 subtype_indic interf_element_3 interf_element_4
{
$$=$2+":"+$4+$5+$6+$7;
if (currP!=VhdlDocGen::COMPONENT)
{
if (currP==VhdlDocGen::FUNCTION || currP==VhdlDocGen::PROCEDURE)
{
addProto($1.data(),$2.data(),$4.data(),$5.data(),$6.data(),$7.data());
}
else
{
QCString i=$5+$6+$7;
if (currP==VhdlDocGen::GENERIC)
addVhdlType($2,s_str.iLine,Entry::VARIABLE_SEC,currP,i.data(),$4.data());
else if(parse_sec != GEN_SEC)
addVhdlType($2,s_str.iLine,Entry::VARIABLE_SEC,currP,i.data(),$4.data());
}
// fprintf(stderr,"\n\n <<port %s >>\n",$$.data());
} // if component
}
interf_element_4: /* empty :=*/ { $$=""; }
interf_element_4: t_VarAsgn expr { $$=":="+$2; }
interf_element_3: /* empty */ { $$=""; }
interf_element_3: t_BUFFER { $$="buffer"; }
interf_element_3: t_BUS { $$="bus"; }
interf_element_2: /* empty */ { $$=""; }
interf_element_2: mode { $$=$1; }
interf_element_1: /* empty */ { $$=""; }
interf_element_1: object_class { $$=$1; }
mode: t_IN { $$="in"; }
mode: t_OUT { $$="out"; }
mode: t_INOUT { $$="inout"; }
mode: t_BUFFER { $$="buffer"; }
mode: t_LINKAGE { $$="link"; }
association_list: t_LeftParen association_element association_list_1 t_RightParen { $$="("+$2+")"; }
association_list_1: /* empty */ { $$=""; }
association_list_1: association_list_1 association_list_2 { $$=$1+" "+$2; }
association_list_2: t_Comma association_element { $$=", "+$2; }
// VHDL '93 range_constraint ::= range range
gen_association_list : gen_assoc gen_assoc { $$=$1+$2;}
gen_association_list : gen_assoc { $$=$1; }
gen_assoc: t_LeftParen gen_association_element gen_association_list_1 t_RightParen
{
QCString str="("+$2+$3;
str.append(")");
$$=str;
}
gen_association_list: t_LeftParen error t_RightParen { $$=""; }
gen_association_list: t_LeftParen t_OPEN t_RightParen { $$=" ( open ) "; }
gen_association_list_1: /* empty */ { $$=""; }
gen_association_list_1: gen_association_list_1 gen_association_list_2 { $$=$1+" "+$2; }
gen_association_list_2: t_Comma gen_association_element { $$=","+$2; }
association_element: formal_part t_Arrow actual_part { $$=$1+"=>"+$3; }
association_element: actual_part { $$=$1; }
association_element: t_Box { $$="<>"; }
association_element: t_DEFAULT { $$="default"; }
/* changed ;gen_association_element : association_element */
gen_association_element: expr { $$=$1; }
gen_association_element: choice t_Arrow expr { $$=$1+"=>"+$3; }
gen_association_element: discrete_range1 { $$=$1 ; }
formal_part: name { $$=$1; }
actual_part: expr { $$=$1; }
actual_part: t_OPEN { $$="open"; }
actual_part: t_INERTIAL expr { $$="inertial"; }
/*--------------------------------------------------
-- Names and Expressions
----------------------------------------------------*/
expr: and_relation { $$=$1; }
expr: relation { $$=$1; }
shift_op: t_SLL { $$="sll"; }
| t_SRA { $$="sra"; }
| t_SLA { $$="sla"; }
| t_SRL { $$="srl"; }
| t_ROR { $$="ror"; }
| t_ROL { $$="rol"; }
;
and_relation: relation shift_op relation { $$= $1+$2+$3; }
and_relation: relation t_AND relation { $$= $1+" and "+$3; }
and_relation: relation t_XOR relation { $$= $1+" xor "+$3; }
and_relation: relation t_OR relation { $$= $1+" or "+$3; }
and_relation: relation t_NOR relation { $$= $1+" nor "+$3; }
and_relation: relation t_XNOR relation { $$= $1+"xnor"+$3; }
and_relation: relation t_NAND relation { $$= $1+"nand"+$3; }
and_relation: and_relation t_NAND relation { $$= $1+"nand"+$3; }
and_relation: and_relation t_NOR relation{ $$= $1+"nor"+$3; }
and_relation: and_relation t_XNOR relation { $$= $1+"nand"+$3; }
and_relation: and_relation t_AND relation { $$= $1+" and "+$3; }
and_relation: and_relation t_OR relation { $$= $1+" or "+$3; }
and_relation: and_relation t_XOR relation { $$= $1+" xor "+$3; }
/* ;relation : unary_operator primary */
relation: t_QQ primary { $$=" ?? "+$2; }
relation: primary { $$=$1; }
relation: t_Plus primary %prec MED_PRECEDENCE { $$="+"+$2; }
relation: t_Minus primary %prec MED_PRECEDENCE { $$="-"+$2; }
relation: t_ABS primary { $$="abs"+$2; }
relation: t_NOT primary { $$="not "+$2; }
relation: primary t_DoubleStar primary { $$=$1+" ** "+$3; }
relation: t_Minus primary t_DoubleStar primary { $$=$2+" ** "+$4; }
/* relation : relation binary_operator primary */
relation: relation t_MOD relation { $$=$1+" mod "+$3; }
relation: relation t_REM relation { $$=$1+" rem "+$3; }
relation: relation t_Ampersand relation { $$=$1+" & "+$3; }
relation: relation t_Star relation { $$=$1+" * "+$3; }
relation: relation t_Plus relation { $$=$1+" + "+$3; }
relation: relation t_Minus relation { $$=$1+" - "+$3; }
relation: relation t_LESym relation { $$=$1+" <= "+$3; }
relation: relation t_GESym relation { $$=$1+" >= "+$3; }
relation: relation t_LTSym relation { $$=$1+" < "+$3; }
relation: relation t_GTSym relation { $$=$1+" > "+$3; }
relation: relation t_EQSym relation { $$=$1+" = "+$3; }
relation: relation t_NESym relation { $$=$1+" != "+$3; }
relation: relation t_Slash relation { $$=$1+" / "+$3; }
relation: relation t_QNEQU relation { $$=$1+" ?/= "+$3; }
relation: relation t_QEQU relation { $$=$1+" ?= "+$3; }
relation: relation t_QL relation { $$=$1+" ?< "+$3; }
relation: relation t_QG relation { $$=$1+" ?> "+$3; }
relation: relation t_QLT relation { $$=$1+" ?<= "+$3; }
relation: relation t_QGT relation { $$=$1+" ?>= "+$3; }
simple_exp: t_Minus term { $$ = "-"+$2; }
| t_Plus term { $$ = "+"+$2; }
| term { $$ = $1; }
| simple_exp
adding_op term { $$ = $1+" "+$2+" "+$3; }
adding_op: t_Ampersand { $$ = "&"; }
| t_Minus { $$ = "-"; }
| t_Plus { $$ = "+"; }
;
term: factor { $$=$1; }
| factor multiplying_operator factor { $$ = $1+" "+$2+" "+$3; }
;
multiplying_operator: t_Star { $$ = "*"; }
| t_REM { $$ = "rem"; }
| t_MOD { $$ = "mod"; }
| t_Slash { $$ = "/"; }
factor: primary { $$=$1; }
| t_ABS primary { $$="abs "+$2; }
| t_NOT primary { $$="not "+$2; }
| primary t_DoubleStar primary { $$ = $1+" ** "+$3; }
primary: name { $$=$1; }
primary: literal { $$=$1; }
primary: aggregate { $$=$1; }
primary: qualified_expr { $$=$1; }
primary: allocator { $$=""; }
primary: t_LeftParen expr t_RightParen { $$="("+$2+")"; }
name: mark { $$=$1; }
name: name2 { $$=$1; }
name: external_name { $$=$1; }
name2: t_StringLit { $$=$1; }
name2: attribute_name { $$=$1; }
name2: ifts_name { $$=$1; }
mark: t_Identifier { $$=$1; }
mark: sel_name { $$=$1; }
sel_name: name t_Dot suffix { $$=$1+"."+$3; }
suffix: designator { $$=$1; }
suffix: t_CharacterLit { $$=$1; }
suffix: t_ALL { $$="all"; }
ifts_name: mark gen_association_list { $$=$1+" "+$2; }
ifts_name: name2 gen_association_list { $$=$1+" "+$2; }
sigma: t_Apostrophe { $$="'"; }
//sigma : t_LEFTBR signature1 t_RIGHTBR t_Apostrophe { $$="("+$2;;$$.append(")");$$.append("'"); }
attribute_name: mark sigma t_Identifier { $$=$1+"' "+$3; }
attribute_name: attribute_name t_LeftParen expr t_RightParen
attribute_name: name2 sigma t_Identifier { $$=$1+" '"+$3; }
attribute_name: mark sigma t_RANGE { $$=$1+"' range "; }
attribute_name: name2 sigma t_RANGE { $$=$1+"' range "; }
aggregate : element_association_list2 t_RightParen { $$=$1+" ) "; }
aggregate : t_LeftParen choices t_Arrow expr t_RightParen { $$="( "+$2+ "=>"+$4+" ) "; }
element_association_list2 : t_LeftParen element_association t_Comma element_association { $$=" ( "+$2+","+$4; }
element_association_list2 : element_association_list2 t_Comma element_association { $$=$1+","+$3; }
qualified_expr : mark t_Apostrophe t_LeftParen expr t_RightParen { $$=$1+"'("+$4+" ) "; }
qualified_expr : mark t_Apostrophe aggregate { $$=$1+"'"+$3; }
allocator: t_NEW mark mark allocator_1
allocator: t_NEW mark allocator_2
allocator: t_NEW qualified_expr
allocator_2: /* empty */
allocator_2: gen_association_list
allocator_1: /* empty */
allocator_1: gen_association_list
/*--------------------------------------------------
-- Element Association and Choices
----------------------------------------------------*/
element_association: choices t_Arrow expr { $$=$1+"=> "+$3; }
element_association: expr { $$=$1; }
choices: choice choices_1 { $$=$1+" "+$2; }
choices_1: /* empty */ { $$=""; }
choices_1: choices_1 choices_2 { $$=$1+" "+$2; }
choices_2: t_Bar choice { $$=" | "+$2; }
choice: expr { $$=$1; }
choice: discrete_range1 { $$=$1; }
choice: t_OTHERS { $$="others"; }
/*--------------------------------------------------
-- Type Declarations
----------------------------------------------------*/
type_decl: t_TYPE t_Identifier error t_Semicolon { $$=""; }
type_decl: t_TYPE t_Identifier type_decl_1 t_Semicolon
{
addVhdlType($2,getParsedLine(t_TYPE),Entry::VARIABLE_SEC,VhdlDocGen::TYPE,0,$3.data());
$$="type ";
$$+=$2+$3+";";
}
type_decl: t_TYPE error t_Semicolon { $$=""; }
type_decl_1: /* empty */ { $$=""; }
type_decl_1: t_IS type_definition { $$=" "+$2; }
type_definition: enumeration_type_definition { $$=$1; }
type_definition: range_constraint { $$=$1; }
type_definition: physical_type_definition { $$=$1; }
type_definition: unconstrained_array_definition { $$=$1; }
type_definition: constrained_array_definition { $$=$1; }
type_definition: record_type_definition { $$=$1; }
type_definition: access_type_definition { $$=$1; }
type_definition: file_type_definition { $$=$1; }
type_definition: protected_type_declaration { $$=$1; }
type_definition: protected_type_body { $$=$1; }
enumeration_type_definition: t_LeftParen enumeration_literal enumeration_type_definition_1 t_RightParen { $$="( "+$2+" "+$3+" )"; }
enumeration_type_definition_1: { $$=""; }
enumeration_type_definition_1: enumeration_type_definition_1 enumeration_type_definition_2 { $$=$1+" "+$2; }
enumeration_type_definition_2: t_Comma enumeration_literal { $$=","+$2; }
physical_type_definition : range_constraint t_UNITS base_unit_decl
physical_type_definition_1 t_END unit_stat
{
$$=$1;
current->args=$3+"#"+$4;
current->args.prepend("units");
current->spec=VhdlDocGen::UNITS;
}
unit_stat: t_UNITS t_Identifier
unit_stat: t_UNITS
physical_type_definition_1: /* empty */ { $$=""; }
physical_type_definition_1: physical_type_definition_1 physical_type_definition_2 { $$=$1+" "+$2; }
physical_type_definition_2: secondary_unit_decl { $$=$1+"#"; }
base_unit_decl: t_Identifier t_Semicolon { $$=$1; }
secondary_unit_decl: t_Identifier t_EQSym physical_literal t_Semicolon { $$=$1+"="+$3; }
unconstrained_array_definition: t_ARRAY t_LeftParen
index_subtype_definition unconstrained_array_definition_1 t_RightParen t_OF
subtype_indic
{
QCString sr1=" array ( "+$3+" "+$4;
QCString sr2=" ) of "+$7;
$$=sr1+sr2;
}
unconstrained_array_definition_1: { $$=""; }
unconstrained_array_definition_1: unconstrained_array_definition_1 unconstrained_array_definition_2 { $$=$1+" "+$2; }
unconstrained_array_definition_2: t_Comma index_subtype_definition { $$=", "+$2; }
index_subtype_definition: mark t_RANGE t_Box { $$=$1+" range<> "; }
constrained_array_definition: t_ARRAY index_constraint t_OF subtype_indic { $$=" array "+$2+" of "+$4; }
record_type_simple_name:/*empty*/ { $$=""; }
| t_Identifier { $$=$1; }
record_type_definition: t_RECORD element_decl record_type_definition_1 t_END
t_RECORD record_type_simple_name
{
QRegExp reg("[\\s]");
QCString oo=$2+" "+$3;
current->spec=VhdlDocGen::RECORD;
current->args=oo;
current->args.replace(reg,"%");
current->args.prepend("record");
$$=$2+" "+$3;
}
record_type_definition_1: /*empty*/ { $$=""; }
record_type_definition_1: record_type_definition_1 record_type_definition_2
{
$$=$1+" "+$2;
}
record_type_definition_2: element_decl { $$=$1; }
element_decl: idf_list t_Colon subtype_indic t_Semicolon { $$=$1+":"+$3+"#"; }
access_type_definition: t_ACCESS subtype_indic { $$="access "+$2; }
file_type_definition: t_FILE t_OF mark { $$="file of "+$3; }
/*--------------------------------------------------
-- Subtypes and Constraints
----------------------------------------------------*/
subtype_decl: t_SUBTYPE t_Identifier t_IS subtype_indic t_Semicolon
{
addVhdlType($2,getParsedLine(t_SUBTYPE),Entry::VARIABLE_SEC,VhdlDocGen::SUBTYPE,0,$4.data());
}
subtype_decl: t_SUBTYPE error t_Semicolon { $$=""; }
subtype_indic: mark subtype_indic_1 { $$=$1+" "+$2; }
subtype_indic: subtype_indic1 { $$=$1; }
subtype_indic_1: /* empty */ { $$=""; }
subtype_indic_1: gen_association_list { $$=$1; }
subtype_indic1: mark mark range_constraint { $$=$1+" "+$2+" "+$3; }
subtype_indic1: mark range_constraint { $$=$1+" "+$2; }
subtype_indic1: mark mark subtype_indic1_1 { $$=$1+" "+$2+" "+$3; }
subtype_indic1_1: /* empty */ { $$=""; }
subtype_indic1_1: gen_association_list { $$=$1; }
range_constraint: t_RANGE range_spec { $$="range "+$2; }
//range_constraint : array_constraint
index_constraint: t_LeftParen discrete_range
index_constraint_1
t_RightParen { $$="("+$2+" "+$3+")"; }
index_constraint_1: /* empty */ { $$=""; }
index_constraint_1: index_constraint_1
index_constraint_2 { $$=$1+" "+$2; }
index_constraint_2: t_Comma discrete_range { $$=","+$2; }
discrete_range: subtype_indic { $$=$1; }
discrete_range: range_spec { $$=$1; }
discrete_range1 : subtype_indic1 { $$=$1; }
discrete_range1 : expr direction expr { $$=$1+" "+$2+" "+$3; }
range_spec : attribute_name { $$=$1; }
range_spec : simple_exp direction simple_exp { $$=$1+" "+$2+" "+$3; }
direction : t_TO { $$=" to "; }
direction : t_DOWNTO { $$=" downto "; }
/*--------------------------------------------------
-- Objects, Aliases, Files, Disconnections
----------------------------------------------------*/
constant_decl: t_CONSTANT idf_list t_Colon subtype_indic constant_decl_1 t_Semicolon
{
QCString it=$4+" "+$5;
// fprintf(stderr,"\n currP %d \n",currP);
addVhdlType($2,getParsedLine(t_CONSTANT),Entry::VARIABLE_SEC,VhdlDocGen::CONSTANT,0,it.data());
$$="constant "+$2;
$$+=": ";
$$+=it+";";
}
constant_decl_1: /* empty */ { $$=""; }
constant_decl_1: t_VarAsgn expr { $$=":="+$2; }
signal_decl: t_SIGNAL idf_list t_Colon subtype_indic signal_decl_1 signal_decl_2 t_Semicolon
{
QCString s=$4+" "+$6;
addVhdlType($2,getParsedLine(t_SIGNAL),Entry::VARIABLE_SEC,VhdlDocGen::SIGNAL,0,s.data());
}
signal_decl_2: /* empty */ { $$=""; }
signal_decl_2: t_VarAsgn expr { $$=":="+$2; }
signal_decl_1: /* empty */ { $$=""; }
signal_decl_1: signal_kind { $$=$1; }
variable_decl: t_VARIABLE idf_list t_Colon subtype_indic variable_decl_1 t_Semicolon
{
$$=$2+":"+$4+" "+$5+";";
$$.prepend("variable: ");
}
variable_decl: t_SHARED t_VARIABLE idf_list t_Colon subtype_indic variable_decl_1 t_Semicolon
{
$$=$5+" "+$6;
addVhdlType($3,getParsedLine(t_VARIABLE),Entry::VARIABLE_SEC,VhdlDocGen::SHAREDVARIABLE,0,$$.data());
}
variable_decl_1: /* empty */ { $$=""; }
variable_decl_1: t_VarAsgn expr { $$=":="+$2; }
object_class: t_CONSTANT { $$="constant"; }
object_class: t_SIGNAL { $$="signal"; }
object_class: t_VARIABLE { $$="variable"; }
object_class: t_SHARED t_VARIABLE { $$="shared"; }
object_class: t_FILE { $$="file"; }
object_class: t_TYPE { $$="type"; }
signal_kind: t_BUS { $$="bus"; }
signal_kind: t_REGISTER { $$="register"; }
alias_decl: t_ALIAS alias_name_stat alias_spec t_IS name signature t_Semicolon
{
QCString s=$3+" is "+$5+$6;
addVhdlType($2,getParsedLine(t_ALIAS),Entry::VARIABLE_SEC,VhdlDocGen::ALIAS,0,s.data());
$$="alias "+$2;
$$+=": ";
$$+=s+";";
}
alias_decl: t_ALIAS alias_name_stat alias_spec t_IS error t_Semicolon { $$=""; }
alias_name_stat: t_Identifier { $$=$1; }
alias_name_stat: t_StringLit { $$=$1; }
alias_spec :/*empty*/ { $$=""; }
| t_Colon subtype_indic { $$=$2; }
;
file_decl: t_FILE idf_list t_Colon subtype_indic t_IS file_decl_1 expr t_Semicolon
{
addVhdlType($2,getParsedLine(t_FILE),Entry::VARIABLE_SEC,VhdlDocGen::VFILE,0,$4.data());
}
file_decl: t_FILE idf_list t_Colon t_Identifier fi_dec t_Semicolon
{
QCString s=$4+" "+$5;
addVhdlType($2,getParsedLine(t_FILE),Entry::VARIABLE_SEC,VhdlDocGen::VFILE,0,s.data());
}
fi_dec: /*empty*/ { $$=""; }
| t_OPEN expr t_IS expr { $$="open "+$2+" is "+s_str.qstr; }
file_decl_1: /* empty */ { $$=""; }
file_decl_1: mode { $$=$1; }
disconnection_spec: t_DISCONNECT signal_list t_Colon mark t_AFTER expr t_Semicolon
{ $$="disconnect "+$2+":"+$4+" after "+$6; }
signal_list: name signal_list_1 { $$=$1+$2; }
signal_list: t_OTHERS { $$="others"; }
signal_list: t_ALL { $$="all"; }
signal_list_1: /* empty */ { $$=""; }
signal_list_1: signal_list_1 signal_list_2 { $$=$1+$2; }
signal_list_2: t_Comma name { $$=" , "+$2; }
/*--------------------------------------------------
-- Attribute Declarations and Specifications
----------------------------------------------------*/
attribute_decl: t_ATTRIBUTE t_Identifier t_Colon mark t_Semicolon
{
addVhdlType($2,getParsedLine(t_ATTRIBUTE),Entry::VARIABLE_SEC,VhdlDocGen::ATTRIBUTE,0,$4.data());
$$= "attribute "+$2+ " : "+$4;
}
attribute_spec: t_ATTRIBUTE t_Identifier t_OF entity_spec t_IS expr t_Semicolon
{
QCString att=$4+" is "+$6;
addVhdlType($2,getParsedLine(t_ATTRIBUTE),Entry::VARIABLE_SEC,VhdlDocGen::ATTRIBUTE,0,att.data());
$$="attribute "+att+";";
}
entity_spec : entity_name_list signature t_Colon entity_class { $$=$1+$2+":"+$4; }
entity_name_list: designator entity_name_list_1 { $$=$1+" "+$2; }
entity_name_list: t_OTHERS { $$="others"; }
entity_name_list: t_ALL { $$="all"; }
entity_name_list_1: /* empty */ { $$=""; }
entity_name_list_1: entity_name_list_1 entity_name_list_2 { $$=$1+" "+$2; }
entity_name_list_2: t_Comma designator { $$=","+$2; }
entity_class: t_ENTITY { $$="entity"; }
entity_class: t_ARCHITECTURE { $$="architecture"; }
entity_class: t_PACKAGE { $$="package"; }
entity_class: t_CONFIGURATION { $$="configuration"; }
entity_class: t_COMPONENT { $$="component"; }
entity_class: t_LABEL { $$="label"; }
entity_class: t_TYPE { $$="type"; }
entity_class: t_SUBTYPE { $$="subtype"; }
entity_class: t_PROCEDURE { $$="procedure"; }
entity_class: t_FUNCTION { $$="function"; }
entity_class: t_SIGNAL { $$="signal"; }
entity_class: t_VARIABLE { $$="variable"; }
entity_class: t_CONSTANT { $$="constant"; }
entity_class: t_GROUP { $$="group"; }
entity_class: t_FILE { $$="file"; }
entity_class: t_UNITS { $$="units"; }
entity_class: t_LITERAL { $$="literal"; }
entity_class: t_SEQUENCE { $$="sequence"; }
entity_class: t_PROPERTY { $$="property"; }
/*--------------------------------------------------
-- Schemes
--------------------------------------------------------------------------*/
if_generation_scheme: if_scheme { $$=$1; }
if_scheme: t_IF expr t_GENERATE generate_statement_body if_scheme_1 if_scheme_2 { $$=""; }
if_scheme: t_IF lable expr t_GENERATE generate_statement_body if_scheme_1 if_scheme_2 { $$=""; }
if_scheme_2: /* empty */ { $$=""; }
if_scheme_2: t_ELSE t_GENERATE generate_statement_body { $$="else generate "+$3; }
if_scheme_2: t_ELSE lable t_GENERATE generate_statement_body { $$="else "+$2+" generate "+$4; }
if_scheme_1: /* empty */ { $$=""; }
if_scheme_1: if_scheme_1 if_scheme_3 { $$=$1+$2; }
if_scheme_3: t_ELSIF expr t_GENERATE generate_statement_body { $$="elsif "+$2+" generate "+$4; }
if_scheme_3: t_ELSIF lable expr t_GENERATE generate_statement_body { $$="elsif "+$2+$3+" generate "+$5; }
generation_scheme: for_scheme { $$=$1; }
iteration_scheme: for_scheme { $$=$1; }
iteration_scheme: while_scheme { $$=$1; }
for_scheme: t_FOR t_Identifier t_IN discrete_range
{
if (!lab.isEmpty())
{
$$=lab+" :for "+$2+" in "+$4;
}
else
{
$$=" for "+$2+" in "+$4;
}
FlowChart::addFlowChart(FlowChart::FOR_NO,0,$$,lab.data());
lab.resize(0);
}
for_scheme: t_FOR lable t_Identifier t_IN discrete_range
{
$$=lab+" for "+$2+$3+" in "+$5;
FlowChart::addFlowChart(FlowChart::FOR_NO,0,$$,lab.data());
lab="";
}
while_scheme: t_WHILE expr {
$$=" while "+$2;
FlowChart::addFlowChart(FlowChart::WHILE_NO,0,$$,lab.data());
lab="";
}
/*--------------------------------------------------
-- Concurrent Statements
----------------------------------------------------*/
concurrent_stats: concurrent_stats_1 { $$=$1; }
concurrent_stats_1: /* empty */ { $$=""; }
concurrent_stats_1: concurrent_stats_1 concurrent_stats_2 { $$=$1+$2; }
concurrent_stats_2: concurrent_stat { $$=$1; }
concurrent_stat : block_stat { $$=$1; }
| concurrent_assertion_stat { $$=$1; }
| concurrent_procedure_call { $$=$1; }
| concurrent_signal_assign_stat { $$=$1; }
| comp_inst_stat {
QCString li=$1;
$$=$1;
}
| generate_stat { $$=$1; }
| procs_stat
block_stat: t_Identifier t_Colon t_BLOCK { pushLabel(genLabels,$1); } block_stat_0 block_stat_1 block_stat_2
block_stat_3 block_stat_4 t_BEGIN concurrent_stats t_END t_BLOCK block_stat_5
t_Semicolon
{
$$=$1+":block"; //+$4+$5+$6+$7+$8+"begin "+$10+" block "+$13;
genLabels=popLabel(genLabels);
}
block_stat_5: /* empty */ { $$=""; }
block_stat_5: t_Identifier { $$=$1; }
block_stat_4: /* empty */ { $$=""; }
block_stat_4: block_stat_4 block_stat_6 { $$=$1+$2; }
block_stat_6: block_decltve_item { $$=$1; }
block_stat_3: /* empty */ { $$=""; }
block_stat_3: t_PORT interf_list t_Semicolon block_stat_7 { $$="port "+$2+";"+$4; }
//block_sta_7: /* empty */ { $$=""; }
block_stat_7: t_PORT t_MAP association_list t_Semicolon { $$="port map "+$3; }
block_stat_2: /* empty */ { $$=""; }
block_stat_2: t_GENERIC interf_list t_Semicolon block_stat_8 { $$="generic "+$2+";"+$4; }
block_stat_8: /* empty */ { $$=""; }
block_stat_8: t_GENERIC t_MAP association_list t_Semicolon { $$="generic map "+$3; }
block_stat_1: /* empty */ { $$=""; }
block_stat_1: t_LeftParen expr t_RightParen block_stat_0 { $$="("+$2+")"+$4; }
block_stat_0: /* empty */ { $$=""; }
block_stat_0: t_IS { $$=" is "; }
dot_name: t_Identifier { $$=$1; }
| dot_name t_Dot t_Identifier { $$=$1+"."+$3; }
;
mark_comp: dot_name comp_1 { $$=$1+" "+$2; }
mark_comp: dot_name { $$=$1; }
comp_1: t_LeftParen t_Identifier t_RightParen { $$="("+$2+")"; }
vcomp_stat: t_CONFIGURATION { $$="configuration";yyLineNr=s_str.iLine; }
vcomp_stat: t_ENTITY { $$="entity";yyLineNr=s_str.iLine; }
vcomp_stat: t_COMPONENT { $$="component";yyLineNr=s_str.iLine; }
comp_inst_stat: t_Identifier t_Colon name { yyLineNr=s_str.iLine; } t_GENERIC t_MAP association_list comp_inst_stat_1 t_Semicolon
{
addCompInst($1.lower().data(),$3.lower().data(),0,yyLineNr);$$="";
}
comp_inst_stat: t_Identifier t_Colon name { yyLineNr=s_str.iLine; } t_PORT t_MAP association_list t_Semicolon
{
addCompInst($1.lower().data(),$3.lower().data(),0,yyLineNr);$$="222";
}
comp_inst_stat: t_Identifier t_Colon vcomp_stat mark_comp t_PORT t_MAP association_list t_Semicolon
{
addCompInst($1.lower().data(),$4.lower().data(),$3.data(),yyLineNr);$$="";
}
comp_inst_stat: t_Identifier t_Colon vcomp_stat mark_comp t_GENERIC t_MAP association_list comp_inst_stat_1 t_Semicolon
{
addCompInst($1.lower().data(),$4.lower().data(),$3.lower().data(),yyLineNr);$$="";
}
comp_inst_stat_1: /* empty { $$=""; } */
comp_inst_stat_1: t_PORT t_MAP association_list // { $$="port map"+$3; }
concurrent_assertion_stat: t_Identifier t_Colon assertion_stat { $$=$1+":"+$3; }
concurrent_assertion_stat: assertion_stat { $$=$1; }
concurrent_assertion_stat: t_Identifier t_Colon t_POSTPONED assertion_stat { $$=$1+":"+"postponed "+$4; }
concurrent_assertion_stat: t_POSTPONED assertion_stat { $$="postponed "+$2; }
concurrent_procedure_call: t_Identifier t_Colon procedure_call_stat { $$=$1+":"+$3; }
concurrent_procedure_call: procedure_call_stat { $$=$1; }
concurrent_procedure_call: t_Identifier t_Colon t_POSTPONED procedure_call_stat { $$=$1+":"+"postponed "+$4; }
concurrent_procedure_call: t_POSTPONED procedure_call_stat { $$="postponed "+$2; }
concurrent_signal_assign_stat: t_Identifier t_Colon condal_signal_assign { $$=$1+":"+$3; }
concurrent_signal_assign_stat: condal_signal_assign { $$=$1; }
concurrent_signal_assign_stat: t_Identifier t_Colon t_POSTPONED condal_signal_assign { $$=$1+":"+"postponed "+$4; }
concurrent_signal_assign_stat: t_POSTPONED condal_signal_assign { $$="postponed "+$2; }
concurrent_signal_assign_stat: t_Identifier t_Colon t_POSTPONED sel_signal_assign { $$=$1+":"+"postponed "+$4; }
concurrent_signal_assign_stat: t_POSTPONED sel_signal_assign { $$="postponed "+$2; }
concurrent_signal_assign_stat: t_Identifier t_Colon sel_signal_assign { $$=$1+":"+$3; }
concurrent_signal_assign_stat: sel_signal_assign { $$=$1; }
condal_signal_assign: target t_LESym opts condal_wavefrms t_Semicolon { $$=$1+"<="+$3+$4; }
condal_wavefrms: wavefrm { $$=$1; }
condal_wavefrms: wavefrm t_WHEN expr { $$=$1+" when "+$3; }
condal_wavefrms: wavefrm t_WHEN expr t_ELSE condal_wavefrms { $$=$1+" when "+$3+"else"+$5; }
wavefrm: wavefrm_element wavefrm_1 { $$=$1+$2; }
wavefrm: t_UNAFFECTED { $$="unaffected"; }
wavefrm_1: /* empty */ { $$=""; }
wavefrm_1: wavefrm_1 wavefrm_2 { $$=$1+$2; }
wavefrm_2: t_Comma wavefrm_element { $$=","+$2; }
wavefrm_element: expr wavefrm_element_1 { $$=$1+$2; }
wavefrm_element_1: /* empty */ { $$=""; }
wavefrm_element_1: t_AFTER expr { $$="after "+$2; }
wavefrm_element_1: t_NULL wavefrm_element_2 { $$=" null "+$2; }
wavefrm_element_1: t_NULL { $$=" null "; }
wavefrm_element_2: t_AFTER expr { $$="after "+$2; }
target: name { $$=$1; }
target: aggregate { $$=$1; }
opts: opts_1 opts_2 { $$=$1+$2; }
opts_2: /* empty */ { $$=""; }
opts_2: t_TRANSPORT { $$="transport "; }
opts_2: t_REJECT expr t_INERTIAL { $$="transport"+$2+" intertial "; }
opts_2: t_INERTIAL { $$=" intertial "; }
opts_1: /* empty */ { $$=""; }
opts_1: t_GUARDED { $$=" guarded "; }
sel_signal_assign: t_WITH expr t_SELECT target t_LESym opts sel_wavefrms t_Semicolon
{ $$="with "+$2+" select "+$4+"<="+$6+$7; }
sel_wavefrms: sel_wavefrms_1 wavefrm t_WHEN choices { $$=$1+$2; }
sel_wavefrms_1: /* empty */ { $$=""; }
sel_wavefrms_1: sel_wavefrms_1 sel_wavefrms_2 { $$=$1+$2; }
sel_wavefrms_2: wavefrm t_WHEN choices t_Comma { $$=$1+" when "+$3; }
gen_stat1: /* empty */ { $$=""; }
| block_declarative_part t_BEGIN { $$=$1+" begin "; }
| t_BEGIN { $$="begin "; }
// problem with double end
// end;
// end generate;
generate_statement_body: gen_stat1 concurrent_stats
generate_stat : t_Identifier t_Colon
{ pushLabel(genLabels,$1); }
generation_scheme t_GENERATE
gen_stat1 concurrent_stats opstat
// stems from VHDL 2008 generate_statement_body
opstat: end_stats t_END generate_stat_1 t_Semicolon { genLabels=popLabel(genLabels); }
opstat: t_END generate_stat_1 t_Semicolon {genLabels=popLabel(genLabels); }
generate_stat: t_Identifier t_Colon
{ pushLabel(genLabels,$1); }
if_generation_scheme opstat // t_END generate_stat_1 t_Semicolon { genLabels=popLabel(genLabels); }
generate_stat: t_Identifier t_Colon case_scheme
generate_stat_1: t_GENERATE { $$=""; }
generate_stat_1: t_GENERATE t_Identifier { $$=$2; }
//end_stats :
end_stats: t_END t_Semicolon { $$="end"; }
end_stats: t_END t_Identifier t_Semicolon { $$="end "+$2; }
procs_stat: t_Identifier t_Colon procs_stat1
{
current->name=$1;
tempEntry=current;
current->endBodyLine=s_str.yyLineNr;
newEntry();
currName=$1;
}
procs_stat: procs_stat1
{
current->name=VhdlDocGen::getProcessNumber();
current->endBodyLine=s_str.yyLineNr;
tempEntry=current;
newEntry();
}
procs_stat1: procs_stat1_5
{
currP=VhdlDocGen::PROCESS;
current->startLine=s_str.yyLineNr;
current->bodyLine=s_str.yyLineNr;
}
t_PROCESS procs_stat1_1 procs_stat1_2
{
if ($5.data())
FlowChart::addFlowChart(FlowChart::VARIABLE_NO,$5.data(),0);
FlowChart::addFlowChart(FlowChart::BEGIN_NO,"BEGIN",0);
}
t_BEGIN seq_stats t_END
procs_stat1_3 t_Semicolon
{
$5.stripPrefix($4.data());
tempEntry=current;
currP=0;
createFunction(currName,VhdlDocGen::PROCESS,$4.data());
createFlow();
currName="";
}
procs_stat1: error t_END procs_stat1_3 t_Semicolon { currP=0; }
procs_stat1_3: /* empty */
procs_stat1_3: procs_stat1_5 t_PROCESS procs_stat1_6
procs_stat1_5: /* empty */ { $$=""; }
procs_stat1_5: t_POSTPONED { $$="postponed"; }
procs_stat1_6: /* empty */ { $$=""; }
procs_stat1_6: t_Identifier { $$=$1; }
procs_stat1_2: /* empty */ { $$=""; }
procs_stat1_2: t_IS { $$=""; }
procs_stat1_2: procs_stat1_2 procs_stat1_4 { $$+=$2; }
procs_stat1_4: procs_decltve_item { $$=$1; }
procs_stat1_1: /* empty */ { $$=""; }
procs_stat1_1: t_LeftParen t_ALL t_RightParen { $$="all"; }
procs_stat1_1: t_LeftParen sensitivity_list t_RightParen { $$=$2; }
sensitivity_list: name sensitivity_list_1 { $$=$1+" "+$2; }
sensitivity_list_1: /* empty */ { $$=""; }
sensitivity_list_1: sensitivity_list_1 sensitivity_list_2 { $$=$1+" "+$2; }
sensitivity_list_2: t_Comma name { $$=","+$2; }
/*--------------------------------------------------
-- Sequential Statements
----------------------------------------------------*/
seq_stats: seq_stats_1 { $$=$1; }
seq_stats_1: /* empty */ { $$=""; }
seq_stats_1: seq_stats_1 seq_stats_2 { $$=$1+$2; }
seq_stats_2: seq_stat { $$=$1; }
seq_stat: assertion_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); }
seq_stat: lable assertion_stat { $$=$1+$2; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); }
seq_stat: case_stat { $$=$1; }
seq_stat: exit_stat { $$=$1; }
seq_stat: if_stat { $$=""; }
seq_stat: loop_stat { $$=$1; }
seq_stat: next_stat { $$=$1; }
seq_stat: null_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); }
seq_stat: procedure_call_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); }
seq_stat: return_stat { $$=$1; FlowChart::addFlowChart(FlowChart::RETURN_NO,$$.data(),0); }
seq_stat: lable signal_assign_stat { $$=$1+$2; }
seq_stat: signal_assign_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); }
seq_stat: variable_assign_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); }
seq_stat: wait_stat { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); }
seq_stat: lable wait_stat { $$=$1+$2; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); }
seq_stat: report_statement { $$=$1; FlowChart::addFlowChart(FlowChart::TEXT_NO,$$.data(),0); }
report_statement: loop_stat_1 t_REPORT expr assertion_stat_2 t_Semicolon { $$=$1+"report "+$3+$4+";"; }
assertion_stat: t_ASSERT expr assertion_stat_1 assertion_stat_2 t_Semicolon { $$="assert "+$2+$3+$4+";"; }
assertion_stat_2: /* empty */ { $$=""; }
assertion_stat_2 : t_SEVERITY expr { $$=" serverity "+$2; }
assertion_stat_1 : /* empty */ { $$=""; }
assertion_stat_1 : t_REPORT expr { $$=" report "+$2; }
choice_stat : /* empty */ { $$=""; }
choice_stat : t_Q { $$="?"; }
choice_stat_1: /* empty */ { $$=""; }
choice_stat_1 : t_Q { $$="?"; }
choice_stat_1 : t_Identifier { $$=$1; }
case_stat : t_CASE choice_stat expr
{
QCString ca="case "+$2+$3;
FlowChart::addFlowChart(FlowChart::CASE_NO,0,ca);
}
t_IS case_stat_alternative case_stat_1 t_END t_CASE choice_stat_1 t_Semicolon
{
FlowChart::moveToPrevLevel();
FlowChart::addFlowChart(FlowChart::END_CASE,"end case",0);
}
case_stat : lable t_CASE choice_stat expr
{
QCString ca="case "+$3+$4;
FlowChart::addFlowChart(FlowChart::CASE_NO,0,ca);
}
t_IS case_stat_alternative case_stat_1 t_END t_CASE choice_stat_1 t_Semicolon
{
FlowChart::moveToPrevLevel();
FlowChart::addFlowChart(FlowChart::END_CASE,0,0);
}
case_stat : t_CASE error t_END t_CASE choice_stat_1 t_Semicolon { $$=""; }
case_stat_1 : /* empty */ { $$=""; }
case_stat_1 : case_stat_1 case_stat_2 { $$=$1+$2; }
case_stat_2 : case_stat_alternative { $$=$1; }
case_stat_alternative : t_WHEN choices t_Arrow
{
QCString t="when ";
t+=$2+"=> ";
FlowChart::addFlowChart(FlowChart::WHEN_NO,$2.data(),t);
}
seq_stats { $$=""; FlowChart::moveToPrevLevel(); }
if_stat: t_IF expr t_THEN
{
$2.prepend("if ");
FlowChart::addFlowChart(FlowChart::IF_NO,0,$2);
}
seq_stats
if_stat_1 if_stat_2 t_END t_IF t_Semicolon
{
FlowChart::moveToPrevLevel();
FlowChart::addFlowChart(FlowChart::ENDIF_NO,0,0);
}
if_stat_2 : /* empty */ { $$=""; }
if_stat_2 : t_ELSE
{
FlowChart::addFlowChart(FlowChart::ELSE_NO,0,0);
}
seq_stats { $$=""; }
if_stat_1 : /* empty */ { $$=""; }
if_stat_1 : if_stat_1 if_stat_3 { $$=$1+$2; }
if_stat_3 : t_ELSIF expr t_THEN
{
$2.prepend("elsif ");
FlowChart::addFlowChart(FlowChart::ELSIF_NO,0,$2.data());
} seq_stats { $$=""; }
loop_stat: loop_stat_1 loop_stat_2 t_LOOP seq_stats t_END t_LOOP loop_stat_3 t_Semicolon
{
$$=$1+$2+" loop "+$4+" end loop" +$7;
QCString endLoop="end loop" + $7;
FlowChart::moveToPrevLevel();
FlowChart::addFlowChart(FlowChart::END_LOOP,endLoop.data(),0);
}
loop_stat_3: /* empty */ { $$=""; }
loop_stat_3: t_Identifier { $$=$1; }
loop_stat_2: /* empty */ { $$="";
FlowChart::addFlowChart(FlowChart::LOOP_NO,0,"infinite loop");
}
loop_stat_2: iteration_scheme
loop_stat_1: /* empty */ { $$=""; }
loop_stat_1: t_Identifier t_Colon { $$=$1+":";lab=$1; }
exit_stat : loop_stat_1 t_EXIT exit_stat_1 exit_stat_2 t_Semicolon
{
FlowChart::addFlowChart(FlowChart::EXIT_NO,"exit",$4.data(),$3.data());
lab.resize(0);
}
exit_stat_2 : /* empty */ { $$=""; }
exit_stat_2 : t_WHEN expr { $$="when "+$2; }
exit_stat_1 : /* empty */ { $$=""; }
exit_stat_1 : t_Identifier { $$=$1;lab=$$; }
next_stat: loop_stat_1 t_NEXT next_stat_1 next_stat_2 t_Semicolon
{
FlowChart::addFlowChart(FlowChart::NEXT_NO,"next ",$4.data(),$3.data());
lab.resize(0);
}
next_stat_2: /* empty */ { $$=""; }
next_stat_2: t_WHEN expr { $$="when "+$2; }
next_stat_1: /* empty */ { $$=""; }
next_stat_1: t_Identifier { $$=$1;lab=$$; }
null_stat: t_NULL t_Semicolon { $$="null"; $$+=";"; }
procedure_call_stat: name t_Semicolon
{
$$=$1+";";
}
return_stat: t_RETURN return_stat_1 t_Semicolon { $$="return "+$2+";" ; }
return_stat_1: /* empty */ { $$=""; }
return_stat_1: expr { $$=$1; }
signal_assign_stat: target t_LESym wavefrm t_Semicolon { $$=$1+" <="+$3+";" ; }
| target t_LESym delay_mechanism wavefrm t_Semicolon { $$=$1+ "<= "+$3+$4 +";"; }
| target t_LESym t_FORCE inout_stat expr t_Semicolon { $$=$1+ "<= "+ " force "+$4+";" ; }
| target t_LESym t_RELEASE inout_stat t_Semicolon { $$=$1+ "<= "+" release "+$4 +";"; }
| selected_signal_assignment { $$=$1; }
| conditional_signal_assignment { $$=$1; }
;
variable_assign_stat: variable_assign_stat_1 t_Semicolon { $$=$1+";"; }
| conditional_variable_assignment { $$=$1; }
| lable selected_variable_assignment { $$=$1; }
| selected_variable_assignment { $$=$1; }
lable: t_Identifier t_Colon { $$=$1+":"; }
variable_assign_stat_1: target t_VarAsgn expr { $$=$1+":="+$3; }
variable_assign_stat_1: lable target t_VarAsgn expr { $$=$1+$2+":="+$4; }
wait_stat: t_WAIT wait_stat_1 wait_stat_2 wait_stat_3 t_Semicolon
{
$$="wait "+$2+$3+$4+";";
}
wait_stat_3: /* empty */ { $$=""; }
wait_stat_3: t_FOR expr { $$="for "+$2; }
wait_stat_2: /* empty */ { $$=""; }
wait_stat_2: t_UNTIL expr { $$=" until "+$2; }
wait_stat_1: /* empty */ { $$=""; }
wait_stat_1: t_ON sensitivity_list { $$=" on "+$2; }
/*--------------------------------------------------
-- Components and Configurations
----------------------------------------------------*/
comp_end_dec : t_END { lastEntity=0; lastCompound=0; genLabels.resize(0); }
| t_END t_COMPONENT entity_decl_5
| t_END t_ARCHITECTURE entity_decl_5 { lastCompound=0; genLabels.resize(0); }
| t_END t_ENTITY entity_decl_5 { lastEntity=0;lastCompound=0; genLabels.resize(0); }
| t_END t_Identifier { lastEntity=0; lastCompound=0; genLabels.resize(0); }
iss :/*empty*/ { currP=VhdlDocGen::COMPONENT; }
| t_IS { currP=VhdlDocGen::COMPONENT; }
comp_decl: t_COMPONENT t_Identifier iss comp_decl_1 comp_decl_2 comp_end_dec t_Semicolon
{
addVhdlType($2,getParsedLine(t_COMPONENT),Entry::VARIABLE_SEC,VhdlDocGen::COMPONENT,0,0);
currP=0;
}
comp_decl_2: /* empty */ { $$=""; }
comp_decl_2: t_PORT interf_list t_Semicolon { $$=$2; }
comp_decl_1: /* empty */ { $$=""; }
comp_decl_1: t_GENERIC interf_list t_Semicolon { $$=$2; }
block_config: t_FOR block_spec block_config_1 block_config_2 { levelCounter--; } t_END t_FOR t_Semicolon
{
}
block_config: t_FOR error t_END t_FOR t_Semicolon { $$=""; }
block_config_2: /* empty */ { $$=""; }
block_config_2: block_config_2 block_config_3 { $$=$1+" "; }
block_config_3: config_item { $$=$1; }
block_config_1: /* empty */ { $$=""; }
block_config_1: block_config_1 block_config_4 { $$=$1; }
block_config_4: use_clause { $$=$1; }
block_spec: name
{
$$=$1;
if (levelCounter==0)
addConfigureNode($1.data(),NULL,TRUE,FALSE);
else
addConfigureNode($1.data(),NULL,FALSE,FALSE);
levelCounter++;
}
config_item: block_config { $$=$1; }
config_item: comp_config { $$=$1; }
comp_config: t_FOR comp_spec comp_config_1 comp_config_2 t_END t_FOR t_Semicolon
{
$$=$2+" "+$3+" "+$4;
}
comp_config_2: /* empty */ { $$=""; }
comp_config_2: block_config { $$=$1; }
comp_config_1: /*empty*/ { $$=""; }
comp_config_1: binding_indic_1 binding_indic_2 t_Semicolon
{
$$="";
}
comp_config_1: t_USE t_VUNIT idf_list t_Semicolon { $$=""; }
comp_config_1: t_USE binding_indic t_Semicolon
{
addConfigureNode(compSpec.data(),$2.data(),FALSE,TRUE);
}
config_spec: t_FOR comp_spec comp_spec_stat t_Semicolon
{
addConfigureNode($2.data(),$3.data(),TRUE,FALSE,TRUE);
}
config_spec: t_FOR comp_spec comp_spec_stat t_Semicolon t_END t_FOR t_Semicolon
{
addConfigureNode($2.data(),$3.data(),TRUE,FALSE,TRUE);
}
comp_spec_stat: t_USE binding_indic {
$$=$2;
}
comp_spec_stat: t_USE t_VUNIT idf_list t_Semicolon
{
$$="";
}
comp_spec_stat: binding_indic_1 binding_indic_2
{
$$="";
}
comp_spec: inst_list t_Colon expr
{
$$=$1+":"+$3;
compSpec=$$;
}
inst_list: idf_list { $$=$1; }
inst_list: t_ALL { $$="all"; }
inst_list: t_OTHERS { $$="others"; }
binding_indic : entity_aspect binding_indic_1 binding_indic_2 { $$=$1; }
binding_indic_2: { $$=""; }
binding_indic_2: t_PORT t_MAP association_list { $$="port map "+$3; }
binding_indic_1: { $$=""; }
binding_indic_1: t_GENERIC t_MAP association_list { $$="generic map "+$3; }
entity_aspect: t_ENTITY name { $$="entity "+$2; }
entity_aspect: t_CONFIGURATION mark { $$="configuration "+ $2; }
entity_aspect: t_OPEN { $$="open "; }
;
group_constituent: t_Identifier { $$=$1; }
| t_CharacterLit { $$=$1; }
;
group_constituent_list: group_constituent { $$=$1; }
| group_constituent_list t_Comma group_constituent { $$=$1+","+$3; }
;
group_declaration : t_GROUP t_Identifier t_Colon group_name t_LeftParen group_constituent_list t_RightParen t_Semicolon
{
// $$=$2+":"+$4+$6;
$$="("+$4+$6+")";
addVhdlType($2,getParsedLine(t_GROUP),Entry::VARIABLE_SEC,VhdlDocGen::GROUP,$$.data(),0);
}
group_template_declaration : t_GROUP t_Identifier t_IS t_LeftParen entity_class_entry_list t_RightParen t_Semicolon
{
$$=$2+":"+$5;
addVhdlType($2,getParsedLine(t_GROUP),Entry::VARIABLE_SEC,VhdlDocGen::GROUP,$5.data(),0);
}
group_template_declaration: t_GROUP t_Identifier t_IS t_LeftParen error t_Semicolon t_RightParen{ $$=""; }
entity_class_entry : entity_class tbox { $$=$1+$2; }
tbox : /* empty */ { $$=""; }
tbox : t_Box { $$="<>"; }
entity_class_entry_list: entity_class_entry { $$=$1; }
| entity_class_entry_list
t_Comma entity_class_entry { $$=$1+","+$3; }
;
group_name: t_Identifier { $$=$1; }
group_name: t_StringLit { $$=$1; }
t_Identifier: t_LETTER
{
$$=s_str.qstr;
}
t_BitStringLit: t_DIGIT
{
$$=s_str.qstr;
}
t_StringLit: t_STRING
{
$$=s_str.qstr;
}
t_AbstractLit: t_ABSTRLIST
{
$$=s_str.qstr;
}
t_CharacterLit: t_CHARLIST
{
$$=s_str.qstr;
}
/*--------------------------------------------------
-- VHDL 2002 extensions
-- to do: must be added
-----------------------------------------------------*/
protected_type_declaration:t_PROTECTED protected_stats t_END protected_stat_1 { $$=""; }
protected_type_declaration:t_PROTECTED error t_END protected_stat_1 { $$=""; }
protected_stats: /* empty */
protected_stats: protected_stats protected_stat_decl_1
protected_stat_decl_1: protected_type_declaration_item
protected_stat_1: t_PROTECTED
protected_stat_1: t_PROTECTED t_Identifier
protected_type_declaration_item: use_clause
protected_type_declaration_item: attribute_spec
protected_type_declaration_item: subprog_decl
protected_type_declaration_item: subprogram_instantiation_decl
protected_type_body: t_PROTECTED t_BODY protected_body_stats t_END protected_body_stat_1 { $$=""; }
protected_type_body: t_PROTECTED t_BODY error t_END protected_body_stat_1 { $$=""; }
protected_body_stats: /* empty */
protected_body_stats: protected_body_stats protected_body_stat_decl_1
protected_body_stat_decl_1: protected_type_body_declaration_item
protected_body_stat_1: t_PROTECTED t_BODY
protected_body_stat_1: t_PROTECTED t_BODY t_Identifier
protected_type_body_declaration_item: subprog_decltve_item // same as subprog
/*--------------------------------------------------
-- VHDL 2008 extensions
-- to do: must be added
-----------------------------------------------------*/
context_ref: t_CONTEXT sel_list t_Semicolon { $$="context "+$2; }
context_decl: t_CONTEXT t_Identifier t_IS { parse_sec=CONTEXT_SEC; } libustcont_stats t_END context_stat_1 t_Semicolon
{
parse_sec=0;
QCString v=$5;
addVhdlType($2,getParsedLine(t_LIBRARY),Entry::VARIABLE_SEC,VhdlDocGen::LIBRARY,"context",$5.data());
}
context_decl: t_CONTEXT t_Identifier t_IS t_END context_stat_1 t_Semicolon
{
addVhdlType($2,getParsedLine(t_LIBRARY),Entry::VARIABLE_SEC,VhdlDocGen::LIBRARY,"context",0);
}
context_stat_1: t_CONTEXT
context_stat_1: t_CONTEXT t_Identifier
libustcont_stats: libustcont_stat { $$ = $1; }
libustcont_stats: libustcont_stats libustcont_stat { $$ = $1+"#"+$2; }
libustcont_stat: use_clause { $$ = $1; }
libustcont_stat: lib_clause { $$ = $1; }
libustcont_stat: context_ref { $$ = $1; }
package_instantiation_decl: t_PACKAGE t_Identifier t_IS t_NEW dot_name signature t_Semicolon
{
$$=" is new "+$5+$6;
//Entry * pp=lastCompound;
//Entry * pps=lastEntity ;
//assert(false);
addVhdlType($2,getParsedLine(t_PACKAGE),Entry::VARIABLE_SEC,VhdlDocGen::INSTANTIATION,"package",$$.data());
}
package_instantiation_decl: t_PACKAGE t_Identifier t_IS t_NEW dot_name signature gen_assoc_list t_Semicolon
{
$$=" is new "+$5+$6;
addVhdlType($2,getParsedLine(t_PACKAGE),Entry::VARIABLE_SEC,VhdlDocGen::INSTANTIATION,"package",$$.data());
}
package_instantiation_decl: t_PACKAGE error t_Identifier t_IS t_NEW t_Semicolon { $$=""; }
subprogram_instantiation_decl: t_FUNCTION t_Identifier t_IS t_NEW dot_name signature t_Semicolon
{
$$= " is new "+$5+$6;
addVhdlType($2,getParsedLine(t_FUNCTION),Entry::VARIABLE_SEC,VhdlDocGen::INSTANTIATION,"function ",$$.data());
}
subprogram_instantiation_decl: t_FUNCTION t_Identifier t_IS t_NEW dot_name signature gen_assoc_list t_Semicolon
{
$$=" is new "+$5+$6;
addVhdlType($2,getParsedLine(t_FUNCTION),Entry::VARIABLE_SEC,VhdlDocGen::INSTANTIATION,"function ",$$.data());
}
subprogram_instantiation_decl: t_FUNCTION t_Identifier t_IS t_NEW error t_Semicolon { $$=""; }
signature:/*empty*/ { $$=""; }
signature: t_LEFTBR signature1
t_RIGHTBR { $$="["+$2+" ]"; }
signature: t_LEFTBR t_RIGHTBR { $$="[ ]"; }
signature1: t_RETURN mark { $$="return "+$2; }
signature1: mark_stats { $$=$1; }
signature1: mark_stats t_RETURN mark { $$=$1+" return "+$3; }
mark_stats: mark { $$=$1; }
mark_stats: mark_stats mark_stats_1 { $$=$1+" "+$2; }
mark_stats_1: t_Comma mark { $$=" , "+$2; }
case_scheme: t_CASE expr t_GENERATE when_stats ttend t_END t_GENERATE generate_stat_1 t_Semicolon
case_scheme: t_CASE expr t_GENERATE when_stats t_END t_GENERATE generate_stat_1 t_Semicolon
case_scheme: t_CASE error t_GENERATE error t_END t_GENERATE generate_stat_1 t_Semicolon
when_stats_1: t_WHEN lable choices t_Arrow generate_statement_body
when_stats_1: t_WHEN choices t_Arrow generate_statement_body
when_stats: when_stats when_stats_1
when_stats: when_stats_1
ttend: t_END t_Semicolon
ttend: t_END t_Identifier t_Semicolon
conditional_signal_assignment: conditional_waveform_assignment { $$=""; }
conditional_signal_assignment: conditional_force_assignment { $$=""; }
conditional_waveform_assignment: target t_LESym wavefrm_element t_WHEN expr else_wave_list t_Semicolon
conditional_waveform_assignment: target t_LESym delay_mechanism wavefrm_element t_WHEN expr else_wave_list t_Semicolon
conditional_waveform_assignment: target t_LESym wavefrm_element t_WHEN expr t_Semicolon
conditional_waveform_assignment: target t_LESym delay_mechanism wavefrm_element t_WHEN expr t_Semicolon
conditional_waveform_assignment: target t_LESym error t_Semicolon
else_wave_list: t_ELSE expr t_WHEN expr
else_wave_list: t_ELSE expr
conditional_force_assignment: target t_LESym t_FORCE inout_stat expr t_WHEN expr else_stat t_Semicolon
conditional_force_assignment: target t_LESym t_FORCE inout_stat expr t_WHEN expr t_Semicolon
selected_signal_assignment : selected_waveform_assignment { $$=""; }
selected_signal_assignment : selected_force_assignment { $$=""; }
selected_waveform_assignment: t_WITH expr t_SELECT choice_stat
target t_LESym delay_stat sel_wave_list
delay_stat:
delay_stat: delay_mechanism
sel_wave_list: wavefrm_element t_WHEN choices t_Comma sel_wave_list
sel_wave_list: sel_wave_list_1
sel_wave_list_1: wavefrm_element t_WHEN choices t_Semicolon
selected_force_assignment: t_WITH expr t_SELECT choice_stat target t_LESym t_FORCE
inout_stat sel_var_list
inout_stat: /* empty */ { $$=""; }
inout_stat: t_IN { $$=" in "; }
inout_stat: t_OUT { $$="out"; }
delay_mechanism : t_TRANSPORT { $$=" transport "; }
| t_REJECT expr t_INERTIAL { $$=" reject "+$2+"inertial "; }
| t_INERTIAL { $$=" inertial "; }
conditional_variable_assignment : variable_assign_stat_1 t_WHEN expr else_stat t_Semicolon
conditional_variable_assignment : variable_assign_stat_1 t_WHEN expr t_Semicolon
else_stat: t_ELSE expr t_WHEN expr
else_stat: else_stat t_ELSE expr t_WHEN expr
else_stat: t_ELSE expr
selected_variable_assignment: t_WITH expr t_SELECT choice_stat select_name t_VarAsgn sel_var_list { $$=""; }
sel_var_list: expr t_WHEN choices t_Comma sel_var_list
sel_var_list: sel_var_list_1
sel_var_list_1: expr t_WHEN choices t_Semicolon
select_name: name
| aggregate
interface_subprogram_decl: iproc { $$ = $1; }
| ifunc { $$=$1; }
;
iproc: t_PROCEDURE t_Identifier param { $$ = "procedure "+$2+$3; current->name=$2; }
ifunc: t_FUNCTION func_name param t_RETURN mark return_is
{
QCString s=$6;
if (!s.isEmpty())
{
s.prepend(" is ");
}
$$=" function "+$2+$3+$5+s;
current->name=$2;
}
ifunc: func_prec t_FUNCTION func_name param t_RETURN mark return_is
{
QCString s=$7;
if (!s.isEmpty())
{
s.prepend(" is ");
}
$$=$1+" function "+$3+$4+" return "+$6+s;
current->name=$3;
}
func_name: t_Identifier { $$=$1; }
| t_StringLit { $$=$1; } // "?<"
;
return_is: /* empty */ { $$=""; }
| t_IS t_Identifier { $$=$2; }
| t_IS t_Box { $$="<>"; }
param: /* empty */ { $$=""; }
param: t_PARAMETER { $$="parameter "; }
param: t_PARAMETER { parse_sec=PARAM_SEC; }
t_LeftParen interf_element interf_list_1 t_RightParen
{ parse_sec=0; }
param: t_LeftParen interf_element interf_list_1 t_RightParen { $$="("+$2+")"; }
interface_package_decl: t_PACKAGE t_Identifier t_IS t_NEW dot_name
{
$$="package "+$2+" is new "+$5;
current->name=$2;
}
interface_package_decl: t_PACKAGE t_Identifier t_IS t_NEW dot_name gen_assoc_list
{
$$="package "+$2+" is new "+$5+"( ... )" ;
current->name=$2;
}
gen_assoc_list: t_GENERIC t_MAP association_list
gen_interface_list : t_GENERIC
{
//int u=s_str.iLine;
parse_sec=GEN_SEC;
}
interf_list
{
QCString vo=$3;
parse_sec=0;
}
external_name: t_SLSL sig_stat external_pathname t_Colon subtype_indic t_SRSR
{
QCString s="<<"+$2;
QCString s1=$3+":"+$5+">>";
$$=s+s1;
}
sig_stat: t_CONSTANT { $$="constant "; }
sig_stat: t_SIGNAL { $$="signal "; }
sig_stat: t_VARIABLE { $$="variable "; }
external_pathname: absolute_pathname { $$=$1; }
| relative_pathname { $$=$1; }
| package_path_name { $$=$1; }
;
absolute_pathname: t_Dot pathname_element_list t_Identifier { $$="."+$2+$3; }
absolute_pathname: t_Dot t_Identifier { $$="."+$2; }
relative_pathname: neg_list pathname_element_list t_Identifier { $$=$1+$2+$3; }
relative_pathname: neg_list t_Identifier { $$=$1+$2; }
neg_list: t_Neg t_Dot { $$="^."; }
neg_list: neg_list t_Neg t_Dot { $$=$1+"^."; }
pathname_element: t_Identifier { $$=$1; }
| t_Identifier t_LeftParen expr t_RightParen { $$=$1+"("+$3+")"; }
;
pathname_element_list: pathname_element t_Dot { $$=$1+"."; }
| pathname_element_list pathname_element t_Dot { $$=$1+$2+"."; }
package_path_name: t_At dot_name { $$="@"+$2; }
tool_directive: t_ToolDir
{
// fprintf(stderr,"\n tooldir %s",s_str.qstr.data() );
}
%%
extern FILE* yyout;
extern YYSTYPE vhdlscannerYYlval;
void vhdlscannerYYerror(const char* /*str*/)
{
// fprintf(stderr,"\n<---error at line %d : [ %s] in file : %s ---->",s_str.yyLineNr,s_str.qstr.data(),s_str.fileName);
// exit(0);
}
void vhdlParse()
{
vhdlscannerYYparse();
}
struct VhdlContainer* getVhdlCont()
{
return &s_str;
}
Entry* getVhdlCompound()
{
if (lastEntity) return lastEntity;
if (lastCompound) return lastCompound;
return NULL;
}
QList<VhdlConfNode>& getVhdlConfiguration() { return configL; }
static void addCompInst(char *n, char* instName, char* comp,int iLine)
{
current->spec=VhdlDocGen::INSTANTIATION;
current->section=Entry::VARIABLE_SEC;
current->startLine=iLine;
current->bodyLine=iLine;
current->type=instName; // foo:instname e.g proto or work. proto(ttt)
current->exception=genLabels.lower(); // |arch|label1:label2...
current->name=n; // foo
current->args=lastCompound->name; // architecture name
current->includeName=comp; // component/enity/configuration
int u=genLabels.find("|",1);
if (u>0)
{
current->write=genLabels.right(genLabels.length()-u);
current->read=genLabels.left(u);
}
//printf (" \n genlable: [%s] inst: [%s] name: [%s] %d\n",n,instName,comp,iLine);
if (lastCompound)
{
current->args=lastCompound->name;
if (true) // !findInstant(current->type))
{
initEntry(current);
instFiles.append(new Entry(*current));
}
Entry *temp=current; // hold current pointer (temp=oldEntry)
current=new Entry; // (oldEntry != current)
delete temp;
}
else
{
newEntry();
}
}
static void pushLabel( QCString &label,QCString & val)
{
label+="|";
label+=val;
}
static QCString popLabel(QCString & q)
{
QCString u=q;
int i=q.findRev("|");
if (i<0) return "";
q = q.left(i);
return q;
}
static void addConfigureNode(const char* a,const char*b, bool,bool isLeaf,bool inlineConf)
{
VhdlConfNode* co=0;
QCString ent,arch,lab;
QCString l=genLabels;
ent=a;
lab = VhdlDocGen::parseForConfig(ent,arch);
if (b)
{
ent=b;
lab=VhdlDocGen::parseForBinding(ent,arch);
}
int level=0;
if(!configL.isEmpty())
{
VhdlConfNode* vc=configL.getLast();
level=vc->level;
if (levelCounter==0)
pushLabel(forL,ent);
else if (level<levelCounter)
{
if (!isLeaf)
{
pushLabel(forL,ent);
}
}
else if (level>levelCounter)
{
forL=popLabel(forL);
}
}
else
{
pushLabel(forL,ent);
}
if (inlineConf)
{
confName=lastCompound->name;
}
//fprintf(stderr,"\n[%s %d %d]\n",forL.data(),levelCounter,level);
co=new VhdlConfNode(a,b,confName.lower().data(),forL.lower().data(),isLeaf);
if (inlineConf)
{
co->isInlineConf=TRUE;
}
configL.append(co);
}// addConfigure
// ------------------------------------------------------------------------------------------------------------
static bool isFuncProcProced()
{
if (currP==VhdlDocGen::FUNCTION ||
currP==VhdlDocGen::PROCEDURE ||
currP==VhdlDocGen::PROCESS
)
{
return TRUE;
}
return FALSE;
}
static void initEntry(Entry *e)
{
e->fileName = s_str.fileName;
e->lang=SrcLangExt_VHDL;
isVhdlDocPending();
initGroupInfo(e);
}
static void addProto(const char *s1,const char *s2,const char *s3,
const char *s4,const char *s5,const char *s6)
{
(void)s5; // avoid unused warning
static QRegExp reg("[\\s]");
QCString name=s2;
QStringList ql=QStringList::split(",",name,FALSE);
for (uint u=0;u<ql.count();u++)
{
Argument *arg=new Argument;
arg->name=ql[u].utf8();
if (s3)
{
arg->type=s3;
}
arg->type+=" ";
arg->type+=s4;
if (s6)
{
arg->type+=s6;
}
if (parse_sec==GEN_SEC && param_sec==0)
{
arg->defval="gen!";
}
if (parse_sec==PARAM_SEC)
{
assert(false);
}
arg->defval+=s1;
arg->attrib="";//s6;
current->argList->append(arg);
current->args+=s2;
current->args+=",";
}
}
static void createFunction(const QCString &impure,uint64 spec,
const QCString &fname)
{
current->spec=spec;
current->section=Entry::FUNCTION_SEC;
if (impure=="impure" || impure=="pure")
{
current->exception=impure;
}
if (parse_sec==GEN_SEC)
{
current->spec= VhdlDocGen::GENERIC;
current->section=Entry::FUNCTION_SEC;
}
if (currP==VhdlDocGen::PROCEDURE)
{
current->name=impure;
current->exception="";
}
else
{
current->name=fname;
}
if (spec==VhdlDocGen::PROCESS)
{
current->args=fname;
current->name=impure;
VhdlDocGen::deleteAllChars(current->args,' ');
if (!fname.isEmpty())
{
QStringList q1=QStringList::split(",",fname);
for (uint ii=0;ii<q1.count();ii++)
{
Argument *arg=new Argument;
arg->name=q1[ii].utf8();
current->argList->append(arg);
}
}
return;
}
current->startLine=s_str.iLine;
current->bodyLine=s_str.iLine;
}
static void addVhdlType(const QCString &name,int startLine,int section,
uint64 spec,const char* args,const char* type,Protection prot)
{
static QRegExp reg("[\\s]");
if (isFuncProcProced() || VhdlDocGen::getFlowMember()) return;
if (parse_sec==GEN_SEC)
{
spec= VhdlDocGen::GENERIC;
}
// more than one name ?
QStringList ql=QStringList::split(",",name,FALSE);
for (uint u=0;u<ql.count();u++)
{
current->name=ql[u].utf8();
current->startLine=startLine;
current->bodyLine=startLine;
current->section=section;
current->spec=spec;
current->fileName=s_str.fileName;
if (current->args.isEmpty())
{
current->args=args;
// current->args.replace(reg,"%"); // insert dummy chars because wihte spaces are removed
}
current->type=type;
// current->type.replace(reg,"%"); // insert dummy chars because white spaces are removed
current->protection=prot;
if (!lastCompound && (section==Entry::VARIABLE_SEC) && (spec == VhdlDocGen::USE || spec == VhdlDocGen::LIBRARY) )
{
libUse.append(new Entry(*current));
current->reset();
}
newEntry();
}
}
static void newEntry()
{
if (VhdlDocGen::isVhdlClass(current))
{
current_root->addSubEntry(current);
}
else
{
if (lastCompound)
{
lastCompound->addSubEntry(current);
}
else
{
if (lastEntity)
{
lastEntity->addSubEntry(current);
}
else
{
current_root->addSubEntry(current);
}
}
}
current = new Entry ;
initEntry(current);
}
void createFlow()
{
if (!VhdlDocGen::getFlowMember())
{
return;
}
QCString q,ret;
if (currP==VhdlDocGen::FUNCTION)
{
q=":function( ";
FlowChart::alignFuncProc(q,tempEntry->argList,true);
q+=")";
}
else if (currP==VhdlDocGen::PROCEDURE)
{
q=":procedure (";
FlowChart::alignFuncProc(q,tempEntry->argList,false);
q+=")";
}
else
{
q=":process( "+tempEntry->args;
q+=")";
}
q.prepend(VhdlDocGen::getFlowMember()->name().data());
FlowChart::addFlowChart(FlowChart::START_NO,q,0);
if (currP==VhdlDocGen::FUNCTION)
{
ret="end function ";
}
else if (currP==VhdlDocGen::PROCEDURE)
{
ret="end procedure";
}
else
{
ret="end process ";
}
FlowChart::addFlowChart(FlowChart::END_NO,ret,0);
// FlowChart::printFlowList();
FlowChart::writeFlowChart();
currP=0;
}
src/vhdlscanner.h
View file @ 99433b3d
......@@ -28,8 +28,9 @@
#include <unistd.h>
#include <qfile.h>
#include <qdict.h>
#include "vhdldocgen.h"
#include "entry.h"
#include "memberlist.h"
class Entry;
class ClassSDict;
......@@ -37,10 +38,9 @@ class FileStorage;
class ClassDef;
class MemberDef;
class QStringList;
class MemberList;
/** VHDL parser using state-based lexical scanning.
/** \brief VHDL parser using state-based lexical scanning.
*
* This is the VHDL language parser for doxygen.
*/
......@@ -50,8 +50,8 @@ class VHDLLanguageScanner : public ParserInterface
virtual ~VHDLLanguageScanner() {}
void startTranslationUnit(const char *) {}
void finishTranslationUnit() {}
void parseInput(const char * fileName,
const char *fileBuf,
void parseInput(const char * fileName,
const char *fileBuf,
Entry *root,
bool sameTranslationUnit,
QStrList &filesInSameTranslationUnit);
......@@ -75,73 +75,8 @@ class VHDLLanguageScanner : public ParserInterface
void parsePrototype(const char *text);
};
/** Container for vhdlscanner */
struct VhdlContainer
{
int yyLineNr; // current line no
int iLine; // line no of last t_identifier
QCString qstr; // t_identifier
QCString fileName; // current file
Entry* root; // root
};
/** Configuration node for VHDL */
struct VhdlConfNode
{
VhdlConfNode(const char* a,const char* b,const char* config,const char* cs,bool leaf)
{
arch=a; // architecture e.g. for iobuffer
arch=arch.lower();
binding=b; // binding e.g. use entiy work.xxx(bev)
binding=binding.lower();
confVhdl=config; // configuration foo is bar
compSpec=cs;
isInlineConf=false; // primary configuration?
isLeaf=leaf;
};
QCString confVhdl;
QCString arch;
QCString binding;
QCString compSpec;
int level;
bool isLeaf;
bool isInlineConf;
};
// returns the current conpound entity,architecture, package,package body
Entry* getVhdlCompound();
// return the current parsed entry
Entry* getCurrentVhdlEntry();
void newVhdlEntry();
void initVhdlParser();
struct VhdlContainer* getVhdlCont();
// returns the parsed line
// @ param object index of vhdl keyword like t_Identifier t_Entity
int getParsedLine(int object);
void vhdlscanFreeScanner();
void vhdlParse();
// return the list of component instantiations e.g. foo: component bar
QList<Entry> & getVhdlInstList();
// returns configuration list
QList<VhdlConfNode>& getVhdlConfiguration();
// returns library/used list
QList<Entry> & getLibUse();
void isVhdlDocPending();
//---------------------------------------------------------------------------------
#endif
src/vhdlscanner.l
View file @ 99433b3d
/************** VHDL scanner in LEX format **********
*
* Version 0.2 Wed Aug 11, 1993
*
* This scanner is derived from a scanner of the ALLIANCE CAD toolset,
* release 1.1. That toolset was written from:
* MASI/CAO-VLSI CAD Team
* Laboratoire MASI/CAO-VLSI
* Tour 55-65, 2eme etage, Porte 13
* Universite Pierre et Marie Curie (PARIS VI)
* 4, place Jussieu 75252 PARIS Cedex 05, FRANCE
* The ALLIANCE CAD Toolset can be obtained from ftp site : ftp-masi.ibp.fr
/******************************************************************************
*
* This scanner is avail at: ftp.cs.utwente.nl in pub/src/VHDL/Grammar
* A corresponding Yacc grammar is available at the same site
* Copyright (C) 1997-2014 by Dimitri van Heesch.
*
* author of this derived scanner version:
* Thomas Dettmer
* Dortmund University
* Dept. of Computer Scienc, LS1
* PB 500 500
* D-44221 Dortmund (Germany)
* Phone: +49-231-755-6464
* e-mail: dettmer@ls1.informatik.uni-dortmund.de
* Permission to use, copy, modify, and distribute this software and its
* documentation under the terms of the GNU General Public License is hereby
* granted. No representations are made about the suitability of this software
* for any purpose. It is provided "as is" without express or implied warranty.
* See the GNU General Public License for more details.
*
* Documents produced by Doxygen are derivative works derived from the
* input used in their production; they are not affected by this license.
*
****************************************************************
*
* This file is intended not to be used for commercial purposes
* without permission of the University of Dortmund
*
* NOTE THAT THERE IS NO WARRANTY FOR CORRECTNES, COMPLETENESS, SUPPORT
* OR ANYTHING ELSE.
*******************************************************/
*/
/******************************************************************************
* modified for doxygen by M. Kreis
* extended to VHDL 93/2008
* Parser for VHDL subset
* written by M. Kreis
* supports VHDL-87/93
* does not support VHDL-AMS
******************************************************************************/
%{
#ifndef YYSTYPE
typedef int YYSTYPE;
#endif
#include <search.h>
// global includes
#include <stdio.h>
#include <stdlib.h>
#include <assert.h>
#include <string.h>
#include <ctype.h>
#include <qcstring.h>
#include <qfileinfo.h>
#include <qstringlist.h>
#include <qmap.h>
#include "commentscan.h"
#include "vhdlparser.h"
/* --------------------------------------------------------------- */
// local includes
#include "vhdlscanner.h"
#include "doxygen.h"
#include "searchindex.h"
#include "scanner.h"
#include "vhdlcode.h"
#include "vhdldocgen.h"
#include "util.h"
#include "bufstr.h"
#include "message.h"
#include "vhdlcode.h"
#include "entry.h"
#include "config.h"
#include "doxygen.h"
#include "util.h"
#include "language.h"
#include "commentscan.h"
#include "index.h"
#include "definition.h"
#include "searchindex.h"
#include "outputlist.h"
#include "arguments.h"
/* --------------------------------------------------------------- */
#define YY_NEVER_INTERACTIVE 1
#define YY_NO_INPUT 1
extern void vhdlParse(); // defined in vhdlparser.y
//#define theTranslator_vhdlType theTranslator->trVhdlType
#define theTranslator_vhdlType VhdlDocGen::getVhdlType
static bool g_lexInit = FALSE;
static QStringList qrl;
static int openGroups;
static ParserInterface *g_thisParser;
static VhdlContainer* yycont=NULL;
static Entry* current_root;
static Entry gBlock;
static int yyLineNr =1;
static int g_lastCommentContext;
static const char * inputString;
static int inputPosition;
static int startComment;
static QCString inputVhdlString;
static int inputLen;
static int startComment = 0;
static QFile inputFile;
static QCString inbuf;
static Entry* global_root = 0;
static Entry* current_root = 0;
static Entry* current = 0;
static Entry* previous = 0;
static Entry* functionEntry = 0;
static Entry* lastEntity = 0;
static Entry* lastCompound = 0;
static int genPort = 0;
static QCString yyFileName;
static QList<QCString> qlist;
static QCString lastLetter;
static bool doxComment=FALSE; // doxygen comment ?
static QCString strComment;
static int iDocLine=-1;
static int* lineIndex=NULL;
static int num_chars;
static int prevToken;
static int iFuncLine = 1;
static bool g_inputFromFile ;
static bool g_lexInit = FALSE;
static int isBody=0;
static int isFunc=0;
static int yyLineNr = 1;
static char * g_buf = 0;
static uint g_bufSize = 0;
static int iTextCounter = 0;
static int iCounter = 0;
static int bropen = 0;
static int scantype = 0;
static int g_lastCommentContext = 0;
static bool docBlockAutoBrief;
static char docBlockTerm;
static int iDocLine = -1;
static Entry gBlock;
static int num_chars;
//#define YY_A_INTERACTIVE 1
#define YY_NEVER_INTERACTIVE 1
//-----------------------------------------------------------------------------
#define YY_USER_ACTION num_chars += yyleng;
static void parserInit();
static void deleteSpecChars(char* str,char *buf);
static void handleCommentBlock(const QCString &doc,bool brief);
static void newEntry();
static void initEntry(Entry *e);
static int iCodeLen;
static QMap<QCString, int> keyMap;
static QList<Entry> lineEntry;
static bool checkMultiComment(QCString& qcs,int line);
static void handleCommentBlock(const QCString &doc,bool brief);
static void mapLibPackage(Entry* ce);
static QList<Entry>* getEntryAtLine(const Entry* ce,int line);
static bool addLibUseClause(const QCString &type);
static Entry* oldEntry;
static bool varr=FALSE;
static QCString varName;
static struct
static void makeInline()
{
QCString doc;
bool brief;
bool pending;
int iDocLine;
} str_doc;
int diff=num_chars-iCodeLen;
assert(inputLen>iCodeLen+diff);
QCString par(&inputString[iCodeLen],diff);
int index=par.findRev("\\endcode");
int tt=par.length()-par.find("\n",index);
QCString qc(&inputString[iCodeLen-tt],diff);
index=qc.findRev("--!");
if (index<=0) return;
par=qc.left(index);
/*
fprintf(stderr,"\n-------------------------------------------------------------------------------- ");
fprintf(stderr,"\n bytes since %d %d \n %s",num_chars,iCodeLen,par.data());
fprintf(stderr,"\n-------------------------------------------------------------------------------- ");
*/
gBlock.doc=par;
gBlock.section=Entry::VARIABLE_SEC;
gBlock.spec=VhdlDocGen::MISCELLANEOUS;
gBlock.fileName = yyFileName;
gBlock.endBodyLine=yyLineNr-1;
Entry *temp=new Entry(gBlock);
if (lastCompound)
lastCompound->addSubEntry(temp);
else if (lastEntity)
lastEntity->addSubEntry(temp);
else
{
temp->type="misc"; // global code
current_root->addSubEntry(temp);
}
#define YY_NEVER_INTERACTIVE 1
#define YY_USER_ACTION num_chars += (int)vhdlscannerYYleng;
gBlock.reset();
#define MAX_KEYWORD_LEN 20
}// makeInline
typedef struct
static void addSubEntry(Entry* root, Entry* e)
{
char nom[MAX_KEYWORD_LEN];
int kval;
} el_mc;
if (e==0 || root==0) return;
//if (isPrevDoc)
//{
// e->brief=prevDocEntry.brief;
// e->briefLine=prevDocEntry.briefLine;
// prevDocEntry.reset();
// isPrevDoc=FALSE;
//}
root->addSubEntry(e);
}
static el_mc tab_mc []=
{
{ "abs", t_ABS },
{ "access", t_ACCESS },
{ "after", t_AFTER },
{ "alias", t_ALIAS },
{ "all", t_ALL },
{ "and", t_AND },
{ "architecture", t_ARCHITECTURE },
{ "array", t_ARRAY },
{ "assert", t_ASSERT },
{ "assume", t_ASSUME },
{ "assume_guarantee", t_ASSUME_GUARANTEE },
{ "attribute", t_ATTRIBUTE },
{ "begin", t_BEGIN },
{ "block", t_BLOCK },
{ "body", t_BODY },
{ "buffer", t_BUFFER },
{ "bus", t_BUS },
{ "case", t_CASE },
{ "component", t_COMPONENT },
{ "configuration", t_CONFIGURATION },
{ "constant", t_CONSTANT },
{ "context", t_CONTEXT },
{ "cover", t_COVER },
{ "default", t_DEFAULT },
{ "disconnect", t_DISCONNECT },
{ "downto", t_DOWNTO },
{ "else", t_ELSE },
{ "elsif", t_ELSIF },
{ "end", t_END },
{ "entity", t_ENTITY },
{ "exit", t_EXIT },
{ "fairness", t_FAIRNESS },
{ "file", t_FILE },
{ "for", t_FOR },
{ "force", t_FORCE },
{ "function", t_FUNCTION },
{ "generate", t_GENERATE },
{ "generic", t_GENERIC },
{ "group", t_GROUP },
{ "guarded", t_GUARDED },
{ "if", t_IF },
{ "impure", t_IMPURE },
{ "in", t_IN },
{ "inertial", t_INERTIAL },
{ "inout", t_INOUT },
{ "is", t_IS },
{ "label", t_LABEL },
{ "library", t_LIBRARY },
{ "linkage", t_LINKAGE },
{ "literal", t_LITERAL },
{ "loop", t_LOOP },
{ "map", t_MAP },
{ "mod", t_MOD },
{ "nand", t_NAND },
{ "new", t_NEW },
{ "next", t_NEXT },
{ "nor", t_NOR },
{ "not", t_NOT },
{ "null", t_NULL },
{ "of", t_OF },
{ "on", t_ON },
{ "open", t_OPEN },
{ "or", t_OR },
{ "others", t_OTHERS },
{ "out", t_OUT },
{ "package", t_PACKAGE },
{ "parameter", t_PARAMETER },
{ "port", t_PORT },
{ "postponed", t_POSTPONED },
{ "procedure", t_PROCEDURE },
{ "process", t_PROCESS },
{ "property", t_PROPERTY },
{ "protected", t_PROTECTED },
{ "pure", t_PURE },
{ "range", t_RANGE },
{ "record", t_RECORD },
{ "register", t_REGISTER },
{ "reject", t_REJECT },
{ "release", t_RELEASE },
{ "restrict", t_RESTRICT },
{ "restrict_guarantee", t_RESTRICT_GUARANTEE },
{ "rem", t_REM },
{ "report", t_REPORT },
{ "rol", t_ROL },
{ "ror", t_ROR },
{ "return", t_RETURN },
{ "select", t_SELECT },
{ "sequence", t_SEQUENCE },
{ "severity", t_SEVERITY },
{ "signal", t_SIGNAL },
{ "shared", t_SHARED },
{ "sla", t_SLA },
{ "sll", t_SLL },
{ "sra", t_SRA },
{ "srl", t_SRL },
{ "strong", t_STRONG },
{ "subtype", t_SUBTYPE },
{ "then", t_THEN },
{ "to", t_TO },
{ "transport", t_TRANSPORT },
{ "type", t_TYPE },
{ "unaffected", t_UNAFFECTED },
{ "units", t_UNITS },
{ "until", t_UNTIL },
{ "use", t_USE },
{ "variable", t_VARIABLE },
{ "vmode", t_VMODE },
{ "vprop", t_VPROP },
{ "vunit", t_VUNIT },
{ "wait", t_WAIT },
{ "when", t_WHEN },
{ "while", t_WHILE },
{ "with", t_WITH },
{ "xor", t_XOR },
{ "xnor", t_XNOR },
{ "zz", -1 } // list end
};
static int find_keyword(char *s)
static void bufferClear()
{
QCString word(s);
// keyword ?
if (word.length() > MAX_KEYWORD_LEN)
return -1;
int j;
for (j=0;j<iCounter+1;j++)
{
g_buf[j]=0;
}
iCounter=0;
}
word=word.lower();
QMap<QCString, int>::Iterator it = keyMap.find(word);
if (it.key())
return it.data();
static void addText (char *word, int llen)
{
if ((uint)(iCounter + llen) > g_bufSize)
{
char *pTmp = (char*)realloc(g_buf,iCounter+llen+2048);
if (pTmp)
{
g_buf = pTmp;
}
else
{
fprintf(stderr,"\n not enough memory for realloc\n");
return;
}
}
while (llen>0)
{
g_buf[iCounter]=*word++;
iCounter++;
llen--;
}
g_buf[iCounter]='\0';
}
return -1;
static void getBufText(QCString& qc,int start)
{
while (start < iCounter)
{
qc+=(g_buf[start]);
start++;
}
}
// update current line
static void lineCount()
{
for (const char* c=vhdlscannerYYtext ; *c ; ++c )
for ( const char* c = yytext ; *c ; ++c )
{
yyLineNr += (*c == '\n') ;
}
}
static void startCodeBlock(int index){
int ll=strComment.length();
iCodeLen=inputVhdlString.findRev(strComment.data())+ll;
// fprintf(stderr,"\n startin code..%d %d %d\n",iCodeLen,num_chars,ll);
//assert(false);
gBlock.reset();
int len=strComment.length();
QCString name=strComment.right(len-index);//
name=VhdlDocGen::getIndexWord(name.data(),1);
if (!name)
gBlock.name="misc"+ VhdlDocGen::getRecordNumber();
else
gBlock.name=name;
strComment=strComment.left(index);
gBlock.startLine=yyLineNr+1;
gBlock.bodyLine=yyLineNr+1;
VhdlDocGen::prepareComment(strComment);
gBlock.brief+=strComment;
}
static void makeInlineDoc(int endCode)
static void deleteSpecChars(char* str,char *buf)
{
int len=endCode-iCodeLen;
QCString par=inputVhdlString.mid(iCodeLen,len);
gBlock.doc=par;
gBlock.inbodyDocs=par;
gBlock.section=Entry::VARIABLE_SEC;
gBlock.spec=VhdlDocGen::MISCELLANEOUS;
gBlock.fileName = yyFileName;
gBlock.endBodyLine=yyLineNr-1;
gBlock.lang=SrcLangExt_VHDL;
Entry *temp=new Entry(gBlock);
Entry* compound=getVhdlCompound();
while (*str)
{
if ((*str == '\t') || (*str == '\n') || (*str == '\r') || (*str == ' '))
{
str++;
}
else
{
*buf++ = *str++;
}
}
*buf='\0';
}
if (compound)
static void getType(Entry* p,char* text)
{
QCString name(text);
name=name.stripWhiteSpace();
if (qstricmp(name.data(),"signal" )==0)
{
p->spec=VhdlDocGen::SIGNAL;
}
else if (qstricmp(name.data(),"type" )==0)
{
p->spec=VhdlDocGen::TYPE;
}
else if (qstricmp(name.data(),"subtype" )==0)
{
p->spec=VhdlDocGen::SUBTYPE;
}
else if (qstricmp(name.data(),"constant" )==0)
{
p->spec=VhdlDocGen::CONSTANT;
}
else if (qstricmp(name.data(),"attribute" )==0)
{
p->spec=VhdlDocGen::ATTRIBUTE;
}
else if (qstricmp(name.data(),"function" )==0)
{
p->spec=VhdlDocGen::FUNCTION;
}
else if (qstricmp(name.data(),"procedure" )==0)
{
p->spec=VhdlDocGen::PROCEDURE;
}
else if (qstricmp(name.data(),"units" )==0)
{
p->spec=VhdlDocGen::UNITS;
}
else if (name.contains("shared",false) && name.contains("variable",false))
{
p->spec=VhdlDocGen::SHAREDVARIABLE;
}
else if (qstricmp(name.data(),"file" )==0)
{
p->spec=VhdlDocGen::VFILE;
}
else if (qstricmp(name.data(),"group" )==0)
{
p->spec=VhdlDocGen::GROUP;
}
else if (qstricmp(name.data(),"alias" )==0)
{
compound->addSubEntry(temp);
p->spec=VhdlDocGen::ALIAS;
}
else
{
temp->type="misc"; // global code like library ieee...
current_root->addSubEntry(temp);
err("wrong type");
}
strComment.resize(0);
gBlock.reset();
p->section=Entry::VARIABLE_SEC;
}
//-------------------------------------------------------------------------
}// makeInlineDoc
/*
* adds signals found in entities|records|units
*/
static bool isConstraintFile(const QCString &fileName,const QCString &ext)
static void addSignals(const char* str,int line, Entry *e,const char *comment=0)
{
return fileName.right(ext.length())==ext;
//printf("===> addSignals (%s) comment='%s'\n",str,comment);
QList<QCString> ql;
QCString bufio;
ql.setAutoDelete(TRUE);
VhdlDocGen::getSigName(ql,str,bufio);
int count = ql.count();
QCString brief = current->brief;
QCString doc = current->doc;
Entry *tmpEntry = current;
current = new Entry;
initEntry(current);
handleCommentBlock(comment,TRUE);
if (!current->brief.isEmpty())
{
if (doc.isEmpty())
{
doc = brief;
}
else if (!brief.isEmpty())
{
doc = brief + "<p>" + doc;
}
brief = current->brief;
}
delete current;
current = tmpEntry;
current->brief.resize(0);
current->doc.resize(0);
if (genPort!=3) // not a unit
{
for (int k=1;k<count;k++)
{
//printf("adding '%s' '%s'\n",ql.at(0)->data(),ql.at(k)->data());
Entry *pTemp=new Entry;
initEntry(pTemp);
pTemp->startLine = line;
pTemp->bodyLine = line;
pTemp->name = ql.at(k)->data();
pTemp->section = Entry::VARIABLE_SEC;
pTemp->brief = brief;
pTemp->doc = doc;
pTemp->mGrpId = current->mGrpId; // copy member group id
QCString stSpec = ql.at(0)->data();
if (genPort==1) // found port
{
pTemp->spec = VhdlDocGen::PORT;
stSpec.stripPrefix(bufio.data());
stSpec=stSpec.stripWhiteSpace();
pTemp->args = stSpec;
pTemp->type = bufio;
addSubEntry(e,pTemp);
}
else if (genPort==2) // found record
{
pTemp->spec = VhdlDocGen::RECORD;
pTemp->type = stSpec;
pTemp->name.prepend(VhdlDocGen::getRecordNumber());
delete current;
current = new Entry(*pTemp); // make a deep copy of pTemp
newEntry(); // add it to lastCompound and make a new current
delete pTemp;
}
else
{
pTemp->spec = VhdlDocGen::GENERIC;
pTemp->type = stSpec;
addSubEntry(e,pTemp);
}
}// for
}
else // found a unit
{
Entry *pTemp=new Entry;
initEntry(pTemp);
QCString tt(str);
QStringList ql=QStringList::split("=",tt,FALSE);
pTemp->spec = VhdlDocGen::UNITS;
pTemp->section = Entry::VARIABLE_SEC;
pTemp->startLine = line;
pTemp->bodyLine = line;
pTemp->brief = brief; // adds brief description to the unit member
pTemp->doc = doc; // adds doc to the unit member
pTemp->type = ql[1].utf8();
pTemp->name = ql[0].utf8().stripWhiteSpace();
pTemp->name.prepend(VhdlDocGen::getRecordNumber());
delete current;
current = new Entry(*pTemp); // make a deep copy
newEntry(); // add it to lastCompound
delete pTemp;
}
}
//static void resetScanner(const char* s,MyParserVhdl* parse);
/*
* this function parses a process prototype
* and adds the signal to the process
*/
static void parseProcessProto()
{
QStringList ql;
QCString qcs;
bool sem=FALSE;
//Entry* ppEntry=new Entry;
//ppEntry->fileName=yyFileName;
//processEntry=ppEntry;
QCString name;
scantype=0;
getBufText(qcs,0);
if (qcs.contains('(') != qcs.contains(')')) return;
VhdlDocGen::deleteAllChars(qcs,'\n');
VhdlDocGen::parseProcessProto(qcs,name,ql);
current->section=Entry::FUNCTION_SEC;
//current->stat=TRUE;
current->spec=VhdlDocGen::PROCESS;
current->startLine=iFuncLine;
current->bodyLine=iFuncLine;
current->fileName=yyFileName;
if (!name.isEmpty())
{
current->name=name.stripWhiteSpace();
}
else // found an anonymous process, so we add a generated name
{
current->name=VhdlDocGen::getProcessNumber();
}
current->args+=" ( ";
if (!ql.isEmpty())
{
QValueList<QString>::Iterator iter = ql.begin();
for ( ; iter != ql.end(); ++iter)
{
if (sem)
{
current->args+=',';
}
Argument *arg=new Argument;
arg->name=(*iter).utf8().stripWhiteSpace();
current->argList->append(arg);
current->args+=(*iter).utf8();
sem = TRUE;
}
}
current->args+=" ) ";
bufferClear();
}//parseProcessProto
#undef YY_INPUT
#define YY_INPUT(buf,result,max_size) result=vhdlscannerYYread(buf,max_size);
/*
* parses a function|procedure protoype
*/
static int vhdlscannerYYread(char *buf,int max_size)
static void parseFunctionProto()
{
int c=0;
while ( c < max_size && inputVhdlString.at(inputPosition) )
QCString name,ret,qcs,temp;
bool sem=FALSE;
QList<Argument> ql;
ql.setAutoDelete(TRUE);
getBufText(qcs,0);
if (qcs.contains('(') != qcs.contains(')'))
return; // function without a prototype
if (qcs.contains("function",FALSE)==0 && qcs.contains("procedure",FALSE)==0)
return;
qcs=qcs.stripWhiteSpace();
temp=qcs.lower();
if (temp.stripPrefix("impure"))
{
*buf = inputVhdlString.at(inputPosition++) ;
c++; buf++;
current->exception="impure";
qcs=qcs.remove(0,6);
}
else if (temp.stripPrefix("pure"))
{
current->exception="pure";
qcs=qcs.remove(0,4);
}
return c;
}
%}
VhdlDocGen::parseFuncProto(qcs.data(),ql,name,ret);
//printf("parseFuncProto(%s)=%s,%s\n",qcs.data(),name.data(),ret.data());
VhdlDocGen::deleteAllChars(name,';');
current->name=name;
current->startLine=iFuncLine;
current->bodyLine=iFuncLine;
upper_case_letter [A-Z]
digit [0-9]
special_character [\#\&\'\(\)\*\+\,\-\.\/\:\;\<\=\>\_\|]
space_character [ \t]
format_effector [\t\v\r\l\f]
end_of_line \n
lower_case_letter [a-z]
other_special_character [\!\$\@\?\[\\\]\^\`\{\}\~]
int count = ql.count();
graphic_character ({basic_graphic_character}|{lower_case_letter}|{other_special_character})
basic_graphic_character ({upper_case_letter}|{digit}|{special_character}|{space_character})
letter ({upper_case_letter}|{lower_case_letter})
letter_or_digit ({letter}|{digit})
decimal_literal {integer}(\.{integer})?({exponent})?
integer {digit}(_?{digit})*
exponent ([eE][-+]?{integer})
base {integer}
based_integer {extended_digit}(_?{extended_digit})*
extended_digit ({digit}|[a-fA-F])
current->args+" ( ";
for (int k=0;k<count;k++)
{
if (sem)
{
current->args+=",";
}
Argument *arg=new Argument;
Argument *hh=(Argument*)ql.at(k);
arg->name=hh->name;
arg->type=hh->type;
arg->defval=hh->defval;
arg->attrib=hh->attrib;
current->argList->append(arg);
current->args+=hh->name;
sem=TRUE;
}
current->args+" )";
extended_character [\\]{graphic_character}*[\\]
if (!ret.isEmpty())
current->spec=VhdlDocGen::FUNCTION;
else
current->spec=VhdlDocGen::PROCEDURE;
base_specifier {digit}*(B|b|D|O|o|X|x|"UB"|"UO"|"UX"|"SB"|"SO"|"SX")
current->section=Entry::FUNCTION_SEC;
current->type=ret;
//addSubEntry(ee,ppEntry);
if (lastCompound)
{
lastCompound->addSubEntry(current);
current = new Entry;
initEntry(current);
}
else
{
newEntry();
}
bufferClear();
}//parseFunctionProto
vhdl2008tooldir `{graphic_character}+
static Entry* getEntryAtLine(const Entry* ce,int line)
{
EntryListIterator eli(*ce->children());
Entry *found=0;
Entry *rt;
for (;(rt=eli.current());++eli)
{
if (rt->bodyLine==line)
{
found=rt;
} // if
if (!found)
{
found=getEntryAtLine(rt,line);
}
}
return found;
}// getEntryAtLine
B [ \t]
BR [ \t\n\r]
//-------------------------------------------------------------------------
static void parserInit()
{
iCounter=0;
iTextCounter=0;
yyLineNr=1;
current=0;
previous=0;
isFunc=0;
isBody=0;
scantype=0;
lastCompound=0;
lastEntity=0;
bropen=0;
openGroups=0;
iDocLine=-1;
qrl.clear();
num_chars=0;
%option noyywrap
%x Comment
%x Vhdl2008Comment
%x EndVhdl2008Comment
%%
if (!g_lexInit)
{
VhdlDocGen::init();
}
{space_character} { /* nothing */ }
\& { return(t_Ampersand); }
\' { return(t_Apostrophe); }
\( { return(t_LeftParen); }
\) { return(t_RightParen); }
"**" { return(t_DoubleStar); }
\* { return(t_Star); }
\+ { return(t_Plus); }
\, { return(t_Comma); }
\- { return(t_Minus); }
":=" { return(t_VarAsgn); }
\: { return(t_Colon); }
\; { return(t_Semicolon); }
"<=" { return(t_LESym); }
">=" { return(t_GESym); }
\< { return(t_LTSym); }
\> { return(t_GTSym); }
\= { return(t_EQSym); }
\/= { return(t_NESym); }
"=>" { return(t_Arrow); }
"<>" { return(t_Box); }
"<<" { return(t_SLSL); }
">>" { return(t_SRSR); }
"??" { return(t_QQ); }
"?>=" { return(t_QGT); }
"?<=" { return(t_QLT); }
"?>" { return(t_QG); }
"?<" { return(t_QL); }
"?=" { return(t_QEQU); }
"?/=" { return(t_QNEQU); }
\? { return(t_Q); }
\| { return(t_Bar); }
\. { return(t_Dot); }
\/ { return(t_Slash); }
\@ { return(t_At); }
\^ { return(t_Neg); }
\[ { return(t_LEFTBR); }
\] { return(t_RIGHTBR); }
{letter}(_?{letter_or_digit})*|{extended_character} {
int itoken=find_keyword(vhdlscannerYYtext);
// fprintf(stderr,"\n <<<< search tok: %s %d %d>>>\n",vhdlscannerYYtext,itoken,yyLineNr);
// tokens in vhdlparser.hpp 258..412
if (itoken>200 && itoken<500 && prevToken!=t_END)
{
// printf("\n <<<< insert tok: %s %d %d>>>\n",vhdlscannerYYtext,itoken,yyLineNr);
lineIndex[itoken]=yyLineNr;
}
// global members
if (( itoken==t_ARCHITECTURE ) ||
( itoken==t_ENTITY) ||
( itoken==t_PACKAGE ) ||
( itoken==t_LIBRARY ) ||
( itoken==t_USE ) ||
( itoken==t_CONFIGURATION ) ||
( itoken==t_CONTEXT ) )
{
lineIndex[itoken]=yyLineNr;
}
prevToken=itoken;
yycont->qstr=vhdlscannerYYtext;
yycont->yyLineNr=yyLineNr;
if (itoken== -1)
{
yycont->iLine=yyLineNr;
return ( t_LETTER );
}
else
{
return ( itoken );
}
}
g_bufSize=inputFile.size()+1024;
if (g_buf==0) free(g_buf);
g_buf=(char*)(calloc(g_bufSize,sizeof(char)));
({decimal_literal})|({base}#{based_integer}(\.{based_integer})?#({exponent})?)|({base}:{based_integer}(\.{based_integer})?:({exponent})?) {
yycont->qstr=vhdlscannerYYtext;
return ( t_ABSTRLIST );
}
if (g_buf==0)
{
fprintf(stderr,"\n not enough memory");
return;
}
g_buf[g_bufSize-1]='\0';
}
'({graphic_character}|\"|\%)' {
QCString q(vhdlscannerYYtext);
yycont->qstr=vhdlscannerYYtext;
if (q=="'('") // std_logic'('1') ?
{
char c=yy_hold_char;
if (isalpha(c) || isdigit(c))
{
unput('\'');
unput('(');
return(t_Apostrophe);
}
else
{
return ( t_CHARLIST );
}
}
return ( t_CHARLIST );
}
bool VHDLLanguageScanner::needsPreprocessing(const QCString &)
{
return FALSE;
}
(\"({graphic_character}|(\"\")|\%)*\")|(\%({graphic_character}|(\%\%)|\")*\%) {
yycont->qstr=vhdlscannerYYtext;
yycont->iLine=yyLineNr;
return ( t_STRING );
}
{base_specifier}(\"{extended_digit}(_?{extended_digit})*\"|\%{extended_digit}(_?{extended_digit})*\%) {
yycont->qstr=vhdlscannerYYtext;
yycont->iLine=yyLineNr;
return ( t_DIGIT );
}
void VHDLLanguageScanner::resetCodeParserState()
{
{vhdl2008tooldir} {
yycont->qstr=vhdlscannerYYtext;
yycont->iLine=yyLineNr;
return(t_ToolDir);
}
}
\n {
yyLineNr++;
yycont->yyLineNr=yyLineNr;
}
#undef YY_INPUT
#define YY_INPUT(buf,result,max_size) result=yyread(buf,max_size);
<*>"--"[^\n]* {
/* comment */
QCString qcs(vhdlscannerYYtext);
// vhdl comment ?
if (qcs.stripPrefix("--!"))
{
REJECT;
}
else if (qcs.stripPrefix("--#"))
{
if (VhdlDocGen::getFlowMember())
{
FlowChart::addFlowChart(FlowChart::COMMENT_NO,0,0,qcs.data());
}
}
}
. { /* unknown characters */ }
<*>{B}*"--!"[^{}\n]*[^\n]*\n/{B}*"--!" { // multi line comment
if (iDocLine==-1) iDocLine=yyLineNr;
QCString qc(vhdlscannerYYtext);
int len=qc.contains('\n')+yyLineNr-1;
if (YY_START!=Comment) // Start of the comment block
static int yyread(char *buf,int max_size)
{
int c=0;
if (g_inputFromFile)
{
startComment=yyLineNr;
g_lastCommentContext=YY_START;
c = inputFile.readBlock(buf,max_size);
if (c==-1) yy_fatal_error("input in flex scanner failed");
}
if(!checkMultiComment(qc,len))
else
{
strComment+=vhdlscannerYYtext;
while ( c < max_size && inputString[inputPosition] )
{
*buf = inputString[inputPosition++] ;
c++;
buf++;
}
}
lineCount();
BEGIN(Comment);
return c;
}
<Comment>^{B}*"--!"[^\n]* {
if (iDocLine==-1) iDocLine=yyLineNr;
strComment+=vhdlscannerYYtext;
int index=strComment.find("\\code");
if (index>0)
{
startCodeBlock(index);
doxComment=TRUE;
}
lineCount();
BEGIN(Comment);
}
<Comment>.|\n {
// found end of comment block
int index =strComment.find("\\code");
if (index>0)
{
startCodeBlock(index);
}
VhdlDocGen::prepareComment(strComment);
if (index==-1 && !doxComment)
{
handleCommentBlock(strComment,FALSE);
}
strComment.resize(0);;
unput(*vhdlscannerYYtext);
doxComment=FALSE;
BEGIN(g_lastCommentContext);
}
<*>"--!"[^\n]* { // one line comment
if (iDocLine==-1) iDocLine=yyLineNr;
QCString qcs(vhdlscannerYYtext);
bool isEndCode=qcs.contains("\\endcode");
%}
int index = qcs.find("\\code");
if (isEndCode)
{
int end=inputVhdlString.find(qcs.data(),iCodeLen);
makeInlineDoc(end);
}
else if (index > 0 )
{
// assert(false);
strComment=qcs;
startCodeBlock(index);
strComment.resize(0);
}
//printf("--> handleCommentBlock line %d\n",yyLineNr);
if (!isEndCode && index==-1)
{
int j=qcs.find("--!");
qcs=qcs.right(qcs.length()-3-j);
if(!checkMultiComment(qcs,yyLineNr))
{
handleCommentBlock(qcs,TRUE);
}
}//endcode
}
<*>"/*" {
strComment+=vhdlscannerYYtext;
if (yy_hold_char=='!') // found comment starting with "/*!"
{
doxComment=TRUE;
}
BEGIN(Vhdl2008Comment);
}
/* start command character */
/* -------------- VHDL SECTION -----------------------------------*/
B [ \t]
CR [\r\n]
BR [ \t\n\r]
DIGIT [0-9]
LOWER_CASE_LETTER [a-z]
UPPER_CASE_LETTER [A-Z]
LETTER [a-zA-Z_0-9]
SPACE_CHARACTER [ \t]
SPECIAL_CHARACTER [#&'()*+,\-\./:;<=>_|]
OTHER_SPECIAL_CHARACTER [~!$§%?@\[\\\]^{}]
BASIC_GRAPHIC_CHARACTER {UPPER_CASE_LETTER}|{DIGIT}|{SPECIAL_CHARACTER}|{SPACE_CHARACTER}
GRAPHIC_CHARACTER {BASIC_GRAPHIC_CHARACTER}|{LOWER_CASE_LETTER}|{OTHER_SPECIAL_CHARACTER}
EXTENDED_CHARACTER [\\]{GRAPHIC_CHARACTER}*[\\]
NAME ({LETTER}[a-zA-Z0-9_.]*)|{EXTENDED_CHARACTER}
STRING_LITERAL \"{GRAPHIC_CHARACTER}*\"
FUNCNAME ([a-zA-Z"][*+\-_a-zA-Z0-9"\/=<>]*)|{EXTENDED_CHARACTER}
DIGITS [0-9]+|[0-9]+"."[0-9]+|[0-9]+"#"[0-9_a-fA-F\+\.]+"#"
COMMENT "--"[^\n]*
LABELID [a-z_A-Z][^\;]*";"({B}*{COMMENT})*
PROTO [ (]*
TEXTT "--"[^\/\@\*\#][^\n]*
PROC ("function"|"procedure")
ENDE ({BR}*("end"){BR}*{PROC}*{BR}*[;]{1})
ENDEFF ("if"|"case"|"loop"|"generate"){BR}*[;]
ENDE3 ({BR}*("end"){BR}*{PROC}*{BR}*{FUNCNAME}{BR}*[;])|{ENDE}
ENDFUNC {B}*"end"{BR}*{PROC}*{BR}*{FUNCNAME}{BR}*[;]
FUNCIMPURE "impure"|"pure"
FUNCPROC ^{B}*{FUNCIMPURE}*{BR}*("function"|"procedure"){B}*
ARCHITECTURE ("architecture"){BR}+{NAME}{BR}*("of")
/* Removed due to bug 538239
POST "postponed"
PROCESS ({BR}*{FUNCNAME}{B}*[:]{BR}*({POST}{BR}+)?("process"){BR}*{PROTO})|("process"){BR}*("("){BR}*{PROTO}|[^a-zA-Z]("process"){CR}|[^a-zA-Z]("process"){BR}+("is")
*/
PROCESS ({B}*{FUNCNAME}{B}*:{BR}*)?({B}*("postponed"){BR}+)?{B}*("process"){BR}*{PROTO}
ENDPROCESS ("end"){BR}*("postponed")*("process"){BR}*{FUNCNAME}*{BR}*[;]
LIBUSE ^{B}*("use"|"library"){BR}+
ENTITY ^{B}*("component"|"entity"|"package"){BR}+
PBODY ("package"){B}+("body"){BR}+{NAME}
SHARED ("shared"){BR}+("variable")
SIGTYPES ^{B}*({SHARED}|"alias"|"file"|"group"|"subtype"|"type"|"constant"|"attribute"|"signal"|"units"){BR}+
CONFIG ("configuration"){BR}+{NAME}{BR}*("of"){BR}+{NAME}{BR}+"is"
ALLTYPESMAP {B}*[_a-zA-ZA_Z0-9.() ]*{B}*
MAPCOMPONENT ({ALLTYPESMAP}{BR}*[:]{BR}*("component"|"configuration")*{ALLTYPESMAP}{BR}*{TEXTT}*{BR}*("port"|"generic"){BR}*("map"){BR}*("("){1})
MAPCOMPONENT1 ({ALLTYPESMAP}{BR}*[:]{BR}*("entity"){BR}*{ALLTYPESMAP}{BR}*("port"|"generic"){BR}*("map"){BR}*("("){1})
BRACEOPEN [(]{1}
BRACECLOSE [)]{1}
ALLID [^;()\t ]
/* VHDL 2001 */
ENDPROTECTED ("end"{BR}+"protected"{BR}+{NAME}{BR}*";")|("end"{BR}+"protected"{BR}*";")
ENDPROTECEDBODY "end"{BR}+"protected"{BR}+"body"{BR}+{NAME}
<Vhdl2008Comment>[^*]*[*]+ {
QCString tt(vhdlscannerYYtext);
int len=tt.length();
yyLineNr+=tt.contains('\n');
// delete * from comments
// /*!
// * see vim !
// */
%option noyywrap
if (yytext[len-1]=='*' && tt.contains('\n'))
{
QCString ss=tt;
VhdlDocGen::deleteAllChars(ss,' ');
VhdlDocGen::deleteAllChars(ss,'\t');
if (ss.data() && ss.at(ss.length()-2)=='\n')
{
tt=tt.left(len-1);
len--;
}
}
/* language parsing states */
// fprintf(stderr,"\n << %s >>",tt.data());
strComment+=tt;
char c=yy_hold_char;
if (c =='/')
{
unput('*');
BEGIN(EndVhdl2008Comment);
}
else
{
BEGIN(Vhdl2008Comment);
}
}
%x Start
%x Comment
%x FindTypeName
%x ParseType
%x ParseRecord
%x ParseUnits
%x ParseProcess
%x ParseFunc
%x FindName
%x FindEntityName
%x FindGenPort
%x FindTypes
%x FindSigName
%x FindFuncName
%x FindBegin
<EndVhdl2008Comment>"*/" {
if (doxComment)
{
strComment.stripPrefix("/*!");
strComment= strComment.left( strComment.length()-1);
handleCommentBlock( strComment,TRUE);
}
doxComment=FALSE;
strComment.resize(0);
BEGIN(INITIAL);
}
%%
<Start>{ENDPROTECTED}|{ENDPROTECEDBODY} {
lineCount();
}
%%
static void parserInit()
{
num_chars=0;
lineIndex=(int*)malloc(500*sizeof(int));
if (!g_lexInit)
{
VhdlDocGen::init();
el_mc oop;
int p=0;
while ((oop=tab_mc[p++]).kval!=-1)
<Start>{CONFIG} { // found configuration
QCString qcs(vhdlscannerYYtext);
current->name=VhdlDocGen::getIndexWord(qcs,1);
current->type=VhdlDocGen::getIndexWord(qcs,3);
current->startLine=yyLineNr;
current->bodyLine=yyLineNr;
current->section=Entry::VARIABLE_SEC;
current->spec=VhdlDocGen::CONFIG;
current->args="configuration";
newEntry();
BEGIN(Start);
}
<Start>{SIGTYPES} { // found type constant|type|attribute and so on..
bropen=0;
lineCount();
bufferClear();
//pEntry=current;
getType(current,yytext);
current->bodyLine=yyLineNr;
if (current->spec==VhdlDocGen::UNITS)
{
//addSubEntry(current,pEntry);
current->startLine=yyLineNr;
current->bodyLine=yyLineNr;
newEntry(); // adds the unit to the lastCompound
genPort=3;
BEGIN(ParseRecord);
}
else
{
QCString q(&oop.nom[0]);
keyMap.insert(q,oop.kval);
BEGIN(FindTypeName);
}
}
<Start>{ARCHITECTURE} { //found architecure
lineCount();
bropen=0;
bufferClear();
isBody=0;
lastCompound = current;
QCString curName=VhdlDocGen::getIndexWord(yytext,1);
current->section=Entry::CLASS_SEC; //Entry::CLASS_SEC;
current->spec=VhdlDocGen::ARCHITECTURE;
current->protection=Private;
current->name=curName;
current->fileName=yyFileName;
current->startLine=yyLineNr;
current->bodyLine=yyLineNr;
//printf("-> Architecture at line %d\n",yyLineNr);
BEGIN(FindName);
}
void vhdlscanFreeScanner()
{
#if defined(YY_FLEX_SUBMINOR_VERSION)
if (g_lexInit)
<Start>{PROCESS} { //found process
lineCount();
iFuncLine=yyLineNr;
bropen=0;
//printf("--> Process: line=%d\n",yyLineNr);
bufferClear();
addText(yytext,yyleng);
QCString qcs(yytext);
if (qcs.contains('('))
{
vhdlscannerYYlex_destroy();
bropen=1;
scantype=2;
BEGIN(ParseType);
}
else
{
// iFuncLine--;
parseProcessProto();
BEGIN(ParseProcess);
}
}
<Start>{LIBUSE}{BR}* { // found library or package
bropen=0;
bufferClear();
isBody=0;
QCString qcs=QCString(yytext);
// lowerString(qcs);
qcs=qcs.stripWhiteSpace();
if (qstricmp(qcs.data(),"use")==0)
{
current->spec=VhdlDocGen::USE;
current->type="package";
}
else
{
current->spec=VhdlDocGen::LIBRARY;
current->type="library";
}
current->section=Entry::VARIABLE_SEC;
current->bodyLine=yyLineNr;
lineCount();
BEGIN(FindName);
}
<Start>{FUNCPROC} { // found a new function|procedure
lineCount();
iFuncLine=yyLineNr;
bropen=0;
bufferClear();
isFunc=1;
addText(yytext,yyleng);
BEGIN(FindFuncName);
}
<Start>{ENTITY} { // found entity|component|package
lineCount();
//printf("--> Entity at line %d\n",yyLineNr);
bropen=0;
bufferClear();
QCString word = QCString(yytext).lower().stripWhiteSpace();
if (word=="entity")
{
isBody=0;
scantype=0;
lastCompound=0;
current->section=Entry::CLASS_SEC;
current->spec=VhdlDocGen::ENTITY;
current->protection=Public;
current->bodyLine=yyLineNr;
current->fileName=yyFileName;
lastEntity = current;
}
else if (word=="component")
{
current->section=Entry::VARIABLE_SEC;
// current->stat=TRUE;
current->spec=VhdlDocGen::COMPONENT;
current->bodyLine=yyLineNr;
scantype=1;
}
else if (word=="package")
{
isBody=0;
scantype=0;
lastCompound = current;
current->section=Entry::NAMESPACE_SEC;
current->spec=VhdlDocGen::PACKAGE;
current->protection=Package; //VhdlDocGen::PACKAGE;
current->bodyLine=yyLineNr;
current->fileName=yyFileName;
}
else
err("\n found wrong component at line [%d]",yyLineNr);
BEGIN(FindEntityName);
}
<Start>{MAPCOMPONENT}|{MAPCOMPONENT1} { // found component instantiation
// lineCount();
QCString type;
QCString tt(yytext);
QRegExp regg("[\\s:.()-]");
QStringList qsl=QStringList::split(regg,tt,false);
// consider upper/lower-case letters
QStringList qsltemp=QStringList::split(regg,tt.lower(),false);
int index=qsltemp.findIndex(QCString("entity"))+1;
index+=qsltemp.findIndex(QCString("component"))+1;
index+=qsltemp.findIndex(QCString("configuration"))+1;
int len=qsltemp.count();
current->spec=VhdlDocGen::COMPONENT_INST;
current->section=Entry::VARIABLE_SEC;
current->startLine=yyLineNr;
current->bodyLine=yyLineNr;
if (index!=0 && tt.contains(')')==0) // found component instantiation xxx: configuration/component/entity yyy
{
current->type=qsl[len-3].utf8();
}
else if (index!=0 && tt.contains(')')) // found component instantiation xxx: entity www.yyy(zzz)
{
current->type=qsl[len-4].utf8();
}
else
{
current->type=qsl[1].utf8(); // found component instantiation xxx:yyy
}
current->name=qsl[0].utf8();
#if 0
if (lastCompound)
{
if (!VhdlDocGen::foundInsertedComponent(current->type,lastCompound))
{
printf("** %s: new BaseInfo(%s)\n",lastCompound->name.data(),current->type.data());
BaseInfo *bb=new BaseInfo(current->type,Public,Normal);
lastCompound->extends->append(bb);
}
lastCompound->addSubEntry(current);
current = new Entry;
initEntry(current);
}
else
#endif
{
newEntry();
}
lineCount();
}
void VHDLLanguageScanner::resetCodeParserState()
{
<Start>{CR}* {
lineCount();
addText(yytext,yyleng);
BEGIN(Start);
}
bool VHDLLanguageScanner::needsPreprocessing(const QCString & /*extension*/)
{
return TRUE;
<ParseProcess>[^;()] {
// eat process body
lineCount();
BEGIN(ParseProcess);
}
void VHDLLanguageScanner::parsePrototype(const char *text)
{
varName=text;
varr=TRUE;
}
// do parsing
//int VhdlParser::doLex()
//{
// int token=vhdlscannerYYlex();
// //fprintf(stderr,"\ntoken: %d at line: %d",token,yyLineNr);
// return token;
//}
void VHDLLanguageScanner::parseInput(const char *fileName,
const char *fileBuf,
Entry *root,
bool /*sameTranslationUnit*/,
QStrList & /*filesInSameTranslationUnit*/)
{
yyFileName=QCString(fileName);
<ParseProcess,ParseType>{ENDPROCESS} { // find end of process
lineCount();
current->endBodyLine=yyLineNr;
//printf("Process: start=%d end=%d\n",current->bodyLine,current->endBodyLine);
if (lastCompound)
{
lastCompound->addSubEntry(current);
current = new Entry;
initEntry(current);
}
else
{
newEntry();
}
BEGIN(Start);
}
<ParseUnits>{BR}* {
lineCount();
}
<ParseUnits>{B}*[a-z_][^\n;]* { // parse record|unit body
lineCount();
QCString zz(yytext);
addSignals(zz.data(),yyLineNr,current);
BEGIN(ParseUnits);
}
bool xilinx_ucf=isConstraintFile(yyFileName,".ucf");
bool altera_qsf=isConstraintFile(yyFileName,".qsf");
<FindName>{NAME} { // found entity|architecture|component name
lineCount();
// support XILINX(ucf) and ALTERA (qsf) file
QCString qcs(yytext);
qcs=qcs.stripWhiteSpace();
if (current->spec==VhdlDocGen::USE || current->spec==VhdlDocGen::LIBRARY)
{
int j=qcs.length();
int i=qcs.find(".");
if (i>0)
qcs=qcs.right(j-i-1);
i=qcs.find(".");
if (i>0)
qcs=qcs.left(i);
/*
-- Consider the case we have more than one entity in one file.Each entity has its own package/library
-- declaration. In this case package yyy will be added [with newEntry()] to architecture aaa !! instead to entity
-- bbb. We must place these constructs to current_root and the function mapLibPackage() will finish the rest.
-- package xxx;
-- entity aaa
-- ....
-- end entity aaa;
-- architecture aaa
-- ...
-- end architecture aaa;
-- package yyy;
-- entity bbb;
*/
current->name=qcs;
Entry *copy=new Entry(*current);
current->reset();
addSubEntry(current_root,copy); // insert into entry list with mapLibPackage()
}
else if (current->spec==VhdlDocGen::ARCHITECTURE)
{
//current->name+=qcs.lower();
current->name.prepend(qcs+"::");
//if (lastEntity)
//{
// inherit private inheritance relation between entity and architecture
//if (!VhdlDocGen::foundInsertedComponent(current->name,lastEntity))
//{
// BaseInfo *bb=new BaseInfo(current->name,Private,Normal);
// lastEntity->extends->append(bb);
//}
//}
if (xilinx_ucf)
{
VhdlDocGen::parseUCF(fileBuf,root,yyFileName,FALSE);
return;
}
if (altera_qsf)
{
VhdlDocGen::parseUCF(fileBuf,root,yyFileName,TRUE);
return;
else if (current->spec==VhdlDocGen::PACKAGE_BODY)
{
current->name+=qcs;
}
else
{
current->name+=qcs;
}
printlex(yy_flex_debug, TRUE, __FILE__, fileName);
if (!(current->spec==VhdlDocGen::USE || current->spec==VhdlDocGen::LIBRARY))
newEntry();
::parserInit();
yycont=getVhdlCont();
yycont->root=root;
yycont->fileName=fileName;
initVhdlParser();
QCString pPuffer(" ");
pPuffer+=fileBuf;
BEGIN(Start);
}
inputFile.setName(fileName);
if (g_lexInit)
<FindFuncName>{FUNCNAME} { // found name of a process|function|procedure
lineCount();
addText(yytext,yyleng);
BEGIN(ParseType);
}
<FindTypeName>{NAME}{BR}* {
lineCount();
current->name=QCString(yytext);
BEGIN(ParseType);
}
<ParseType>("is"){BR}+("protected"){BR}+("body") {lineCount(); BEGIN(Start); }
<ParseType>("is"){BR}+("protected"){BR}+ {
lineCount();
current->section=Entry::VARIABLE_SEC;
current->spec=VhdlDocGen::TYPE;
current->type="protected";
newEntry();
BEGIN(Start);
}
<ParseType>("is"){BR}*("record") { // find record
lineCount();
if (isFunc)
{
vhdlscannerYYrestart( vhdlscannerYYin );
BEGIN(Start);
}
g_lexInit=TRUE;
g_thisParser=this;
inputPosition=0;
inputVhdlString=fileBuf;
yyLineNr=1;
current_root=root;
groupEnterFile(fileName,yyLineNr);
vhdlParse();
Entry* curr=getCurrentVhdlEntry(); // delete last current
delete curr;
curr=0;
free(lineIndex);
inputFile.close();
mapLibPackage(root);
printlex(yy_flex_debug, FALSE, __FILE__, fileName);
genPort=2;
current->section=Entry::VARIABLE_SEC;
current->spec=VhdlDocGen::RECORD;
addText(yytext,yyleng);
newEntry(); // adds the record to the last compound
BEGIN(ParseRecord);
}
void VHDLLanguageScanner::parseCode(CodeOutputInterface &codeOutIntf,
const char *scopeName,
const QCString &input,
SrcLangExt /*lang*/,
bool isExampleBlock,
const char *exampleName,
FileDef *fileDef,
int startLine,
int endLine,
bool inlineFragment,
MemberDef *memberDef,
bool showLineNumbers,
Definition *searchCtx,
bool collectXRefs
)
{
::parseVhdlCode(codeOutIntf,scopeName,input,isExampleBlock,exampleName,
fileDef,startLine,endLine,inlineFragment,memberDef,
showLineNumbers,searchCtx,collectXRefs);
<ParseRecord>{BR}* {
lineCount();
}
<ParseRecord>("end"){BR}*("record"){BR}*{LETTER}*{BR}*[;]|("end"){BR}*("units"){BR}*[;] {
lineCount();
genPort=0;
bufferClear();
BEGIN(Start);
}
/*
* adds the library|use statements to the next class (entity|package|architecture|package body
* library ieee
* entity xxx
* .....
* library
* package
* enity zzz
* .....
* and so on..
*/
static void mapLibPackage( Entry* root)
{
QList<Entry> epp=getLibUse();
EntryListIterator eli(epp);
Entry *rt;
for (;(rt=eli.current());++eli)
<ParseRecord>[a-z_A-Z0-9][^\n;]*";"({B}*{COMMENT})* { // parse record body
lineCount();
QCString comment;
QCString zz(yytext);
VhdlDocGen::deleteAllChars(zz,';'); //delete ; in unit construct
if (zz.contains("--!"))
{
QStringList ql=QStringList::split("--!",zz,FALSE);
comment = ql[1].utf8();
zz = ql[0].utf8();
}
else if (zz.contains("--"))
{
QStringList ql=QStringList::split("--",zz,FALSE);
zz = ql[0].utf8();
}
initEntry(current);
addSignals(zz,yyLineNr,current,comment);
addText(yytext,yyleng);
BEGIN(ParseRecord);
}
<ParseType>{BR}+("is"){BR}+|{BR}+("is"){B}*"--" { // found a new function in an architecture ?
addText(yytext,yyleng);
lineCount();
QCString ttt;
bool bb=TRUE;
getBufText(ttt,0);
if (ttt.contains("--"))
{
unput('-');unput('-');
VhdlDocGen::deleteCharRev(ttt,'-');
VhdlDocGen::deleteCharRev(ttt,'-');
}
if (ttt.contains('(') != ttt.contains(')'))
{
bb=FALSE;
}
bool ss = VhdlDocGen::isFunctionProto(ttt);
//printf("VhdlDocGen::isFunctionProto(%s)=%d\n",ttt.data(),ss);
if (ss && bb)
{
if (addLibUseClause(rt->name))
bufferClear();
addText(ttt.data(),ttt.length());
functionEntry=0;
//eFuncBody=new Entry;
::parseFunctionProto();
}
bufferClear();
BEGIN(ParseType);
}
<ParseType>[^;()\t ] {
lineCount();
addText(yytext,yyleng);
BEGIN(ParseType);
}
<ParseType>{BRACEOPEN} {
lineCount();
bropen++;
addText(yytext,yyleng);
BEGIN(ParseType);
}
<ParseType>{BRACECLOSE} {
lineCount();
bropen--;
addText(yytext,yyleng);
if (bropen==0 && scantype==2) // process
{
::parseProcessProto();
BEGIN(ParseProcess);
} // if
else
{
BEGIN(ParseType);
}
}
<ParseType>{ENDE}|{ENDFUNC} { // found end of function|process
QRegExp regg("[\\s;]");
lineCount();
QCString tt(yytext);
tt=tt.lower();
QStringList ql=QStringList::split(regg,tt,FALSE);
int index=ql.findIndex(QCString("if"))+1;
index+=ql.findIndex(QCString("case"))+1;
index+=ql.findIndex(QCString("loop"))+1;
index+=ql.findIndex(QCString("generate"))+1;
bufferClear();
if (index==0)
{
if (isFunc)
{
Entry* pFunc=getEntryAtLine(current_root,iFuncLine);
if (pFunc && pFunc->section==Entry::FUNCTION_SEC)
{
pFunc->endBodyLine=yyLineNr;
}
isFunc=0;
BEGIN(Start);
}
}
}
<ParseFunc>[^;()] {
// eat process body
lineCount();
BEGIN(ParseFunc);
}
<ParseFunc>{ENDE3} {
QRegExp regg("[\\s;]");
lineCount();
QCString tt(yytext);
tt=tt.lower();
QStringList ql=QStringList::split(regg,tt,FALSE);
int index=ql.findIndex(QCString("if"))+1;
index+=ql.findIndex(QCString("case"))+1;
index+=ql.findIndex(QCString("loop"))+1;
index+=ql.findIndex(QCString("generate"))+1;
bufferClear();
if (index==0 && isFunc)
{
Entry* pFunc=getEntryAtLine(current_root,iFuncLine);
if (pFunc && pFunc->section==Entry::FUNCTION_SEC)
{
pFunc->endBodyLine=yyLineNr;
}
isFunc=0;
BEGIN(Start);
}
}
<ParseType>";" {
lineCount();
addText(yytext,yyleng);
if (bropen==0 && !(isFunc==1 && isBody==1) )
{
if (isFunc)
{
parseFunctionProto();
bufferClear();
if (lastCompound && lastCompound->spec==VhdlDocGen::PACKAGE)
{
isFunc=0;
BEGIN(Start);
}
else
{
BEGIN(ParseFunc);
}
}//if
else
{
Entry *current;
EntryListIterator eLib(*root->children());
bool bFound=FALSE;
for (eLib.toFirst();(current=eLib.current());++eLib)
QCString qcs;
getBufText(qcs,0);
qcs=qcs.stripWhiteSpace();
current->section=Entry::VARIABLE_SEC;
current->type+=qcs.data();
if ((current->spec==VhdlDocGen::SIGNAL ||
current->spec==VhdlDocGen::CONSTANT ||
current->spec==VhdlDocGen::TYPE ||
current->spec==VhdlDocGen::SUBTYPE ||
current->spec==VhdlDocGen::SHAREDVARIABLE
) &&
qcs.stripPrefix(","))
{
QList<QCString> ql;
ql.setAutoDelete(TRUE);
QCString buffer;
if (current->spec==VhdlDocGen::SUBTYPE ||
current->spec==VhdlDocGen::TYPE
)
{
VhdlDocGen::getSigTypeName(ql,qcs.data(),buffer);
}
else
{
VhdlDocGen::getSigName(ql,qcs.data(),buffer);
}
QCString doc = current->doc;
QCString brief = current->brief;
if (ql.count()>0)
{
for (uint j=1;j<ql.count();j++)
{
Entry *ppt = new Entry;
initEntry(ppt);
ppt->type += ql.at(0)->data();
ppt->section = Entry::VARIABLE_SEC;
ppt->spec = current->spec;
ppt->name += ql.at(j)->data();
ppt->bodyLine = yyLineNr;
ppt->startLine = yyLineNr;
ppt->brief = brief;
ppt->doc = doc;
if (lastCompound)
{
lastCompound->addSubEntry(ppt);
}
else
{
current->addSubEntry(ppt);
}
}
current->type=ql.at(0)->data();
ql.clear();
}
}
if (lastCompound)
{
if (VhdlDocGen::isVhdlClass(current))
if (current->startLine > rt->startLine)
{
bFound=TRUE;
current->addSubEntry(rt);
break;
}
}//for
if (!bFound)
lastCompound->addSubEntry(current);
current = new Entry;
initEntry(current);
}
else
{
root->addSubEntry(rt);
newEntry();
}
} //if
}// for
isFunc=0;
bufferClear();
BEGIN(Start);
}
}
else
{
BEGIN(ParseType);
}
}
epp.clear();
}//MapLib
<ParseType>{BR}* {
lineCount();
addText(yytext,yyleng);
BEGIN(ParseType);
}
static bool addLibUseClause(const QCString &type)
{
static bool showIEEESTD=Config_getBool("FORCE_LOCAL_INCLUDES");
<FindEntityName>{NAME} { // found name of an entity/architecture/package
lineCount();
QCString qcs(yytext);
qcs=qcs.stripWhiteSpace();
qcs=qcs.lower();
if (qcs=="body") // found package body
{
current->spec=VhdlDocGen::PACKAGE_BODY;
current->section=Entry::CLASS_SEC;
current->protection=Protected;
current->name+=QCString("_");
isBody=1;
BEGIN(FindName);
}
else if (scantype==1) // found a component
{
QCString qq(yytext);
qq=qq.stripWhiteSpace();
//qq=qq.lower();
current->name=qq;
qq=qq.lower();
if (lastCompound)
{
if (lastCompound->spec==VhdlDocGen::PACKAGE)
{
if (!VhdlDocGen::foundInsertedComponent(qq,lastCompound))
{
BaseInfo *bb=new BaseInfo(qq,Private,Normal);
lastCompound->extends->append(bb);
}
}
if (showIEEESTD) // all standard packages and libraries will not be shown
{
if (type.lower().stripPrefix("ieee")) return FALSE;
if (type.lower().stripPrefix("std")) return FALSE;
}
return TRUE;
lastCompound->addSubEntry(current);
current = new Entry;
initEntry(current);
}
else
{
newEntry();
}
BEGIN(Start);
}
else
{
QCString qq(yytext);
qq=qq.stripWhiteSpace();
current->name=qq;
newEntry();
//QCString qreal=QCString(yytext);
BEGIN(Start);
}
}
static void handleCommentBlock(const QCString &doc,bool brief)
{
int position=0;
<Start>{B}*("generic"|"port"){BR}*[(]+ { // found generic|port in entity
QCString genp(yyleng+1);
deleteSpecChars(yytext,genp.data());
VhdlDocGen::deleteCharRev(genp,'(');
// empty comment --!
if (doc.isEmpty()) return;
if (qstricmp(genp.data(),"port" )==0)
{
genPort=1;
}
else
{
genPort=0;
}
bool needsEntry=FALSE;
Protection protection=Public;
int lineNr = iDocLine;
bropen=1;
bufferClear();
lineCount();
BEGIN(FindSigName);
}
Entry* current=getCurrentVhdlEntry();
<FindSigName>{BRACECLOSE} {
lineCount();
bropen--;
addText(yytext,yyleng);
if (bropen==0)
{
bufferClear();
BEGIN(Start);
}
else
{
BEGIN(FindSigName);
}
}
if (oldEntry==current)
<FindSigName>{LABELID} { // found signals in entity
QCString line(yytext);
// note that line can be something like:
// "var1, var2, var3 : in std_logic_vector(8 downto 0); --! Some comment"
// but also
// "var4 --! Some comment
// );"
// which marks the end of a port
// and also
// "-- Some comment
// var1 : in std_logic;"
//printf("--> labelid='%s'\n",line.data());
QStringList ql;
QCString comment;
int openCount=line.contains('(');
int closeCount=line.contains(')');
int semi = line.find(';');
int pos = line.find("--");
int pos1 = line.find("--!");
if (pos!=-1 && pos<pos1) // strip normal comment before special one
{
//printf("\n find pending message < %s > at line: %d \n ",doc.data(),iDocLine);
str_doc.doc=doc;
str_doc.iDocLine=iDocLine;
str_doc.brief=brief;
str_doc.pending=TRUE;
return;
line = line.remove(pos,pos1-pos);
}
//printf("=> signal: line='%s'\n",line.data());
if (semi!=-1 && pos!=-1)
{
int eol = line.findRev('\n');
//printf("pos=%d eol=%d\n",pos,eol);
if (eol>=pos+2)
{
QRegExp re("\\n[\\s]*--!"); // comment continuation
comment=line.mid(pos+2,eol-pos-2);
//printf("Comment: '%s'\n",comment.data());
int p,l;
while ((p=re.match(comment,0,&l))!=-1)
{
comment.remove(p,l);
}
line=line.left(pos)+line.right(line.length()-eol);
}
else
{
comment=line.mid(pos+2);
line=line.left(pos);
}
comment.stripWhiteSpace();
// must subtract "(" and ")" in comments because they are used for determining the
// end of a port/generic construct
openCount-=comment.contains('(');
closeCount-=comment.contains(')');
if (!comment.stripPrefix("!")) // not a special comment
{
comment.resize(0);
}
}
else
{
//printf("no ; or --: pos=%d semi=%d\n",pos,semi);
}
int diff=openCount-closeCount;
if (diff<0)
{
VhdlDocGen::deleteCharRev(line,')');
}
oldEntry=current;
if (scantype!=1) // not a component
{
addText(yytext,yyleng);
addSignals(line,yyLineNr,lastEntity,comment);
}
lineCount();
if (brief)
if ((bropen+openCount-closeCount)==0)
{
current->briefLine = iDocLine;
bufferClear();
BEGIN(Start);
}
else
}
<FindSigName>{BRACEOPEN} {
lineCount();
bropen++;
addText(yytext,yyleng);
}
<FindSigName>{CR} {
lineCount();
addText(yytext,yyleng);
//BEGIN(FindSigName);
}
<*>^{B}*("for ")[^;]* {
//printf("\n found for[%s] [%d]",yytext,yyLineNr);
lineCount();
}
<*>{DIGITS} { // found digit
addText(yytext,yyleng);
lineCount();
}
<*>{STRING_LITERAL} {
// Make sure string literals get transfered to the output
// We have to match these because the comment characters (--)
// can exist inside a string literal.
// We shouldn't have to call lineCount because newlines
// are not allowed inside string literals
addText(yytext,yyleng);
}
/*
<*>{BR}*"--!"{B}*"@}" { // end group
if (current)
{
current->docLine = iDocLine;
Entry *pg=new Entry;
addSubEntry(current,pg);
pg->startLine=yyLineNr;
pg->name="endgroup";
}
lineCount();
}
<*>{BR}*"--!"{B}*"@{" { // start group
if (current)
{
Entry *pg=new Entry;
addSubEntry(current,pg);
pg->startLine=yyLineNr;
pg->name="startgroup";
}
lineCount();
}
*/
<*>{BR}*"--!"[^{}\n][^\n]*\n/{B}*"--!" { // multi line comment
if (iDocLine==-1) iDocLine=yyLineNr;
// signal clk :in std_logic; --!@brief global clock
// --!@brief global reset
// signal reset:in std_logic;
// these two comments are detected as a multi line comment
QCString qc(yytext);
int len=qc.contains('\n')+yyLineNr-1;
if (YY_START!=Comment) // Start of the comment block
{
bufferClear();
iTextCounter=0;
startComment=yyLineNr;
g_lastCommentContext=YY_START;
}
Entry* pTemp=getEntryAtLine(current_root,len);
if (pTemp)
{ // found one line comment, add it to the entry on this line
pTemp->briefLine=yyLineNr;
pTemp->brief+=yytext;
VhdlDocGen::prepareComment(pTemp->brief);
}
else
{
addText(yytext,yyleng);
}
lineCount();
BEGIN(Comment);
}
<Comment>^{B}*"--!"[^\n]* {
if (iDocLine==-1) iDocLine=yyLineNr;
addText(yytext,yyleng);
lineCount();
}
<Comment>.|\n {
// found end of comment block
QCString qcs;
getBufText(qcs,iTextCounter);
VhdlDocGen::prepareComment(qcs);
int ii =qcs.find("\\code");
if (ii>0)
{
iCodeLen=num_chars;
gBlock.reset();
int len=qcs.length();
QCString name=qcs.right(len-ii);
name=VhdlDocGen::getIndexWord(name.data(),1);
if (!name)
gBlock.name="misc"+ VhdlDocGen::getRecordNumber();
else
gBlock.name=name;
qcs=qcs.left(ii);
gBlock.startLine=yyLineNr+1;
gBlock.bodyLine=yyLineNr+1;
gBlock.brief+=qcs;
iTextCounter=0;
}
if (ii==-1)
{
handleCommentBlock(qcs,FALSE);
}
bufferClear();
unput(*yytext);
BEGIN(g_lastCommentContext);
}
<*>"--!"[^\n]* { // one line comment
if (iDocLine==-1) iDocLine=yyLineNr;
QCString qcs(yytext);
int j=qcs.find("--!");
qcs=qcs.right(qcs.length()-3-j);
bool isEndCode=qcs.contains("\\endcode");
if (isEndCode)
makeInline();
//printf("--> handleCommentBlock line %d\n",yyLineNr);
Entry* pTemp=getEntryAtLine(current_root,yyLineNr);
if (!isEndCode)
{
if (pTemp)
{
pTemp->briefLine=yyLineNr;
pTemp->brief+=qcs;
iDocLine=-1;
}
else
{
handleCommentBlock(qcs,TRUE);
}
}
// printf("parseCommentBlock file<%s>\n [%s]\n",yyFileName.data(),doc.data());
bufferClear();
}// one line
<*>{COMMENT} {
}
<*>\n {
lineCount();
addText(yytext,yyleng);
// printf("\n new-line [%d]",yyLineNr);
BEGIN(Start);
}
<*>{NAME} {
addText(yytext,yyleng);
lineCount();
}
<*>{B}* {
addText(yytext,yyleng);
lineCount();
}
<*>. {
addText(yytext,yyleng);
lineCount();
}
%%
static void initEntry(Entry *e)
{
e->fileName = yyFileName;
e->lang = SrcLangExt_VHDL;
initGroupInfo(e);
}
static void newEntry()
{
// Add only enties/architectures/packages to root
// and signals to classes where they were found
// ENTITY dlatch_93 IS -- VHDL'93-Syntax !!!
// PORT (d, clk : IN bit;
// q, qbar : OUT bit);
// GROUP path IS (SIGNAL, SIGNAL);
// GROUP d_to_q : path (d, q);
// ATTRIBUTE propagation : time;
// END dlatch_93;
if (current->spec==VhdlDocGen::ENTITY ||
current->spec==VhdlDocGen::PACKAGE ||
current->spec==VhdlDocGen::ARCHITECTURE ||
current->spec==VhdlDocGen::PACKAGE_BODY)
{
current_root->addSubEntry(current);
}
else
{
if (lastCompound)
{
lastCompound->addSubEntry(current);
}
else
{
if (lastEntity)
{
lastEntity->addSubEntry(current);
}
else
{
current_root->addSubEntry(current); // should not happen!
}
}
}
previous = current;
current = new Entry ;
initEntry(current);
}
static void handleCommentBlock(const QCString &doc,bool brief)
{
int position=0;
bool needsEntry=FALSE;
Protection protection=Public;
int lineNr = iDocLine;
if (brief)
current->briefLine = iDocLine;
else
current->docLine = iDocLine;
//printf("parseCommentBlock %p [%s]\n",current,doc.data());
while (parseCommentBlock(
g_thisParser,
current,
doc, // text
yyFileName, // file
lineNr, // line of block start
brief,
0,
brief,
docBlockAutoBrief,
FALSE,
protection,
position,
needsEntry
)
)
)
{
//printf("parseCommentBlock position=%d [%s]\n",position,doc.data()+position);
if (needsEntry) newVhdlEntry();
//printf("parseCommentBlock position=%d [%s]\n",position,doc.data()+position);
if (needsEntry) newEntry();
}
if (needsEntry)
{
if (varr)
{
varr=FALSE;
current->name=varName;
current->section=Entry::VARIABLEDOC_SEC;
varName="";
strComment.resize(0);
}
newVhdlEntry();
newEntry();
}
if (docBlockTerm)
{
unput(docBlockTerm);
docBlockTerm=0;
}
iDocLine=-1;
strComment.resize(0);
}
// returns the vhdl parsed types at line xxx
QList<Entry>* getEntryAtLine(const Entry* ce,int line)
#if 0
/*!
* adds grouping to the entries
*/
static void mergeGrouping(const Entry* ce,int)
{
EntryListIterator eli(*ce->children());
Entry *rt;
for (;(rt=eli.current());++eli)
{
if (rt->bodyLine==line)
if (rt->section==Entry::GROUPDOC_SEC)
{
lineEntry.insert(0,rt);
} // if
if (openGroups)
{
QCString tt=(QCString)qrl.last();
if (!tt.isEmpty())
{
rt->groups->append(new Grouping(tt.data(),Grouping::GROUPING_LOWEST));
}
}
qrl.append(rt->name);
}
if ((strcmp(rt->name.data(),"endgroup")==0) && !qrl.isEmpty())
{
qrl.remove((QCString)qrl.last());
openGroups--;
}
getEntryAtLine(rt,line);
if ((strcmp(rt->name.data(),"startgroup")==0))
{
openGroups++;
}
if (rt->section!=Entry::GROUPDOC_SEC && openGroups && !qrl.isEmpty())
{
rt->groups->append(new Grouping(qrl.last().data(),Grouping::GROUPING_LOWEST));
}
mergeGrouping(rt,openGroups);
}
return &lineEntry;
}
#endif
// token index in vhdlparser.hpp 258..416
int getParsedLine(int object)
/*
* adds the library|use statements to the next class (entity|package|architecture|package body
* library ieee
* entity xxx
* .....
* library
* package
* enity zzz
* .....
* and so on..
*/
static void mapLibPackage(const Entry* ce)
{
Entry *lastComp=0;
while (TRUE)
{
bool found = FALSE;
Entry *rt=0;
//const QList<Entry> *epp=ce->children();
EntryListIterator eli(*ce->children());
EntryListIterator eli1=eli;
for (;(rt=eli.current()),eli1=eli;++eli)
{
if (rt->spec==VhdlDocGen::LIBRARY || rt->spec==VhdlDocGen::USE)
// top level library or use statement
{
Entry *temp=0;
for (;(temp=eli1.current());++eli1) // find next entity
{
if (temp->spec==VhdlDocGen::ENTITY || temp->spec==VhdlDocGen::PACKAGE || temp->spec==VhdlDocGen::ARCHITECTURE || temp->spec==VhdlDocGen::PACKAGE_BODY)
{
Entry *ee=new Entry(*rt); //append a copy to entries sublist
temp->addSubEntry(ee);
found=TRUE;
rt->spec=-1; //nullify entry
rt->section=0;
lastComp=temp;
break;
}
}//for
if (lastComp && rt->spec)
{
Entry *ee=new Entry(*rt); //append a copy to entries sublist
lastComp->addSubEntry(ee);
found=TRUE;
rt->spec=-1; //nullify entry
rt->section=0;
}
}//if
}//for
if (!found) // nothing left to do
{
return;
}
}//while
}//MapLib
#if 0
/*!
* merges a brief descriptions to the next entry
*/
void mergeBrief(const Entry* ce)
{
//assert(object>254 && object <416);
return lineIndex [object];
EntryListIterator eli(*ce->children());
Entry *rt;
for (;(rt=eli.current());++eli)
{
if (found && (!eMerge.brief.isEmpty() || !eMerge.doc.isEmpty()))
{
rt->doc+=eMerge.doc.data();
rt->docLine=eMerge.docLine;
rt->brief+=eMerge.brief.data();
rt->briefLine=eMerge.briefLine;
found=FALSE;
}
if ((strcmp(rt->name.data(),"string")==0))
{
eMerge.reset();
eMerge.doc+=rt->doc.data();
eMerge.docLine=rt->docLine;
eMerge.brief+=rt->brief.data();
eMerge.briefLine=rt->briefLine;
found=TRUE;
}
MergeBrief(rt);
}
}
#endif
void isVhdlDocPending()
void vhdlscanFreeScanner()
{
if (!str_doc.pending)
#if defined(YY_FLEX_SUBMINOR_VERSION)
if (g_lexInit)
{
return;
vhdlscannerYYlex_destroy();
}
str_doc.pending=FALSE;
oldEntry=0; // prevents endless recursion
iDocLine=str_doc.iDocLine;
handleCommentBlock(str_doc.doc,str_doc.brief);
iDocLine=-1;
if (g_buf)
{
free(g_buf);
}
g_buf=0;
#endif
}
static bool checkMultiComment(QCString& qcs,int line)
void VHDLLanguageScanner::parseInput(const char *fileName,const char *fileBuf,Entry *root,
bool,QStrList&)
{
QList<Entry> *pTemp=getEntryAtLine(current_root,line);
inputFile.setName(fileName);
//uint jfile=inputFile.size();
::parserInit();
yyFileName=QCString(fileName);
groupEnterFile(fileName,yyLineNr);
g_thisParser = this;
g_inputFromFile = FALSE;
inputPosition = 0;
assert(root!=0);
inputString=fileBuf;
inputLen=strlen(fileBuf);
current_root = root;
global_root = root;
current=new Entry;
initEntry(current);
//current_root->name=QCString("XXX"); // dummy name for root
if (!inputFile.open(IO_ReadOnly))
{
err("\n\n could not open file: %s !!\n\n",yyFileName.data());
return ;
}
if (pTemp->isEmpty()) return false;
if (g_lexInit)
{
vhdlscannerYYrestart(vhdlscannerYYin);
unput(' ');
BEGIN(Start);
}
vhdlscannerYYlex();
g_lexInit=TRUE;
free(g_buf);
g_buf=0;
delete current;
current=0;
groupLeaveFile(yyFileName,yyLineNr);
inputFile.close();
//int ii=pTemp->count();
qcs.stripPrefix("--!");
while (!pTemp->isEmpty())
//mergeBrief(current_root);
//mergeGrouping(current_root,0);
mapLibPackage(current_root);
}
void VHDLLanguageScanner::parsePrototype(const char *text)
{
// will be called when a \fn command is found in a comment block
QCString ss,ret;
bool sem=FALSE;
bool func=FALSE;
QList<Argument> qs;
qs.setAutoDelete(TRUE);
VhdlDocGen::parseFuncProto(text,qs,ss,ret,TRUE);
int count=qs.count();
if (qstricmp(ret.data(),"function")==0)
{
func=TRUE;
}
if (count<1 && !func)
{
Entry *e=(Entry*)pTemp->getFirst();
e->briefLine=line;
e->brief+=qcs;
iDocLine=-1;
pTemp->removeFirst();
//ii=pTemp->count();
return;
}
Entry *pp = new Entry;
initEntry(pp);
pp->name=ss.stripWhiteSpace();
pp->args+='(';
for (int j=0;j<count;j++)
{
if (sem)
{
pp->args+=',';
}
Argument *ars=(Argument*)(qs.at(j));
Argument *arg=new Argument;
arg->attrib = ars->attrib;
arg->name = ars->name;
arg->type = ars->type;
pp->args+=ars->name.data();
pp->args+=" ";
pp->args+=ars->type.data();
pp->argList->append(arg);
sem=TRUE;
}
return true;
pp->args+=')';
if (!ret.isEmpty())
pp->spec=VhdlDocGen::FUNCTION;
else
pp->spec=VhdlDocGen::PROCEDURE;
if (pp->section == Entry::MEMBERDOC_SEC && pp->args.isEmpty())
pp->section = Entry::VARIABLEDOC_SEC;
pp->type=ret;
current_root->addSubEntry(pp);
}
void VHDLLanguageScanner::parseCode(CodeOutputInterface &codeOutIntf,
const char *scopeName,
const QCString &input,
SrcLangExt lang,
bool isExampleBlock,
const char *exampleName,
FileDef *fileDef,
int startLine,
int endLine,
bool inlineFragment,
MemberDef *memberDef,
bool showLineNumbers,
Definition *searchCtx,
bool collectXRefs
)
{
(void)lang;
::parseVhdlCode(codeOutIntf,scopeName,input,isExampleBlock,exampleName,
fileDef,startLine,endLine,inlineFragment,memberDef,
showLineNumbers,searchCtx,collectXRefs);
}
winbuild/Doxygen.vcproj
View file @ 99433b3d
......@@ -926,14 +926,6 @@
RelativePath="..\src\vhdldocgen.cpp"
>
</File>
<File
RelativePath="$(IntDir)\vhdlparser.cpp"
>
</File>
<File
RelativePath="$(IntDir)\vhdlparser.h"
>
</File>
<File
RelativePath="..\src\xmldocvisitor.cpp"
>
......@@ -991,50 +983,6 @@
/>
</FileConfiguration>
</File>
<File
RelativePath="..\src\vhdlparser.y"
>
<FileConfiguration
Name="Debug|Win32"
>
<Tool
Name="VCCustomBuildTool"
Description="Running bison on vhdlparser.y"
CommandLine="bison -l -d -p vhdlscannerYY $(InputPath) -o $(IntDir)\vhdlparser.c&#x0D;&#x0A;bison -l -p vhdlscannerYY $(InputPath) -o $(IntDir)\vhdlparser.cpp&#x0D;&#x0A;del $(IntDir)\vhdlparser.c&#x0D;&#x0A;"
Outputs="$(IntDir)\vhdlparser.cpp"
/>
</FileConfiguration>
<FileConfiguration
Name="Debug|x64"
>
<Tool
Name="VCCustomBuildTool"
Description="Running bison on vhdlparser.y"
CommandLine="bison -l -d -p vhdlscannerYY $(InputPath) -o $(IntDir)\vhdlparser.c&#x0D;&#x0A;bison -l -p vhdlscannerYY $(InputPath) -o $(IntDir)\vhdlparser.cpp&#x0D;&#x0A;del $(IntDir)\vhdlparser.c&#x0D;&#x0A;"
Outputs="$(IntDir)\vhdlparser.cpp"
/>
</FileConfiguration>
<FileConfiguration
Name="Release|Win32"
>
<Tool
Name="VCCustomBuildTool"
Description="Running bison on vhdlparser.y"
CommandLine="bison -l -d -p vhdlscannerYY $(InputPath) -o $(IntDir)\vhdlparser.c&#x0D;&#x0A;bison -l -p vhdlscannerYY $(InputPath) -o $(IntDir)\vhdlparser.cpp&#x0D;&#x0A;del $(IntDir)\vhdlparser.c&#x0D;&#x0A;"
Outputs="$(IntDir)\vhdlparser.cpp"
/>
</FileConfiguration>
<FileConfiguration
Name="Release|x64"
>
<Tool
Name="VCCustomBuildTool"
Description="Running bison on vhdlparser.y"
CommandLine="bison -l -d -p vhdlscannerYY $(InputPath) -o $(IntDir)\vhdlparser.c&#x0D;&#x0A;bison -l -p vhdlscannerYY $(InputPath) -o $(IntDir)\vhdlparser.cpp&#x0D;&#x0A;del $(IntDir)\vhdlparser.c&#x0D;&#x0A;"
Outputs="$(IntDir)\vhdlparser.cpp"
/>
</FileConfiguration>
</File>
</Filter>
<Filter
Name="Lex Files"
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment