simulating/debugging (ca5c6e32) · Commits · Elphel / x393_sata

ahci/ahci_fis_receive.v

+1 −1

Original line number	Diff line number	Diff line
		@@ -325,7 +325,7 @@ localparam DATA_TYPE_ERR = 3;
		if (store_sig[1]) sig_r[31:8] <= hba_data_in[23:0];
		if (store_sig[3]) sig_r[ 7:0] <= hba_data_in[ 7:0];

		if (reg_d2h) tf_err_sts <= hba_data_in[15:0];
		if (reg_d2h) tf_err_sts <= hba_data_in[31:16]; // 15:0];
		// Sets pPioErr[pPmpCur] to Error field of the FIS
		// Updates PxTFD.STS.ERR with pPioErr[pPmpCur] ??
		else if (reg_ps[0]) tf_err_sts <= {hba_data_in[31:24],hba_data_in[23:16]};

ahci/ahci_fsm.v

+7 −4

Original line number	Diff line number	Diff line
		@@ -255,6 +255,7 @@ module ahci_fsm
		// reg jump_r;
		reg [2:0] fsm_jump;
		wire fsm_next;
		reg fsm_next_r;
		reg fsm_actions; // processing actions
		reg fsm_act_busy;
		reg [1:0] fsm_transitions; // processing transitions
		@@ -277,6 +278,7 @@ module ahci_fsm
		reg [1:0] phy_ready_prev; // previous state of phy_ready / speed
		reg phy_ready_chng_r; // pulse when phy_ready changes
		wire phy_ready_chng_w = !hba_rst && !was_rst && (phy_ready != phy_ready_prev);
		reg was_last_action_r; // delay last action if it was fsm_wait_act;

		assign fsm_next = (fsm_preload \|\| (fsm_actions && !update_busy && !fsm_act_busy) \|\| fsm_transitions[0]) && !async_pend_r[0]; // quiet if received cominit is pending
		assign update_all = fsm_jump[0];
		@@ -334,10 +336,11 @@ module ahci_fsm
		else if (fsm_jump[2]) fsm_actions <= 1;
		else if (fsm_last_act_w && fsm_next) fsm_actions <= 0;


		if (fsm_actions && fsm_next) was_last_action_r <= fsm_last_act_w;

		if (hba_rst \|\| pre_jump_w) fsm_transitions <= 0;
		else if (fsm_last_act_w && fsm_actions && fsm_next) fsm_transitions <= 1;
		else if ((fsm_last_act_w && fsm_actions && fsm_next && !fsm_wait_act_w) \|\|
		(fsm_act_busy && fsm_act_done && was_last_action_r) ) fsm_transitions <= 1;
		else fsm_transitions <= {fsm_transitions[0],fsm_transitions[0]};

		if (hba_rst) fsm_preload <= 0;

device/sata_device.v

+46 −7

Original line number	Diff line number	Diff line
		@@ -41,6 +41,7 @@ module sata_device(
		input wire EXTCLK_P,
		input wire EXTCLK_N
		);
		`include "includes/fis_types.vh"
		//`ifdef SIMULATION
		reg [639:0] DEV_TITLE; // to show human-readable state in the GTKWave
		// reg [31:0] DEV_DATA;
		@@ -58,6 +59,8 @@ wire dev_rst;
		reg [31:0] dev2phy_data = 32'hB5B5957C; // SYNCP
		reg [3:0] dev2phy_isk = 4'h1;

		reg [2:0] phy_ready_syncp_r; // allow device to send 3 SYNCp before getting ready

		sata_phy_dev phy(
		// pll reset
		.extrst (rst),
		@@ -128,6 +131,8 @@ reg [31:0] receive_crc;
		integer receive_id = 0;
		integer receive_status = 0;



		/*
		* Monitor incoming primitives every clock cycle
		* if there is a data transfer request, start a receive sequence
		@@ -634,9 +639,43 @@ endtask



		reg [31:0] transmit_data [2047:0];
		reg [31:0] transmit_data [2047:0]; // @SuppressThisWarning VEditor - Assigned in testbench
		reg [31:0] transmit_data_pause [2047:0];
		reg [31:0] transmit_crc; // never assigned
		reg [31:0] transmit_crc; // never assigned // @SuppressThisWarning VEditor - Assigned in testbench
		task clear_transmit_pause; // @SuppressThisWarning VEditor - Used in testbench
		input [31:0] pause_val;
		integer i;
		begin
		for (i = 0; i < 2048; i = i + 1) begin
		transmit_data_pause[i] = pause_val;
		end
		end
		endtask

		// Wait for device phy ready (full COMRESET/COMINIT sequence) and wait to send several SYNCp primitives so host knows it is done
		task wait_ready; // @SuppressThisWarning VEditor - Used in testbench
		input integer num_syncp;
		begin
		wait (phy_ready);
		repeat(num_syncp + 1) @(posedge clk);
		end
		endtask

		task send_good_status; // @SuppressThisWarning VEditor - Used in testbench
		input integer id;
		input [2:0] dev_specific_status_bits;
		input irq;
		output integer status;
		begin
		transmit_data[0] = FIS_D2HR \| (irq? 'h4000:0) \| (dev_specific_status_bits << 20) \| 'h1000000;
		transmit_data[1] = 1;
		transmit_data[2] = 0;
		transmit_data[3] = 1;
		transmit_data[4] = 0;
		linkTransmitFIS(id, 5, 0, status);
		// linkTransmitFIS (
		end
		endtask
		/*
		* Transmits data to a host. ~Link Transmit FSM
		* Correct execution, as it shall be w/o errors from a device side. (except timeouts and data consistency, see below)
		@@ -661,7 +700,7 @@ reg [31:0] transmit_crc; // never assigned
		* b) Scrambler messed up
		* c) There is an error in the host
		*/
		task linkTransmitFIS;
		task linkTransmitFIS; // @SuppressThisWarning VEditor - Used in testbench
		input integer id;
		input integer size; // dwords count
		input integer transmit_custom_crc;
		@@ -900,7 +939,7 @@ endtask

		// checks, if it is data coming from the host
		function [0:0] linkIsData;
		input dummy;
		input dummy; // @SuppressThisWarning VEditor - unused (is it for some simulator?)
		begin
		if (\|phy2dev_charisk)
		linkIsData = 1;
		@@ -912,7 +951,7 @@ endfunction
		// obvious
		function [31:0] linkGetData;
		// TODO non-even word count
		input dummy;
		input dummy; // @SuppressThisWarning VEditor - unused (is it for some simulator?)
		begin
		linkGetData = phy2dev_data;
		end
		@@ -922,7 +961,7 @@ endfunction
		* Return value is a string containing its name!
		*/
		function [112:0] linkGetPrim;
		input integer dummy;
		input integer dummy; // @SuppressThisWarning VEditor - unused (is it for some simulator?)
		reg [112:0] type;
		begin
		if (~\|phy2dev_charisk) begin

device/sata_phy_dev.v

+8 −8

Original line number	Diff line number	Diff line
		@@ -79,10 +79,10 @@ wire [7:0] rxdisperr;
		wire [7:0] rxdisperr_gtx;
		wire [7:0] rxnotintable;
		wire [7:0] rxnotintable_gtx;
		wire [31:0] rxdata_out;
		wire [31:0] txdata_in;
		wire [3:0] txcharisk_in;
		wire [3:0] rxcharisk_out;
		//wire [31:0] rxdata_out;
		//wire [31:0] txdata_in;
		//wire [3:0] txcharisk_in;
		//wire [3:0] rxcharisk_out;

		wire rxcomwakedet;
		wire rxcominitdet;
		@@ -763,9 +763,9 @@ assign rxn = rxn_in;
		assign rxp = rxp_in;
		assign txn_out = txn;
		assign txp_out = txp;
		assign ll_data_out = rxdata_out;
		assign ll_charisk_out = rxcharisk_out;
		assign txdata_in = ll_data_in;
		assign txcharisk_in = ll_charisk_in;
		//assign ll_data_out = rxdata_out;
		//assign ll_charisk_out = rxcharisk_out;
		//assign txdata_in = ll_data_in;
		//assign txcharisk_in = ll_charisk_in;

		endmodule

tb/tb_ahci.tf

+20 −1

Original line number	Diff line number	Diff line
		@@ -67,6 +67,9 @@ reg [639:0] TESTBENCH_TITLE = "RESET"; // to show human-readable state in the GT
		reg [31:0] TESTBENCH_DATA;
		reg [11:0] TESTBENCH_ID;

		reg [639:0] DEVICE_TITLE = "RESET"; // to show human-readable state in the GTKWave
		reg [31:0] DEVICE_DATA;
		reg [11:0] Device_ID;

		initial #1 $display("HI THERE");
		initial
		@@ -639,7 +642,7 @@ localparam MAXIGP1 = 32'h80000000; // Start of the MAXIGP1 address range (use ah
		endtask


		initial begin
		initial begin //Host
		wait (!RST);
		//reg [639:0] TESTBENCH_TITLE = "RESET"; // to show human-readable state in the GTKWave
		TESTBENCH_TITLE = "NO_RESET";
		@@ -658,6 +661,22 @@ initial begin

		end

		integer status;
		initial begin //Device
		dev.clear_transmit_pause(0);
		// dev.linkTransmitFIS(66, 5, 0, status);
		// wait (dev.phy_ready);
		dev.wait_ready(3);
		DEVICE_TITLE = "NO_RESET";
		$display("[Dev-TB]: %s @%t", DEVICE_TITLE, $time);
		dev.send_good_status (66, // input integer id;
		5, // input [2:0] dev_specific_status_bits;
		1, // input irq;
		status); // output integer status;
		DEVICE_TITLE = "Device sent D2H RS";
		$display("[Dev-TB]: %s, status = 0x%x @%t", DEVICE_TITLE, status, $time);

		end
		initial begin
		// #30000;
		#50000;

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