Programming languages used in this repository
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Verilog
56.25 %
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Python
29.11 %
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HCL
7.27 %
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SystemVerilog
6.82 %
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Tcl
0.3 %
Commit statistics for d19fe2f0e4b0fc5c0c937fc7b94a9a65745b3176 Apr 26 - Mar 16
- Total: 436 commits
- Average per day: 0.6 commits
- Authors: 3
Commits per day of month
Commits per weekday
Commits per day hour (UTC)