Programming languages used in this repository
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Verilog
56.25 %
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Python
29.11 %
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HCL
7.27 %
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SystemVerilog
6.82 %
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Tcl
0.3 %
Commit statistics for 495ca20b426d029a474149b11654a1898dc24ccb Apr 26 - Jan 26
- Total: 68 commits
- Average per day: 0.2 commits
- Authors: 1
Commits per day of month
Commits per weekday
Commits per day hour (UTC)