x393:fad107cb2ca57d575d0bdcf7091def89e6752192 commitshttps://git.elphel.com/Elphel/x393/commits/fad107cb2ca57d575d0bdcf7091def89e67521922015-03-11T05:48:46Zhttps://git.elphel.com/Elphel/x393/commit/fad107cb2ca57d575d0bdcf7091def89e6752192implemented help for task based on functions documentation2015-03-11T05:48:46ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/e6868ded7eea0b7f8281cac4c74da753a2df5594implemented @file in the test_mcntrl.py command line2015-03-10T05:33:32ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/f7c039856cce093f4cb94895355c64434d815788more verilog tasks converted to python2015-03-08T05:37:27ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/8de61d312ef16a4c818258fc941bb6fb8d5a7bdbnext snapshot, implemented more expression types in parameter parsing2015-03-07T18:46:36ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/21e45a9976b1094e94d7c808c8ead12d63a7dce2more code converted from Verilog to Python2015-03-05T06:17:28ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/eba342eb85c65470dd63b71c9e2899b912285403continue with python hardware test code2015-03-05T02:17:26ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/63ff28196f1947fbe67394d2772bfb0a3a241fefworking on Python code for hardware testing2015-03-04T08:09:15ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/4c3995d60e80de575bd9e252ff345eb2adca56cbcreating Python program to pass Verilog parameters to Python FPGA tests2015-03-03T03:25:45ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/0466926cc72c1177ca3da46a75dcebddcc62b0f3working with Xilinx ISE/Vivado to synthesize and P&R the design2015-03-01T05:00:39ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/05378ee794495b9e30e0b6080f489a9965804b0eworking on synthesis with Vivado tools2015-02-28T07:25:56ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/df69d5558e5626cc06d45eac44459e10bf472d81more fixes2015-02-25T03:23:54ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/7b13989a8a8018e9a2769009a13fc6194fd7a03dmore bugs fixing with simulation2015-02-25T01:48:12ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/943fc4a1d621ee4d34700788e5793d04baf08c1bbefore adding extra register layer between channel buffers outputs and memory...2015-02-23T20:45:44ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/d2db8c14bec3351c03a3baa4d17b900ca6e2cb03more simulatin/bug fixing2015-02-22T22:36:15ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/7614ead578505a40e9ef9beccfdf2a0e261d50afdebugging after modifications2015-02-22T08:01:48ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/ad0351ef12f2a368a8571ff148b3feb689075980re-organized top structure2015-02-22T04:46:27ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/f35bb39d9ba6f256b1ad0d1352db07fb4a86d5f4created and tested cmd_encod_tiled_32_wr.v - tiles with 32-byte columns2015-02-20T08:02:51ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/a445ef42b7671646d5bf50bf1bdd0a8929048a95added another channel for testing - tile write2015-02-20T01:33:38ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/31a6b9715722780461c54f89e30bb6af82d36173added tile write (column order)2015-02-20T01:32:46ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/22beced0c4bbdf847b025f676cf533af099f3154version of the tile read with 32-byte wide columns - easier timing with vario...2015-02-19T06:36:59ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/c8076f572e43eae002305a58db9cf64f4862cf1emore debugging tile read2015-02-19T02:45:31ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/cd7cb395f7797c32e6e795f6fc4757d33df03633testing read memory as rectangular tiles2015-02-18T07:45:42ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/864a8593223776161994e48e0d596d3ccfeedaa5debugging larger frames write/read2015-02-17T05:02:00ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/7c5ab53db81117a3564f78b0ee4f19e0920be285more debugging2015-02-16T09:35:59ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/e3d5b404f83c6f3bce0048429664a13ffc64a9eemodified scanline mode to work with SDRAM page crossing (by splitting in 2), ...2015-02-16T00:46:00ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/547054f6d1fbe52dd9008fc0305d7a925edeaf4aran some tests with TEST_SCANLINE_WRITE, fixed some bugs2015-02-15T06:06:00ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/8f79e6f735ce8bb851bd3257f4eb67198b53b463debugging scanline read memory access2015-02-14T17:09:47ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/cbbd4ed1ed3d1fa6c3a15c945e086acfaae6d93bsplit top level test fixture file into separate includes with tasks2015-02-13T20:31:02ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/38d73a7b8ce1dd2ed92d6b06c121f9858c90a62cmore debugging by simulation, bug fixing2015-02-13T19:15:46ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/f4751492230ef8e475ae8da0e70cc9a3a3d6514cdebugging, more corrections, tested block write through PIO channel 12015-02-13T00:40:49ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/bb2371197640bd2b96f9fe0e110d0b512b797342debugging, more corrections, tested write levelling/buffer reading2015-02-12T06:37:50ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/d899569e0ac077789cd6163dda29d7883950ce1bdebugging/simulation2015-02-11T08:02:32ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/9acfc5c3e8a97a44459c2183fd57a253976b1795removed some old temporary files2015-02-10T23:50:19ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/466a4a4e037e104fd297caba695f7e7f059d7c10moved directory phy under memcntrl (as it is a part of memory controller)2015-02-10T23:49:01ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/dde1725e7bd33eeca0504f23bd3fb3f47f2f379cmore simulation2015-02-10T23:47:11ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/f9e935af87ca3f514d5264405e439444d835445acontinue simulation, moved some code to includes after modifying VDT to...2015-02-10T06:51:42ZAndrey Filippovandrey@elphel.comcontinue simulation, moved some code to includes after modifying VDT to support project-relative includes
https://git.elphel.com/Elphel/x393/commit/ee2c4eefe692f2d964298a75ade30619644ddbf6Modified Veditor to search includes from project root in addition to relative...2015-02-10T06:48:31ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/9f629dc4e5e377eabb95233e8e0d50a275c9e886tested register writes, status generation, routing and reading2015-02-10T02:29:55ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/99191719e50ebd971c2285caa669e915eba5d803started simulation2015-02-09T18:46:33ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/575da59abc48dd878477726faf0302794389b656Working on simulation testbench2015-02-08T06:12:57ZAndrey Filippovandrey@elphel.com