x393:56006910c67dc8423363f76c778424fb1714165c commitshttps://git.elphel.com/Elphel/x393/commits/56006910c67dc8423363f76c778424fb1714165c2015-01-26T05:23:59Zhttps://git.elphel.com/Elphel/x393/commit/56006910c67dc8423363f76c778424fb1714165canother memory sequence encoder module2015-01-26T05:23:59ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/7faa227a165aec8d39119e1b440f4a078292aba0starting encoders for memory access patterns2015-01-26T01:30:45ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/495ca20b426d029a474149b11654a1898dc24ccbanother ignore pattern2015-01-26T01:29:56ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/461336a4ed2b1106ea7a8f527423ad92d6bf510cmatched signals in x393 and mcontr16 before adding channel logic2015-01-23T06:00:43ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/cba3cc1cfca9eafad1d87da21afa29fbe84a668econtinue on initial x393 with a memory controller2015-01-23T02:28:46ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/f948ab8f55ab2dd51f570ebf6a81b0de5e831a8fnext snapshot2015-01-21T07:09:15ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/b8040cc2d077a8ddbf592560bb4302cf61cafd42Continue re-organizing memory controller for x3932015-01-20T15:23:55ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/27c9f81a8104ee48d3599d85e6eb021174a1dcd5moved module to subdirectory2015-01-16T01:18:59ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/f97c6e2878aa5e016437cce14532b7869dc44cefcontinue on status infrastructure2015-01-16T00:37:17ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/2ec40de813441a3f7d4bbca5b4b26895b0a734bestarted status read infrastucture2015-01-14T22:56:04ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/10e88af60713e00d7402b1686283959d354bc954Added modules to byte-serialize write commands and de-serialize them at desti...2015-01-13T06:03:25ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/56a59c77083631d63abbdcafd55b67032cd27a89more changes to convert project2015-01-11T23:51:12ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/1563de24d94e62859afb309373aec2aafe3cf177converting eddr3 to the x393 project2015-01-11T23:23:17ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/b80c19f8586208285674597c9615b229e423366amodified include path2014-11-02T05:17:51ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/d0cdb65450694c7dfbe2a0d819a6e96de3cbc11dModifications for Icarus Verilog2014-06-24T04:23:22ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/2d6f9609dca8c80333711e8ec4a690d77d52b94aAdded link to the blog post2014-06-24T04:22:36ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/09784ed72d6d6eef5031dc4448e6dd1dca78e91beye pattern tests at 400MHz2014-06-15T08:32:28ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/d9e0dd239f59f169bafceaf989ad29ae30e9812epatch to work with Icarus Verilog simulator2014-06-15T07:32:58ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/52b99362e63618a4a5d2eba24d181321760ca01fadded glbl.v2014-06-15T07:02:52ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/e00b15e355f64ed81d9e697bef9d44b4626f0fd7code to align bit delays on random data2014-06-14T07:18:21ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/2ac46e216ade15709c39bf146990ac9e051342e9implemented read leveling, eye measurement for DDR3 on random data2014-06-12T23:43:29ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/f6b8d427e8e322bf861030520bb0a34411314355adjusted dealys, tested write/read leveling, write and read blocks2014-06-11T22:59:05ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/f2c019cd1bfe8925be96af38a43080706274b7d5working with hardware2014-06-11T20:16:47ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/780f735993bc3c76aa0dbb570fdc8081430ae159debugging hardware2014-06-11T09:45:47ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/5450474d46c20a0125f6ea5ab08ccf63d99bde0edebugging hardware2014-06-11T01:28:15ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/393faaf1a9563a560edbf666a6b23077becdf951'Translating' test fixture from Verilog to Python for testing the actual hard...2014-06-11T01:27:36ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/ef3e06aaa8d0700b896c68d32e583e54dd2acd59renamed directory2014-06-08T01:32:07ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/896e116ae03ba9b73a447977bbf2b26a93982a22renamed directory2014-06-08T01:29:57ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/1fc578b2aa340adaa786c2e8e20e2b31192dba99added headers2014-06-08T01:29:08ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/7e44243bdb65cd14dde32fe8123a292c7efd72aaorganized new/debug files2014-06-08T01:18:41ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/cd437a8f4fc1a174ee0326a8cf84bb5c46331e5aMerge branch 'master' of github.com:Elphel/eddr32014-06-07T23:30:53ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/c57b67b83bf788ba0679bdcd36715c51c5fae40adebugging hardware2014-06-07T23:30:25ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/2f4f51916f1d5a4870c8b6a278c156b06512ebcbCreate README.md2014-06-07T01:48:28ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/cd3ccb58e093301dbfd636180d91345d7e3901c1troubleshooting lack of DONE during loading of the bitfile2014-06-07T01:43:44ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/6176aa7b8006c1e6afce86cd7df3b4fb799f887efixed DCI and ODT for all tested modes2014-06-02T18:31:15ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/0102893157ed741d44e5997973e4f94c697367a5bug fixes, implemented read pattern test, so all major DDR3 modes are tested:...2014-06-01T23:25:52ZAndrey Filippovandrey@elphel.combug fixes, implemented read pattern test, so all major DDR3 modes are tested: write and read leveling, write and read
https://git.elphel.com/Elphel/x393/commit/46cf253d17ff32325165a05793b9209b52d3bfa3added configuration for ISE, timing constraints for Vivado2014-06-01T01:38:08ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/0bd9ef33fa55e6a8991848a435ea28b2005bae93change DM* I/O standard to SSTL152014-05-31T06:46:31ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/37d1bee7fed0fc1e065e2d3c2e0b28cec5f72ca1added pause bit to make sequneces more compact, implemented ddr3 read block test2014-05-31T06:29:57ZAndrey Filippovandrey@elphel.comhttps://git.elphel.com/Elphel/x393/commit/d9b14b007027f84d46e75d931cc9e51389689322added 16-bit shift register2014-05-31T06:28:31ZAndrey Filippovandrey@elphel.com