Commits · 530030f6fbf8171f9c195bcda93a41b0c174a8fd · Elphel / x393

05 Jun, 2016 1 commit
- Modified headers to work with doxverilog2.5/doxygen1.7.0 · 00e7a575
  Andrey Filippov authored Jun 05, 2016
  
  00e7a575
16 Mar, 2016 1 commit
- fixed axi simulation modules, added IRQ support · 500cf616
  Andrey Filippov authored Mar 16, 2016
  
  500cf616
26 Jan, 2016 1 commit
- modified fifo-related modules · 1e167c27
  Andrey Filippov authored Jan 26, 2016
  
  1e167c27
08 Nov, 2015 3 commits
- Typo in file headers · 72d1c082
  Andrey Filippov authored Nov 08, 2015
  
  72d1c082
- More file headers editing · 691ae8a4
  Andrey Filippov authored Nov 08, 2015
  
  691ae8a4
- added 'Additional permission under GNU GPL version 3 section 7' to each file header · 1392ef16
  Andrey Filippov authored Nov 08, 2015
  
  1392ef16
30 Apr, 2015 1 commit
- simulating/debugging · 8b79e3f7
  Andrey Filippov authored Apr 30, 2015
  
  8b79e3f7
27 Apr, 2015 1 commit
- added missing files · bb5c2299
  Andrey Filippov authored Apr 27, 2015
  
  bb5c2299
28 Feb, 2015 1 commit
- working on synthesis with Vivado tools · 05378ee7
  Andrey Filippov authored Feb 28, 2015
  
  05378ee7
29 Jan, 2015 1 commit
- continue editing · 0a580f98
  Andrey Filippov authored Jan 29, 2015
  
  0a580f98
11 Jun, 2014 1 commit
- debugging hardware · 5450474d
  Andrey Filippov authored Jun 11, 2014
  
  5450474d
07 Jun, 2014 1 commit
- debugging hardware · c57b67b8
  Andrey Filippov authored Jun 07, 2014
  
  c57b67b8
01 Jun, 2014 1 commit
- added configuration for ISE, timing constraints for Vivado · 46cf253d
  Andrey Filippov authored Jun 01, 2014
  
  46cf253d
30 May, 2014 1 commit
- write leveling done, working on write buffer · 4bacb90a
  Andrey Filippov authored May 30, 2014
  
  4bacb90a
22 May, 2014 1 commit
- added modules, simulating · c8904b67
  Andrey Filippov authored May 22, 2014
  
  c8904b67