Commit e5bc283e authored by Oleg Dzhimiev's avatar Oleg Dzhimiev

frequency and voltage for 14MPx

parent 19e6e962
......@@ -6,5 +6,5 @@
-c bitstream_set_path /usr/local/verilog/x393_hispi.bit
-c setupSensorsPower "HISPI"
-c measure_all "*DI"
-c setSensorClock 24.0 "2V5_LVDS"
-c setSensorClock 24.444 "1V8_LVDS"
-c set_rtc
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment