Commit dedb0313 authored by Oleg Dzhimiev's avatar Oleg Dzhimiev
Browse files

1.install imgsrv to /www/pages 2.default bitstream path=/tmp/

parent 0c04eb6a

install.sh

+5 −0
Original line number Original line Diff line number Diff line
@@ -11,6 +11,11 @@ install -d -v $1/usr/local/verilog/ 
install -d -v $1/usr/local/bin/

install -d -v $1/usr/local/bin/

install -v -m 0755 $SCRIPTPATH/py393/*.py $1/usr/local/bin/

install -v -m 0755 $SCRIPTPATH/py393/*.py $1/usr/local/bin/





install -d -v $1/www/pages/

install -v -m 0755 $SCRIPTPATH/py393/imgsrv.py $1/www/pages/

#unistall

rm $1/usr/local/bin/imgsrv.py



install -v -m 0644 $SCRIPTPATH/*.bit $1/usr/local/verilog/

install -v -m 0644 $SCRIPTPATH/*.bit $1/usr/local/verilog/





install -v -m 0644 $SCRIPTPATH/system_defines.vh $1/usr/local/verilog/

install -v -m 0644 $SCRIPTPATH/system_defines.vh $1/usr/local/verilog/

py393/hargs

+0 −1
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@@ -3,5 +3,4 @@ 
-f /usr/local/verilog/x393_parameters.vh   /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh

-f /usr/local/verilog/x393_parameters.vh   /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh

-l /usr/local/verilog/x393_cur_params_target.vh

-l /usr/local/verilog/x393_cur_params_target.vh

-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle

-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle

-c copy /usr/local/bin/imgsrv.py /www/pages

-i
 
-i
 
 No newline at end of file

py393/startup14

+0 −1
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@@ -3,7 +3,6 @@ 
-f /usr/local/verilog/x393_parameters.vh   /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh

-f /usr/local/verilog/x393_parameters.vh   /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh

-l /usr/local/verilog/x393_cur_params_target.vh

-l /usr/local/verilog/x393_cur_params_target.vh

-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle

-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle

-c copy /usr/local/bin/imgsrv.py /www/pages

-c setupSensorsPower "HISPI"

-c setupSensorsPower "HISPI"

-c measure_all "*DI"

-c measure_all "*DI"

-c setup_all_sensors True None 0xf

-c setup_all_sensors True None 0xf

py393/startup5

+0 −1
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@@ -3,7 +3,6 @@ 
-f /usr/local/verilog/x393_parameters.vh   /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh

-f /usr/local/verilog/x393_parameters.vh   /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh

-l /usr/local/verilog/x393_cur_params_target.vh

-l /usr/local/verilog/x393_cur_params_target.vh

-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle

-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle

-c copy /usr/local/bin/imgsrv.py /www/pages

-c setupSensorsPower "PAR12"

-c setupSensorsPower "PAR12"

-c measure_all "*DI"

-c measure_all "*DI"

-c setup_all_sensors True None 0xf

-c setup_all_sensors True None 0xf

py393/x393_utils.py

+2 −1
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@@ -39,7 +39,8 @@ from time import sleep 
import vrlg # global parameters

import vrlg # global parameters

import x393_axi_control_status

import x393_axi_control_status

import shutil

import shutil

DEFAULT_BITFILE="/usr/local/verilog/x393.bit"

#DEFAULT_BITFILE="/usr/local/verilog/x393.bit"

DEFAULT_BITFILE="/tmp/x393.bit"

FPGA_RST_CTRL =    0xf8000240

FPGA_RST_CTRL =    0xf8000240

FPGA0_THR_CTRL =   0xf8000178

FPGA0_THR_CTRL =   0xf8000178

FPGA_LVL_SHFTR =   0xf8000900 # 0xf: all enabled, 0x0 - disable all

FPGA_LVL_SHFTR =   0xf8000900 # 0xf: all enabled, 0x0 - disable all