Loading fpga_version.vh +1 −2 Original line number Original line Diff line number Diff line Loading @@ -35,13 +35,12 @@ * contains all the components and scripts required to completely simulate it * contains all the components and scripts required to completely simulate it * with at least one of the Free Software programs. * with at least one of the Free Software programs. */ */ parameter FPGA_VERSION = 32'h0393401b; // GPS 1 PPS instead of odometer parameter FPGA_VERSION = 32'h03931005; // parallel, converting from 32'h0393401a // parameter FPGA_VERSION = 32'h0393401a; // adding strobe output for IMX-5 on ext-5 // parameter FPGA_VERSION = 32'h0393401a; // adding strobe output for IMX-5 on ext-5 // parameter FPGA_VERSION = 32'h03934019; // Boson640, logger debug disabled // parameter FPGA_VERSION = 32'h03934019; // Boson640, logger debug disabled // parameter FPGA_VERSION = 32'h03934018; // Boson640, debugging logger 02 // parameter FPGA_VERSION = 32'h03934018; // Boson640, debugging logger 02 // parameter FPGA_VERSION = 32'h03934017; // Boson640, debugging logger 01 // parameter FPGA_VERSION = 32'h03934017; // Boson640, debugging logger 01 // parameter FPGA_VERSION = 32'h03934016; // Boson640, for 103993A, started IMU // parameter FPGA_VERSION = 32'h03934016; // Boson640, for 103993A, started IMU // parameter FPGA_VERSION = 32'h03931004; // parallel, starting IMS support // not yet used // parameter FPGA_VERSION = 32'h03931003; // parallel, adding camsync trigger decimation - modifying decimation // parameter FPGA_VERSION = 32'h03931003; // parallel, adding camsync trigger decimation - modifying decimation // parameter FPGA_VERSION = 32'h03934015; // Boson640, for 103993A, debugging 4 removed DE deglitch - modifying decimation // parameter FPGA_VERSION = 32'h03934015; // Boson640, for 103993A, debugging 4 removed DE deglitch - modifying decimation // parameter FPGA_VERSION = 32'h03931004; // parallel, adding camsync trigger decimation - modifying decimation // parameter FPGA_VERSION = 32'h03931004; // parallel, adding camsync trigger decimation - modifying decimation Loading system_defines.vh +2 −2 Original line number Original line Diff line number Diff line Loading @@ -65,10 +65,10 @@ `define DISPLAY_COMPRESSED_DATA `define DISPLAY_COMPRESSED_DATA // if specific sesnor is not defined, parallel sensor interface is used for all channels // if specific sesnor is not defined, parallel sensor interface is used for all channels /*************** CHANGE here and x393_hispi | x393_parallel | x393_lwir | x393_boson in bitstream (and few other) tool settings ****************/ /*************** CHANGE here and x393_hispi | x393_parallel | x393_lwir | x393_boson in bitstream (and few other) tool settings ****************/ `define BOSON 1 // `define BOSON 1 // `define LWIR // `define LWIR // `define HISPI // `define HISPI // also change in utilization and timimg summary tools (x393_parallel_utilization.report, ...) // also change in bitstream, utilization and timimg summary tools (x393_parallel_utilization.report, ...) `ifdef BOSON `ifdef BOSON `elsif LWIR `elsif LWIR Loading x393_parallel.bit (5.7 MiB) File changed.No diff preview for this file type. View original file View changed file x393_parallel.timing_summary_impl +1413 −1433 File changed.Preview size limit exceeded, changes collapsed. Show changes x393_parallel_utilization.report +43 −42 Original line number Original line Diff line number Diff line Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. ---------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------- | Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017 | Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017 | Date : Mon Mar 22 12:57:54 2021 | Date : Thu Mar 9 11:38:40 2023 | Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS | Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS | Command : report_utilization -file vivado_build/x393_parallel_utilization.report | Command : report_utilization -file vivado_build/x393_parallel_utilization.report | Design : x393 | Design : x393 Loading Loading @@ -31,15 +31,15 @@ Table of Contents +----------------------------+-------+-------+-----------+-------+ +----------------------------+-------+-------+-----------+-------+ | Site Type | Used | Fixed | Available | Util% | | Site Type | Used | Fixed | Available | Util% | +----------------------------+-------+-------+-----------+-------+ +----------------------------+-------+-------+-----------+-------+ | Slice LUTs | 41951 | 0 | 78600 | 53.37 | | Slice LUTs | 41694 | 0 | 78600 | 53.05 | | LUT as Logic | 38565 | 0 | 78600 | 49.06 | | LUT as Logic | 38299 | 0 | 78600 | 48.73 | | LUT as Memory | 3386 | 0 | 26600 | 12.73 | | LUT as Memory | 3395 | 0 | 26600 | 12.76 | | LUT as Distributed RAM | 2850 | 0 | | | | LUT as Distributed RAM | 2858 | 0 | | | | LUT as Shift Register | 536 | 0 | | | | LUT as Shift Register | 537 | 0 | | | | Slice Registers | 54224 | 0 | 157200 | 34.49 | | Slice Registers | 54275 | 0 | 157200 | 34.53 | | Register as Flip Flop | 54224 | 0 | 157200 | 34.49 | | Register as Flip Flop | 54275 | 0 | 157200 | 34.53 | | Register as Latch | 0 | 0 | 157200 | 0.00 | | Register as Latch | 0 | 0 | 157200 | 0.00 | | F7 Muxes | 30 | 0 | 39300 | 0.08 | | F7 Muxes | 54 | 0 | 39300 | 0.14 | | F8 Muxes | 0 | 0 | 19650 | 0.00 | | F8 Muxes | 0 | 0 | 19650 | 0.00 | +----------------------------+-------+-------+-----------+-------+ +----------------------------+-------+-------+-----------+-------+ Loading @@ -57,9 +57,9 @@ Table of Contents | 0 | _ | Reset | - | | 0 | _ | Reset | - | | 0 | Yes | - | - | | 0 | Yes | - | - | | 16 | Yes | - | Set | | 16 | Yes | - | Set | | 692 | Yes | - | Reset | | 693 | Yes | - | Reset | | 953 | Yes | Set | - | | 965 | Yes | Set | - | | 52563 | Yes | Reset | - | | 52601 | Yes | Reset | - | +-------+--------------+-------------+--------------+ +-------+--------------+-------------+--------------+ Loading @@ -69,27 +69,27 @@ Table of Contents +-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+ | Site Type | Used | Fixed | Available | Util% | | Site Type | Used | Fixed | Available | Util% | +-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+ | Slice | 16473 | 0 | 19650 | 83.83 | | Slice | 16481 | 0 | 19650 | 83.87 | | SLICEL | 10855 | 0 | | | | SLICEL | 10863 | 0 | | | | SLICEM | 5618 | 0 | | | | SLICEM | 5618 | 0 | | | | LUT as Logic | 38565 | 0 | 78600 | 49.06 | | LUT as Logic | 38299 | 0 | 78600 | 48.73 | | using O5 output only | 3 | | | | | using O5 output only | 5 | | | | | using O6 output only | 30027 | | | | | using O6 output only | 29710 | | | | | using O5 and O6 | 8535 | | | | | using O5 and O6 | 8584 | | | | | LUT as Memory | 3386 | 0 | 26600 | 12.73 | | LUT as Memory | 3395 | 0 | 26600 | 12.76 | | LUT as Distributed RAM | 2850 | 0 | | | | LUT as Distributed RAM | 2858 | 0 | | | | using O5 output only | 2 | | | | | using O5 output only | 2 | | | | | using O6 output only | 84 | | | | | using O6 output only | 108 | | | | | using O5 and O6 | 2764 | | | | | using O5 and O6 | 2748 | | | | | LUT as Shift Register | 536 | 0 | | | | LUT as Shift Register | 537 | 0 | | | | using O5 output only | 263 | | | | | using O5 output only | 249 | | | | | using O6 output only | 221 | | | | | using O6 output only | 236 | | | | | using O5 and O6 | 52 | | | | | using O5 and O6 | 52 | | | | | LUT Flip Flop Pairs | 24440 | 0 | 78600 | 31.09 | | LUT Flip Flop Pairs | 24440 | 0 | 78600 | 31.09 | | fully used LUT-FF pairs | 4610 | | | | | fully used LUT-FF pairs | 4583 | | | | | LUT-FF pairs with one unused LUT output | 17751 | | | | | LUT-FF pairs with one unused LUT output | 17721 | | | | | LUT-FF pairs with one unused Flip Flop | 17508 | | | | | LUT-FF pairs with one unused Flip Flop | 17494 | | | | | Unique Control Sets | 4633 | | | | | Unique Control Sets | 4658 | | | | +-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+ * Note: Review the Control Sets Report for more information regarding control sets. * Note: Review the Control Sets Report for more information regarding control sets. Loading Loading @@ -197,19 +197,19 @@ Table of Contents +------------------------+-------+----------------------+ +------------------------+-------+----------------------+ | Ref Name | Used | Functional Category | | Ref Name | Used | Functional Category | +------------------------+-------+----------------------+ +------------------------+-------+----------------------+ | FDRE | 52563 | Flop & Latch | | FDRE | 52601 | Flop & Latch | | LUT3 | 11354 | LUT | | LUT3 | 11385 | LUT | | LUT6 | 10387 | LUT | | LUT6 | 10143 | LUT | | LUT2 | 8328 | LUT | | LUT2 | 8260 | LUT | | LUT4 | 7774 | LUT | | LUT4 | 7858 | LUT | | LUT5 | 7637 | LUT | | LUT5 | 7614 | LUT | | RAMD32 | 4198 | Distributed Memory | | RAMD32 | 4174 | Distributed Memory | | CARRY4 | 2809 | CarryLogic | | CARRY4 | 2809 | CarryLogic | | LUT1 | 1620 | LUT | | LUT1 | 1623 | LUT | | RAMS32 | 1416 | Distributed Memory | | RAMS32 | 1408 | Distributed Memory | | FDSE | 953 | Flop & Latch | | FDSE | 965 | Flop & Latch | | FDCE | 692 | Flop & Latch | | FDCE | 693 | Flop & Latch | | SRL16E | 484 | Distributed Memory | | SRL16E | 485 | Distributed Memory | | OBUFT | 121 | IO | | OBUFT | 121 | IO | | SRLC32E | 104 | Distributed Memory | | SRLC32E | 104 | Distributed Memory | | IBUF | 99 | IO | | IBUF | 99 | IO | Loading @@ -218,9 +218,10 @@ Table of Contents | RAMB18E1 | 62 | Block Memory | | RAMB18E1 | 62 | Block Memory | | IDELAYE2 | 60 | IO | | IDELAYE2 | 60 | IO | | RAMB36E1 | 54 | Block Memory | | RAMB36E1 | 54 | Block Memory | | MUXF7 | 54 | MuxFx | | OSERDESE2 | 43 | IO | | OSERDESE2 | 43 | IO | | ODELAYE2_FINEDELAY | 43 | IO | | ODELAYE2_FINEDELAY | 43 | IO | | MUXF7 | 30 | MuxFx | | RAMD64E | 24 | Distributed Memory | | OBUFT_DCIEN | 18 | IO | | OBUFT_DCIEN | 18 | IO | | IDELAYE2_FINEDELAY | 18 | IO | | IDELAYE2_FINEDELAY | 18 | IO | | IBUF_IBUFDISABLE | 18 | IO | | IBUF_IBUFDISABLE | 18 | IO | Loading Loading
fpga_version.vh +1 −2 Original line number Original line Diff line number Diff line Loading @@ -35,13 +35,12 @@ * contains all the components and scripts required to completely simulate it * contains all the components and scripts required to completely simulate it * with at least one of the Free Software programs. * with at least one of the Free Software programs. */ */ parameter FPGA_VERSION = 32'h0393401b; // GPS 1 PPS instead of odometer parameter FPGA_VERSION = 32'h03931005; // parallel, converting from 32'h0393401a // parameter FPGA_VERSION = 32'h0393401a; // adding strobe output for IMX-5 on ext-5 // parameter FPGA_VERSION = 32'h0393401a; // adding strobe output for IMX-5 on ext-5 // parameter FPGA_VERSION = 32'h03934019; // Boson640, logger debug disabled // parameter FPGA_VERSION = 32'h03934019; // Boson640, logger debug disabled // parameter FPGA_VERSION = 32'h03934018; // Boson640, debugging logger 02 // parameter FPGA_VERSION = 32'h03934018; // Boson640, debugging logger 02 // parameter FPGA_VERSION = 32'h03934017; // Boson640, debugging logger 01 // parameter FPGA_VERSION = 32'h03934017; // Boson640, debugging logger 01 // parameter FPGA_VERSION = 32'h03934016; // Boson640, for 103993A, started IMU // parameter FPGA_VERSION = 32'h03934016; // Boson640, for 103993A, started IMU // parameter FPGA_VERSION = 32'h03931004; // parallel, starting IMS support // not yet used // parameter FPGA_VERSION = 32'h03931003; // parallel, adding camsync trigger decimation - modifying decimation // parameter FPGA_VERSION = 32'h03931003; // parallel, adding camsync trigger decimation - modifying decimation // parameter FPGA_VERSION = 32'h03934015; // Boson640, for 103993A, debugging 4 removed DE deglitch - modifying decimation // parameter FPGA_VERSION = 32'h03934015; // Boson640, for 103993A, debugging 4 removed DE deglitch - modifying decimation // parameter FPGA_VERSION = 32'h03931004; // parallel, adding camsync trigger decimation - modifying decimation // parameter FPGA_VERSION = 32'h03931004; // parallel, adding camsync trigger decimation - modifying decimation Loading
system_defines.vh +2 −2 Original line number Original line Diff line number Diff line Loading @@ -65,10 +65,10 @@ `define DISPLAY_COMPRESSED_DATA `define DISPLAY_COMPRESSED_DATA // if specific sesnor is not defined, parallel sensor interface is used for all channels // if specific sesnor is not defined, parallel sensor interface is used for all channels /*************** CHANGE here and x393_hispi | x393_parallel | x393_lwir | x393_boson in bitstream (and few other) tool settings ****************/ /*************** CHANGE here and x393_hispi | x393_parallel | x393_lwir | x393_boson in bitstream (and few other) tool settings ****************/ `define BOSON 1 // `define BOSON 1 // `define LWIR // `define LWIR // `define HISPI // `define HISPI // also change in utilization and timimg summary tools (x393_parallel_utilization.report, ...) // also change in bitstream, utilization and timimg summary tools (x393_parallel_utilization.report, ...) `ifdef BOSON `ifdef BOSON `elsif LWIR `elsif LWIR Loading
x393_parallel.bit (5.7 MiB) File changed.No diff preview for this file type. View original file View changed file
x393_parallel.timing_summary_impl +1413 −1433 File changed.Preview size limit exceeded, changes collapsed. Show changes
x393_parallel_utilization.report +43 −42 Original line number Original line Diff line number Diff line Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. ---------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------- | Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017 | Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017 | Date : Mon Mar 22 12:57:54 2021 | Date : Thu Mar 9 11:38:40 2023 | Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS | Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS | Command : report_utilization -file vivado_build/x393_parallel_utilization.report | Command : report_utilization -file vivado_build/x393_parallel_utilization.report | Design : x393 | Design : x393 Loading Loading @@ -31,15 +31,15 @@ Table of Contents +----------------------------+-------+-------+-----------+-------+ +----------------------------+-------+-------+-----------+-------+ | Site Type | Used | Fixed | Available | Util% | | Site Type | Used | Fixed | Available | Util% | +----------------------------+-------+-------+-----------+-------+ +----------------------------+-------+-------+-----------+-------+ | Slice LUTs | 41951 | 0 | 78600 | 53.37 | | Slice LUTs | 41694 | 0 | 78600 | 53.05 | | LUT as Logic | 38565 | 0 | 78600 | 49.06 | | LUT as Logic | 38299 | 0 | 78600 | 48.73 | | LUT as Memory | 3386 | 0 | 26600 | 12.73 | | LUT as Memory | 3395 | 0 | 26600 | 12.76 | | LUT as Distributed RAM | 2850 | 0 | | | | LUT as Distributed RAM | 2858 | 0 | | | | LUT as Shift Register | 536 | 0 | | | | LUT as Shift Register | 537 | 0 | | | | Slice Registers | 54224 | 0 | 157200 | 34.49 | | Slice Registers | 54275 | 0 | 157200 | 34.53 | | Register as Flip Flop | 54224 | 0 | 157200 | 34.49 | | Register as Flip Flop | 54275 | 0 | 157200 | 34.53 | | Register as Latch | 0 | 0 | 157200 | 0.00 | | Register as Latch | 0 | 0 | 157200 | 0.00 | | F7 Muxes | 30 | 0 | 39300 | 0.08 | | F7 Muxes | 54 | 0 | 39300 | 0.14 | | F8 Muxes | 0 | 0 | 19650 | 0.00 | | F8 Muxes | 0 | 0 | 19650 | 0.00 | +----------------------------+-------+-------+-----------+-------+ +----------------------------+-------+-------+-----------+-------+ Loading @@ -57,9 +57,9 @@ Table of Contents | 0 | _ | Reset | - | | 0 | _ | Reset | - | | 0 | Yes | - | - | | 0 | Yes | - | - | | 16 | Yes | - | Set | | 16 | Yes | - | Set | | 692 | Yes | - | Reset | | 693 | Yes | - | Reset | | 953 | Yes | Set | - | | 965 | Yes | Set | - | | 52563 | Yes | Reset | - | | 52601 | Yes | Reset | - | +-------+--------------+-------------+--------------+ +-------+--------------+-------------+--------------+ Loading @@ -69,27 +69,27 @@ Table of Contents +-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+ | Site Type | Used | Fixed | Available | Util% | | Site Type | Used | Fixed | Available | Util% | +-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+ | Slice | 16473 | 0 | 19650 | 83.83 | | Slice | 16481 | 0 | 19650 | 83.87 | | SLICEL | 10855 | 0 | | | | SLICEL | 10863 | 0 | | | | SLICEM | 5618 | 0 | | | | SLICEM | 5618 | 0 | | | | LUT as Logic | 38565 | 0 | 78600 | 49.06 | | LUT as Logic | 38299 | 0 | 78600 | 48.73 | | using O5 output only | 3 | | | | | using O5 output only | 5 | | | | | using O6 output only | 30027 | | | | | using O6 output only | 29710 | | | | | using O5 and O6 | 8535 | | | | | using O5 and O6 | 8584 | | | | | LUT as Memory | 3386 | 0 | 26600 | 12.73 | | LUT as Memory | 3395 | 0 | 26600 | 12.76 | | LUT as Distributed RAM | 2850 | 0 | | | | LUT as Distributed RAM | 2858 | 0 | | | | using O5 output only | 2 | | | | | using O5 output only | 2 | | | | | using O6 output only | 84 | | | | | using O6 output only | 108 | | | | | using O5 and O6 | 2764 | | | | | using O5 and O6 | 2748 | | | | | LUT as Shift Register | 536 | 0 | | | | LUT as Shift Register | 537 | 0 | | | | using O5 output only | 263 | | | | | using O5 output only | 249 | | | | | using O6 output only | 221 | | | | | using O6 output only | 236 | | | | | using O5 and O6 | 52 | | | | | using O5 and O6 | 52 | | | | | LUT Flip Flop Pairs | 24440 | 0 | 78600 | 31.09 | | LUT Flip Flop Pairs | 24440 | 0 | 78600 | 31.09 | | fully used LUT-FF pairs | 4610 | | | | | fully used LUT-FF pairs | 4583 | | | | | LUT-FF pairs with one unused LUT output | 17751 | | | | | LUT-FF pairs with one unused LUT output | 17721 | | | | | LUT-FF pairs with one unused Flip Flop | 17508 | | | | | LUT-FF pairs with one unused Flip Flop | 17494 | | | | | Unique Control Sets | 4633 | | | | | Unique Control Sets | 4658 | | | | +-------------------------------------------+-------+-------+-----------+-------+ +-------------------------------------------+-------+-------+-----------+-------+ * Note: Review the Control Sets Report for more information regarding control sets. * Note: Review the Control Sets Report for more information regarding control sets. Loading Loading @@ -197,19 +197,19 @@ Table of Contents +------------------------+-------+----------------------+ +------------------------+-------+----------------------+ | Ref Name | Used | Functional Category | | Ref Name | Used | Functional Category | +------------------------+-------+----------------------+ +------------------------+-------+----------------------+ | FDRE | 52563 | Flop & Latch | | FDRE | 52601 | Flop & Latch | | LUT3 | 11354 | LUT | | LUT3 | 11385 | LUT | | LUT6 | 10387 | LUT | | LUT6 | 10143 | LUT | | LUT2 | 8328 | LUT | | LUT2 | 8260 | LUT | | LUT4 | 7774 | LUT | | LUT4 | 7858 | LUT | | LUT5 | 7637 | LUT | | LUT5 | 7614 | LUT | | RAMD32 | 4198 | Distributed Memory | | RAMD32 | 4174 | Distributed Memory | | CARRY4 | 2809 | CarryLogic | | CARRY4 | 2809 | CarryLogic | | LUT1 | 1620 | LUT | | LUT1 | 1623 | LUT | | RAMS32 | 1416 | Distributed Memory | | RAMS32 | 1408 | Distributed Memory | | FDSE | 953 | Flop & Latch | | FDSE | 965 | Flop & Latch | | FDCE | 692 | Flop & Latch | | FDCE | 693 | Flop & Latch | | SRL16E | 484 | Distributed Memory | | SRL16E | 485 | Distributed Memory | | OBUFT | 121 | IO | | OBUFT | 121 | IO | | SRLC32E | 104 | Distributed Memory | | SRLC32E | 104 | Distributed Memory | | IBUF | 99 | IO | | IBUF | 99 | IO | Loading @@ -218,9 +218,10 @@ Table of Contents | RAMB18E1 | 62 | Block Memory | | RAMB18E1 | 62 | Block Memory | | IDELAYE2 | 60 | IO | | IDELAYE2 | 60 | IO | | RAMB36E1 | 54 | Block Memory | | RAMB36E1 | 54 | Block Memory | | MUXF7 | 54 | MuxFx | | OSERDESE2 | 43 | IO | | OSERDESE2 | 43 | IO | | ODELAYE2_FINEDELAY | 43 | IO | | ODELAYE2_FINEDELAY | 43 | IO | | MUXF7 | 30 | MuxFx | | RAMD64E | 24 | Distributed Memory | | OBUFT_DCIEN | 18 | IO | | OBUFT_DCIEN | 18 | IO | | IDELAYE2_FINEDELAY | 18 | IO | | IDELAYE2_FINEDELAY | 18 | IO | | IBUF_IBUFDISABLE | 18 | IO | | IBUF_IBUFDISABLE | 18 | IO | Loading
