diff --git a/fpga_version.vh b/fpga_version.vh
index 281ec967d155f02d027871f614d394ab5cb404f6..8149c0fb5f4e6e535f4e70ac7029dbd726b0f68e 100644
--- a/fpga_version.vh
+++ b/fpga_version.vh
@@ -35,7 +35,9 @@
  * contains all the components and scripts required to completely simulate it
  * with at least one of the Free Software programs.
  */
-        parameter FPGA_VERSION =          32'h03930110;      // serial - 17.4 - restored delay after linear, foxed bug, timing failed
+        parameter FPGA_VERSION =          32'h03930107;      // parallel - 17.4 - restored delay after linear, foxed bug, all met
+//        parameter FPGA_VERSION =          32'h03930110;      //A serial - 17.4 - restored delay after linear, foxed bug, timing met
+//        parameter FPGA_VERSION =          32'h03930110;      // serial - 17.4 - restored delay after linear, foxed bug, timing failed
 //        parameter FPGA_VERSION =          32'h03930107;      // parallel - 17.4 - restored delay after linear, foxed bug, all met
 //      parameter FPGA_VERSION =          32'h03930106;      // parallel - 17.4 - increased delay after linear read all met
 //      parameter FPGA_VERSION =          32'h03930105;      // parallel - 17.4 - fixed wide raw frames all met
diff --git a/py393/.project b/py393/.project
index 8a76f1a40ba7d1d2170c39ac8aaa0accd674e371..7cb0ef6b2545afbe99b91adbe5f9017e31602843 100644
--- a/py393/.project
+++ b/py393/.project
@@ -14,4 +14,11 @@
 	<natures>
 		<nature>org.python.pydev.pythonNature</nature>
 	</natures>
+	<linkedResources>
+		<link>
+			<name>vivado_logs/VivadoSynthesis.log</name>
+			<type>1</type>
+			<location>/data_ssd/nc393/elphel393/fpga-elphel/x393/py393/vivado_logs/VivadoSynthesis-20190404120819591.log</location>
+		</link>
+	</linkedResources>
 </projectDescription>
diff --git a/system_defines.vh b/system_defines.vh
index f479e0101402704869edd91333ebfaca9a0d933b..fdbd4123a1b6405dddab3771efe7a949653823da 100644
--- a/system_defines.vh
+++ b/system_defines.vh
@@ -64,7 +64,7 @@
   `define PRELOAD_BRAMS
   `define DISPLAY_COMPRESSED_DATA  
   // if HISPI is not defined, parallel sensor interface is used for all channels
-  `define HISPI /*************** CHANGE here and x393_hispi/x393_parallel in bitstream tool settings ****************/
+//  `define HISPI /*************** CHANGE here and x393_hispi/x393_parallel in bitstream tool settings ****************/
   `define MON_HISPI // Measure HISPI timing  
 //    `define USE_OLD_XDCT393  
 //  `define USE_PCLK2X