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Commit ca6e4334 authored by Andrey Filippov's avatar Andrey Filippov
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README.md
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...@@ -10,7 +10,7 @@ FPGA code for Elphel 393 camera, created with [VDT plugin](https://github.com/El ...@@ -10,7 +10,7 @@ FPGA code for Elphel 393 camera, created with [VDT plugin](https://github.com/El
Run ./INIT_PROJECT in the top directory to copy initial .project and .pydevproject files for Eclipse Run ./INIT_PROJECT in the top directory to copy initial .project and .pydevproject files for Eclipse
Simulation of this project requires some files from the Xilinx proprietary _unisims_ library (list of dependencies Simulation of this project requires some files from the Xilinx proprietary _unisims_ library (list of dependencies
is in this [blog post](http://blog.elphel.com/2016/03/free-fpga-reimplement-the-primitives-models/) ). is in this [blog post](http://blog.elphel.com/2016/03/free-fpga-reimplement-the-primitives-models/)).
[VDT plugin](https://github.com/Elphel/vdt-plugin) README file describes steps needed after installation of Xilinx software [VDT plugin](https://github.com/Elphel/vdt-plugin) README file describes steps needed after installation of Xilinx software
(unisims library is not distributed separatly). (unisims library is not distributed separately).
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