added boson bit, generated for as if 2.5V (c4b3e834) · Commits · Elphel / x393

fpga_version.vh

+2 −1

Original line number	Diff line number	Diff line
		@@ -35,7 +35,8 @@
		* contains all the components and scripts required to completely simulate it
		* with at least one of the Free Software programs.
		*/
		parameter FPGA_VERSION = 32'h03930200; // Initial Boson implementation
		parameter FPGA_VERSION = 32'h03930201; // Initial Boson implementation (cheating with 2.5V - as with HISPI)
		// parameter FPGA_VERSION = 32'h03930200; // Initial Boson implementation (1.8V)
		//BOSON
		// parameter FPGA_VERSION = 32'h03930139; // Adding pullup on senspgm
		// parameter FPGA_VERSION = 32'h03930138; // Fixing output trigger in free running mode

includes/x393_parameters.vh

+1 −1

Original line number	Diff line number	Diff line
		@@ -687,7 +687,7 @@

		// parameters for the sensor-synchronous clock PLL
		// ALL PARAMETERS HERE SHOULD BE DEFINED (for use in C-generator)
		//`define TWEAKING_IOSTANDARD
		`define TWEAKING_IOSTANDARD
		`ifdef HISPI
		parameter CLKIN_PERIOD_SENSOR = 3.000, // input period in ns, 0..100.000 - MANDATORY, resolution down to 1 ps
		parameter CLKFBOUT_MULT_SENSOR = 3, // 330 MHz --> 990 MHz

sensor/sens_103993.v

+36 −11

Original line number	Diff line number	Diff line
		@@ -186,8 +186,8 @@ module sens_103993 #(
		input extif_rst
		);

		wire[7:0]debug_UART_CLK_DIV = CLK_DIV; // = 22,
		wire[7:0]debug_UART_RX_DEBOUNCE = RX_DEBOUNCE; // 6,
		// wire[7:0]debug_UART_CLK_DIV = CLK_DIV; // = 22,
		// wire[7:0]debug_UART_RX_DEBOUNCE = RX_DEBOUNCE; // 6,

		wire dvalid_w;
		reg dvalid_r;
		@@ -251,12 +251,13 @@ module sens_103993 #(
		wire senspgmin; // detect sensorboard
		// GP0..GP3 are not yet used, fake-use gp_comb to keep
		wire [3:0] gp;
		wire gp_comb = &gp[3:0];
		wire [2:0] dummy; // to keep iostandard of unused pins in a bank
		wire gp_comb = (^gp[3:0]) ^ (^dummy);

		assign status = {recv_data[7:0], // [23:16]
		recv_eop, // 15
		recv_pav, // 14
		mrst ? gp_comb : hact_alive, // 13 using gp_comb to keep
		imrst ? hact_alive : gp_comb,// 13 using gp_comb to keep
		locked_pclk, // 12 // wait after mrst
		clkin_pxd_stopped_mmcm, // 11
		clkfb_pxd_stopped_mmcm, // 10
		@@ -565,20 +566,21 @@ module sens_103993 #(
		.IOSTANDARD (PXD_IOSTANDARD),
		.SLEW (PXD_SLEW)
		) sns_dp6_i (
		.O (), // output
		.O (dummy[0]), // output
		.IO (sns_dp6), // inout
		.I (1'b0), // input
		.T (1'b0) // input
		);

		// dummy I/O to specify IOSTANDARD
		/*
		iobuf #(
		.DRIVE (PXD_DRIVE),
		.IBUF_LOW_PWR (PXD_IBUF_LOW_PWR),
		.IOSTANDARD (PXD_IOSTANDARD),
		.SLEW (PXD_SLEW)
		) sns_dp3_i (
		.O (), // output
		.O (dummy[1]), // output
		.IO (sns_dp[3]), // inout
		.I (1'b0), // input
		.T (1'b0) // input
		@@ -591,11 +593,34 @@ module sens_103993 #(
		.IOSTANDARD (PXD_IOSTANDARD),
		.SLEW (PXD_SLEW)
		) sns_dn3_i (
		.O (), // output
		.O (dummy[2]), // output
		.IO (sns_dn[3]), // inout
		.I (1'b0), // input
		.T (1'b0) // input
		);
		*/

		ibuf_ibufg #(
		.CAPACITANCE (PXD_CAPACITANCE),
		.IBUF_DELAY_VALUE("0"),
		.IBUF_LOW_PWR (PXD_IBUF_LOW_PWR),
		.IFD_DELAY_VALUE("AUTO"),
		.IOSTANDARD (PXD_IOSTANDARD)
		) sns_dp3_i (
		.O(dummy[1]), // output
		.I(sns_dn[3]) // input
		);
		ibuf_ibufg #(
		.CAPACITANCE (PXD_CAPACITANCE),
		.IBUF_DELAY_VALUE("0"),
		.IBUF_LOW_PWR (PXD_IBUF_LOW_PWR),
		.IFD_DELAY_VALUE("AUTO"),
		.IOSTANDARD (PXD_IOSTANDARD)
		) sns_dn3_i (
		.O(dummy[2]), // output
		.I(sns_dp[3]) // input
		);

		// end of dummy

x393_boson.bit

0 → 100644

+5.7 MiB

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