Commit b28b105f authored by Andrey Filippov's avatar Andrey Filippov
Browse files

cosmetic

parent 3e5d8c1c

fpga_version.vh

+4 −4
Original line number Original line Diff line number Diff line
@@ -35,10 +35,10 @@ 
 * contains all the components and scripts required to completely simulate it

 * contains all the components and scripts required to completely simulate it

 * with at least one of the Free Software programs.

 * with at least one of the Free Software programs.

 */

 */

        parameter FPGA_VERSION =          32'h03930107;      // parallel - 17.4 - restored delay after linear, foxed bug, all met

        parameter FPGA_VERSION =          32'h03930107;      // parallel - 17.4 - restored delay after linear, fixed bug, all met

//        parameter FPGA_VERSION =          32'h03930110;      //A serial - 17.4 - restored delay after linear, foxed bug, timing met

//        parameter FPGA_VERSION =          32'h03930110;      //A serial - 17.4 - restored delay after linear, fixed bug, timing met

//        parameter FPGA_VERSION =          32'h03930110;      // serial - 17.4 - restored delay after linear, foxed bug, timing failed

//        parameter FPGA_VERSION =          32'h03930110;      // serial - 17.4 - restored delay after linear, fixed bug, timing failed

//        parameter FPGA_VERSION =          32'h03930107;      // parallel - 17.4 - restored delay after linear, foxed bug, all met

//        parameter FPGA_VERSION =          32'h03930107;      // parallel - 17.4 - restored delay after linear, fixed bug, all met

//      parameter FPGA_VERSION =          32'h03930106;      // parallel - 17.4 - increased delay after linear read all met

//      parameter FPGA_VERSION =          32'h03930106;      // parallel - 17.4 - increased delay after linear read all met

//      parameter FPGA_VERSION =          32'h03930105;      // parallel - 17.4 - fixed wide raw frames all met

//      parameter FPGA_VERSION =          32'h03930105;      // parallel - 17.4 - fixed wide raw frames all met

//      parameter FPGA_VERSION =          32'h03930104;      // parallel - 17.4 - added RAW mode (for tiff files) timing met

//      parameter FPGA_VERSION =          32'h03930104;      // parallel - 17.4 - added RAW mode (for tiff files) timing met

sensor/sens_parallel12.v

+0 −1
Original line number Original line Diff line number Diff line
@@ -200,7 +200,6 @@ module sens_parallel12 #( 
//    wire [18:0] status;

//    wire [18:0] status;

//    wire [22:0] status;

//    wire [22:0] status;

    wire [25:0] status; // added byte-wide xfpgatdo

    wire [25:0] status; // added byte-wide xfpgatdo

    

    wire        cmd_we;

    wire        cmd_we;

    wire  [2:0] cmd_a;

    wire  [2:0] cmd_a;

    wire [31:0] cmd_data;

    wire [31:0] cmd_data;