Commit a78a7d75 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

removed conflicting line from hargs-after

parent dcb169c1

py393/hargs-after

+0 −1
Original line number Diff line number Diff line
@@ -6,5 +6,4 @@ 
-c bitstream_set_path /usr/local/verilog/x393_parallel.bit

-c specify_phys_memory

-c specify_window

-c set_qtables all 0 80

-i

py393/x393_jpeg.py

+2 −2
Original line number Diff line number Diff line
@@ -1049,8 +1049,8 @@ setup_all_sensors True None 0x4 


################## Parallel after drivers ##################

cd /usr/local/verilog/; test_mcntrl.py @hargs-after

specify_phys_memory

specify_window



set_qtables all 0 80



r

read_control_register 0x431