Commit 9e6ef7de authored by Andrey Filippov's avatar Andrey Filippov
Browse files

implemented with SATA, 83.28% slices

parent 29f6baac

.project

+11 −11
Original line number Diff line number Diff line
@@ -62,52 +62,52 @@ 
		<link>

			<name>vivado_logs/VivadoBitstream.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160316003619053.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160316133233827.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoOpt.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20160316003619053.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20160316133233827.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoOptPhys.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20160316003619053.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20160316133233827.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoOptPower.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160316003619053.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160316133233827.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoPlace.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20160316003619053.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20160316133233827.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoRoute.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160316003619053.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160316133233827.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoSynthesis.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160316003135844.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160316133233827.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20160316003619053.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20160316133233827.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160316003135844.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160316133233827.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoTimingReportSynthesis.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20160316003135844.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20160316133233827.log</location>

		</link>

		<link>

			<name>vivado_state/x393-opt-phys.dcp</name>
@@ -127,7 +127,7 @@ 
		<link>

			<name>vivado_state/x393-synth.dcp</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_state/x393-synth-20160316003135844.dcp</location>

			<location>/home/andrey/git/x393/vivado_state/x393-synth-20160316133233827.dcp</location>

		</link>

	</linkedResources>

</projectDescription>

.settings/com.elphel.vdt.VivadoSynthesis.prefs

+3 −2
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@@ -2,14 +2,15 @@ VivadoSynthesis_101_MaxMsg=10000 
VivadoSynthesis_102_ConstraintsFiles=x393.xdc<-@\#\#@->x393_timing.xdc<-@\#\#@->

VivadoSynthesis_115_flatten_hierarchy=none

VivadoSynthesis_121_ConstraintsFiles=x393.xdc<-@\#\#@->x393_timing.xdc<-@\#\#@->

VivadoSynthesis_121_MaxMsg=5000

VivadoSynthesis_122_ConstraintsFiles=x393_hispi.xdc<-@\#\#@->x393_hispi_timing.xdc<-@\#\#@->

VivadoSynthesis_122_SkipSnapshotSynth=true

VivadoSynthesis_123_ResetProject=true

VivadoSynthesis_123_SkipSnapshotSynth=true

VivadoSynthesis_124_ConstraintsFiles=x393_hispi.xdc<-@\#\#@->x393_hispi_timing.xdc<-@\#\#@->x393_sata/ahci_timing.xdc<-@\#\#@->

VivadoSynthesis_124_ConstraintsFiles=x393_hispi.xdc<-@\#\#@->x393_hispi_timing.xdc<-@\#\#@->x393_sata/ahci_timing_frag.xdc<-@\#\#@->

VivadoSynthesis_127_verbose=true

VivadoSynthesis_81_parser_mode=1

VivadoSynthesis_93_OtherProblems=Netlist 29-345<-@\#\#@->Board 49-26<-@\#\#@->Synth 8-638<-@\#\#@->Synth 8-256<-@\#\#@->

VivadoSynthesis_95_ShowInfo=true

com.elphel.store.context.VivadoSynthesis=VivadoSynthesis_102_ConstraintsFiles<-@\#\#@->VivadoSynthesis_95_ShowInfo<-@\#\#@->VivadoSynthesis_115_flatten_hierarchy<-@\#\#@->VivadoSynthesis_101_MaxMsg<-@\#\#@->VivadoSynthesis_127_verbose<-@\#\#@->VivadoSynthesis_93_OtherProblems<-@\#\#@->VivadoSynthesis_81_parser_mode<-@\#\#@->VivadoSynthesis_121_ConstraintsFiles<-@\#\#@->VivadoSynthesis_122_SkipSnapshotSynth<-@\#\#@->VivadoSynthesis_123_ResetProject<-@\#\#@->VivadoSynthesis_123_SkipSnapshotSynth<-@\#\#@->VivadoSynthesis_122_ConstraintsFiles<-@\#\#@->VivadoSynthesis_124_ConstraintsFiles<-@\#\#@->

com.elphel.store.context.VivadoSynthesis=VivadoSynthesis_102_ConstraintsFiles<-@\#\#@->VivadoSynthesis_95_ShowInfo<-@\#\#@->VivadoSynthesis_115_flatten_hierarchy<-@\#\#@->VivadoSynthesis_101_MaxMsg<-@\#\#@->VivadoSynthesis_127_verbose<-@\#\#@->VivadoSynthesis_93_OtherProblems<-@\#\#@->VivadoSynthesis_81_parser_mode<-@\#\#@->VivadoSynthesis_121_ConstraintsFiles<-@\#\#@->VivadoSynthesis_122_SkipSnapshotSynth<-@\#\#@->VivadoSynthesis_123_ResetProject<-@\#\#@->VivadoSynthesis_123_SkipSnapshotSynth<-@\#\#@->VivadoSynthesis_122_ConstraintsFiles<-@\#\#@->VivadoSynthesis_124_ConstraintsFiles<-@\#\#@->VivadoSynthesis_121_MaxMsg<-@\#\#@->

eclipse.preferences.version=1

.settings/com.elphel.vdt.iverilog.prefs

+1 −1
Original line number Diff line number Diff line
@@ -11,7 +11,7 @@ iverilog_104_ExtraFiles=glbl.v<-@\#\#@-> 
iverilog_104_IncludeDir=${verilog_project_loc}/ddr3<-@\#\#@->${verilog_project_loc}/includes<-@\#\#@->

iverilog_105_ExtraFiles=glbl.v<-@\#\#@->

iverilog_105_IncludeDir=${verilog_project_loc}/includes<-@\#\#@->${verilog_project_loc}/ddr3<-@\#\#@->

iverilog_106_IncludeDir=${verilog_project_loc}/x393/includes<-@\#\#@->${verilog_project_loc}/x393/ddr3<-@\#\#@->${verilog_project_loc}/x393_sata/includes<-@\#\#@->

iverilog_106_IncludeDir=${verilog_project_loc}/x393/includes<-@\#\#@->${verilog_project_loc}/x393/ddr3<-@\#\#@->${verilog_project_loc}/x393_sata/includes<-@\#\#@->${verilog_project_loc}/x393_sata/host<-@\#\#@->

iverilog_109_ShowNoProblem=true

iverilog_110_ShowNoProblem=true

iverilog_110_ShowWarnings=false

copy_x393_sata.sh

+2 −2
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ x393_sata/device/sata_device.v 
#!/bin/bash

REPO_ROOT=".."

CWD="$(pwd)"

#copy x393_sata unique files to the new x393_sata/ subdirectory

#cop (or update)y x393_sata unique files to the new x393_sata/ subdirectory

cd $REPO_ROOT

cp -v --parents \

x393_sata/device/oob_dev.v \
@@ -47,7 +47,7 @@ x393_sata/system_defines.vh \ 
x393_sata/ahci_timing.xdc \

$CWD



#Copy include files to includes/

#Copy (or update) include files to includes/

cp -v \

x393_sata/includes/ahxi_fsm_code.vh \

x393_sata/includes/ahci_localparams.vh \

fpga_version.vh

+2 −1
Original line number Diff line number Diff line
@@ -31,7 +31,8 @@ 
 * contains all the components and scripts required to completely simulate it

 * with at least one of the Free Software programs.

 *******************************************************************************/

      parameter FPGA_VERSION =          32'h03930073;  // Adding interrupts support

      parameter FPGA_VERSION =          32'h03930074;  // Adding SATA controller

//      parameter FPGA_VERSION =          32'h03930073;  // Adding interrupts support

//      parameter FPGA_VERSION =          32'h03930072;  // Adding hact monitor bit 77.9%, failed timing

//    parameter FPGA_VERSION =          32'h03930071;  // Fixing AXI HP multiplexer xclk -0.083 -1.968 44 / 15163 (77.17%)

//    parameter FPGA_VERSION =          32'h03930070;  // Fixing HiSPi xclk -0.049 -0.291 17, utilization 15139 (77.04%)