Commit 9d60666b authored by Andrey Filippov's avatar Andrey Filippov
Browse files

vospi debug, implemented packet synchronization by signature

parent 6edd5fac

cocotb/x393_cocotb_lwir_04.sav

+109 −21
Original line number Diff line number Diff line 
[*]

[*] GTKWave Analyzer v3.3.78 (w)1999-2016 BSI

[*] Fri Apr 19 05:17:10 2019

[*] Thu Apr 25 23:42:15 2019

[*]

[dumpfile] "/data_ssd/nc393/elphel393/fpga-elphel/x393/simulation/x393_dut-20190418181641542.fst"

[dumpfile_mtime] "Fri Apr 19 04:43:12 2019"

[dumpfile_size] 1314203898

[dumpfile] "/data_ssd/nc393/elphel393/fpga-elphel/x393/simulation/x393_dut-20190425172733675.fst"

[dumpfile_mtime] "Thu Apr 25 23:38:14 2019"

[dumpfile_size] 13065486

[savefile] "/data_ssd/nc393/elphel393/fpga-elphel/x393/cocotb/x393_cocotb_lwir_04.sav"

[timestart] 949964300

[timestart] 34144200

[size] 1804 1171

[pos] -1 -1

*-12.313575 949969888 1019686803 237352388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

*-14.717531 34226035 1019686803 237352388 855469045 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

[treeopen] x393_dut.

[treeopen] x393_dut.simul_lwir160x120_vospi1_i.

[treeopen] x393_dut.x393_i.
@@ -68,9 +68,11 @@ 
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.genblk1.sens_histogram_0_i.genblk1.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.genblk1.sens_histogram_0_i.genblk1.sens_hist_ram_snglclk_32_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_histogram_mux_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.crc16_x16x12x5x0_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.chn1wr_buf_i.
@@ -87,8 +89,8 @@ 
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.sens_sync_i.

[treeopen] x393_dut.x393_i.timing393_i.camsync393_i.

[treeopen] x393_dut.x393_i.timing393_i.camsync393_i.i_frsync_pclk0.

[sst_width] 346

[signals_width] 388

[sst_width] 204

[signals_width] 335

[sst_expanded] 1

[sst_vpaned_height] 459

@820
@@ -3104,6 +3106,9 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepto 
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.hact_start_w

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.hact_end_w

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.hact_r[2:0]

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.running_good

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.segment_stb

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.segment_good

@200

-

@28
@@ -3155,6 +3160,18 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepto 
@800200

-vospi_packet80_0

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.will_sync

[color] 1

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.sync_end

[color] 3

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.last_r

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.packet_invalid_r

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.set_id_r

[color] 2

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.sync_err

@200

-

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.pre_lsb_w

@22

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.wcntr[6:0]
@@ -3170,9 +3187,14 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepto 
-group_end

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.start

@22

@c00022

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.cs_r[1:0]

@28

(0)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.cs_r[1:0]

(1)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.cs_r[1:0]

@1401200

-group_end

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.spi_clken

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.spi_cs

@8022
@@ -3206,7 +3228,15 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepto 
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.d_r[15:0]

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.set_id_r

@800028

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.packet_end[2:0]

@28

(0)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.packet_end[2:0]

(1)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.packet_end[2:0]

(2)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.packet_end[2:0]

@1001200

-group_end

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.packet_busy

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.packet_done

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.packet_invalid
@@ -3218,6 +3248,8 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepto 
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.packet_done

[color] 6

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.crc_err

[color] 7

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.sync_err

@22

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.crc_r[15:0]

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.crc_w[15:0]
@@ -3232,6 +3264,73 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepto 
@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.den_r

@800200

-vospi_resync

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.rst

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.clk

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.clken

@8022

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.count_ones[4:0]

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.count_tail[10:0]

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.count_zeros[8:0]

@28

[color] 3

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.miso

[color] 3

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.will_sync

[color] 2

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.set_ending

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.spi_clken

[color] 7

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.spi_cs

@800022

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state[4:0]

@28

[color] 5

(0)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state[4:0]

[color] 5

(1)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state[4:0]

[color] 5

(2)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state[4:0]

[color] 5

(3)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state[4:0]

[color] 5

(4)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state[4:0]

@1001200

-group_end

@800022

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_reset[4:0]

@28

(0)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_reset[4:0]

@29

(1)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_reset[4:0]

@28

(2)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_reset[4:0]

(3)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_reset[4:0]

(4)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_reset[4:0]

@1001200

-group_end

@800022

[color] 3

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_set[4:0]

@28

[color] 3

(0)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_set[4:0]

[color] 3

(1)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_set[4:0]

[color] 3

(2)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_set[4:0]

[color] 3

(3)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_set[4:0]

[color] 3

(4)x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_resync_i.state_set[4:0]

@1001200

-group_end

@200

-

@1000200

-vospi_resync

@800200

-crc

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.vospi_segment_61_i.vospi_packet_80_i.crc16_x16x12x5x0_i.en
@@ -3257,8 +3356,6 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepto 
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.cmd_we

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.crc_err_r

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.crc_err_w

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.crc_reset_mclk

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.crc_reset_pclk

@22

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.data_r[31:0]

@28
@@ -3268,7 +3365,6 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepto 
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.exp_segment[3:0]

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.fake_in

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.fake_out

@22

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.gpio[3:0]

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.gpio_en[3:0]
@@ -3337,12 +3433,10 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepto 
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.spi_miso

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.spi_miso_int

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.spi_mosi

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.spi_mosi_int

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.spi_nrst_mclk

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.spi_nrst_pclk[1:0]

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.start_segment

@22

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.status[13:0]

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.status_ad[7:0]

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_lepton3_i.status_rq
@@ -8085,19 +8179,13 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.window_ 
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.window_width[13:0]

@1000200

-memsensor0

@28

x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.uncompressed

@22

x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.raw_buf_ra[11:0]

x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_pxd[7:0]

x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_height[16:0]

x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.window_width[13:0]

@28

x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_we

@23

@22

x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.buf_din[63:0]

@8022

x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.chn_rd_buf_i.ram_512x64w_1kx32r_i.waddr[8:0]

@200

-

@800200

fpga_version.vh

+12 −1
Original line number Diff line number Diff line
@@ -35,7 +35,18 @@ 
 * contains all the components and scripts required to completely simulate it

 * with at least one of the Free Software programs.

 */

        parameter FPGA_VERSION =          32'h03930122;      // Added debug output

        parameter FPGA_VERSION =          32'h0393012d;      // debugging - working sync

//        parameter FPGA_VERSION =          32'h0393012c;      // debugging - working sync

//      parameter FPGA_VERSION =          32'h0393012b;      // debugging

//      parameter FPGA_VERSION =          32'h0393012a;      // debugging

//      parameter FPGA_VERSION =          32'h03930129;      // adding synchronization by discard packets

//      parameter FPGA_VERSION =          32'h03930128;      // output dbg_segment_stb on [7]

//      parameter FPGA_VERSION =          32'h03930127;      // output vsync_use, reduced sclk to 10MHz

//      parameter FPGA_VERSION =          32'h03930126;      // fast slew to sensor

//      parameter FPGA_VERSION =          32'h03930125;      // fast slew to sensor

//      parameter FPGA_VERSION =          32'h03930124;      // more hardware debug circuitry

//      parameter FPGA_VERSION =          32'h03930123;      // Implementing VSYNC/GPIO3 input

//      parameter FPGA_VERSION =          32'h03930122;      // Added debug output

//      parameter FPGA_VERSION =          32'h03930121;      // VOSPI setting MOSI to low, according to DS

//      parameter FPGA_VERSION =          32'h03930120;      // VOSPI

//      parameter FPGA_VERSION =          32'h03930108;      // parallel - in master branch

includes/x393_parameters.vh

+16 −5
Original line number Diff line number Diff line
@@ -559,13 +559,17 @@ 
    parameter VOSPI_OUT_EN =            10,

    parameter VOSPI_OUT_EN_BITS =        2,

    parameter VOSPI_OUT_EN_SINGL =      12,

    parameter VOSPI_RESET_CRC =         13,

    parameter VOSPI_RESET_ERR =         13,

    parameter VOSPI_SPI_CLK =           14,

    parameter VOSPI_SPI_CLK_BITS =       2,

    parameter VOSPI_GPIO =              16,

    parameter VOSPI_GPIO_BITS =          8,

    parameter VOSPI_FAKE_OUT =          24, // to keep hardware

    parameter VOSPI_MOSI =              25, // not used

    parameter VOSPI_VSYNC =             24,

    parameter VOSPI_VSYNC_BITS =         2,

    parameter VOSPI_NORESYNC =          26, // disable re-sync

    parameter VOSPI_NORESYNC_BITS =      2,

    parameter VOSPI_DBG_SRC =           28,

    parameter VOSPI_DBG_SRC_BITS =       4,

    parameter VOSPI_PACKET_WORDS =      80,

    parameter VOSPI_NO_INVALID =         1, // do not output invalid packets data

    parameter VOSPI_PACKETS_PER_LINE =   2,
@@ -616,6 +620,13 @@ 
    parameter integer PXD_DRIVE =        12,

    parameter PXD_IBUF_LOW_PWR =         "TRUE",

    parameter PXD_SLEW =                 "SLOW",



    parameter integer VOSPI_DRIVE =        16, // 12, (4,8,12,16)

    parameter         VOSPI_IBUF_LOW_PWR = "TRUE",

    parameter         VOSPI_IOSTANDARD =   "LVCMOS25",

    parameter         VOSPI_SLEW =         "FAST", // "SLOW",





`ifdef use200Mhz

    parameter real SENS_REFCLK_FREQUENCY = 300.0, // same as REFCLK_FREQUENCY

`else
@@ -1017,8 +1028,8 @@ 
        parameter CLKOUT_DIV_PCLK =           2, //480 MHz  // 4, //  240 MHz

        parameter CLKOUT_DIV_PCLK2X =         1, //9060 MHz // 2, //  480 MHz

    `else

        parameter CLKOUT_DIV_PCLK =           48, //  20 MHz

        parameter CLKOUT_DIV_PCLK2X =         24, //  40 MHz

        parameter CLKOUT_DIV_PCLK =           96, // 10MHz // 48, //  20 MHz

        parameter CLKOUT_DIV_PCLK2X =         48, // 20 MHz // 24, //  40 MHz

    `endif

    

  `else

py393/vrlg.py

+50 −26

File changed.

Preview size limit exceeded, changes collapsed.

py393/x393_export_c.py

+10 −7
Original line number Diff line number Diff line
@@ -1890,15 +1890,14 @@ class X393ExportC(object): 
        dw.append(("gpio_in",                4, 4,0,  "Input from GPIO0-GPIO3, only GPIO3 may be used as segment ready"))

        dw.append(("in_busy",                8, 1,0,  "Frame segments are waited for or received to FIFO"))

        dw.append(("out_busy",               9, 1,0,  "received frame is being transferred to video memory"))

        dw.append(("crc_err",               10, 1,0,  "At least 1 CRC error happened since reset by command bit"))

        dw.append(("fake_in",               11, 1,0,  "Just to keep hardware"))

        dw.append(("crc_err",               10, 1,0,  "At least 1 CRC error happened since reset by the command bit"))

        dw.append(("sync_err",              11, 1,0,  "At least 1 synchronization error happened since reset by the command bit"))

        dw.append(("fake_in",               12, 1,0,  "Just to keep hardware"))

        dw.append(("senspgmin",             24, 1,0,  "senspgm pin state (0 means non-FPGA SFE is present)"))

        dw.append(("busy",                  25, 1,0,  "in_busy OR out_busy"))

        dw.append(("seq_num",               26, 6,0,  "Sequence number"))

        return dw







    def _enc_status_sens_i2c(self):

        dw=[]

        dw.append(("i2c_fifo_dout",          0, 8,0,  "I2c byte read from the device through FIFO"))
@@ -2139,15 +2138,19 @@ class X393ExportC(object): 
        dw.append(("out_en",       vrlg.VOSPI_OUT_EN,           1,   0,  "Enable output sensor data to memory"))

        dw.append(("out_en_set",   vrlg.VOSPI_OUT_EN + 1,       1,   0,  "Set enable sensor data to memory"))

        dw.append(("out_single",   vrlg.VOSPI_OUT_EN_SINGL,     1,   0,  "Enable single sensor frame to memory"))

        dw.append(("reset_crc",    vrlg.VOSPI_RESET_CRC,        1,   0,  "Reset CRC error status bit"))

        dw.append(("reset_err",    vrlg.VOSPI_RESET_ERR,        1,   0,  "Reset CRC and synchronization error status bits"))

        dw.append(("spi_clk",      vrlg.VOSPI_SPI_CLK,          1,   0,  "Enable continuous SPI clock (0 - only when SPI CS is active)"))

        dw.append(("spi_clk_set",  vrlg.VOSPI_SPI_CLK + 1,      1,   0,  "When set to 1, SPI CLK enable  is set  to the 'spi_clk' field value"))

        dw.append(("gpio0",        vrlg.VOSPI_GPIO  ,  2,   0, "Output control for GPIO0: 0 - nop, 1 - set low, 2 - set high, 3 - input"))

        dw.append(("gpio1",        vrlg.VOSPI_GPIO+2,  2,   0, "Output control for GPIO1: 0 - nop, 1 - set low, 2 - set high, 3 - input"))

        dw.append(("gpio2",        vrlg.VOSPI_GPIO+4,  2,   0, "Output control for GPIO2: 0 - nop, 1 - set low, 2 - set high, 3 - input"))

        dw.append(("gpio3",        vrlg.VOSPI_GPIO+6,  2,   0, "Output control for GPIO3: 0 - nop, 1 - set low, 2 - set high, 3 - input"))

        dw.append(("fake",         vrlg.VOSPI_FAKE_OUT,         1,   0,  "Just to keep I/O ports from optimization"))

        dw.append(("mosi",         vrlg.VOSPI_MOSI,             1,   0,  "Just to keep I/O ports from optimization"))

        dw.append(("vsync_use",    vrlg.VOSPI_VSYNC,            1,   0,  "Wait for the VSYNC (GPIO3). Should be enabled via i2c"))

        dw.append(("vsync_use_set",vrlg.VOSPI_VSYNC+1,          1,   0,  "Enable vsync_use set/reset"))

        dw.append(("noresync",     vrlg.VOSPI_NORESYNC,         1,   0,  "Disable re-synchronization by discard packets"))

        dw.append(("noresync_set", vrlg.VOSPI_NORESYNC+1,       1,   0,  "Enable noresync set/reset"))

        dw.append(("dbg_src",      vrlg.VOSPI_DBG_SRC,          3,   0,  "Hardware debug source:0-running,1-vsync_rdy[0],2-vsync_rdy[1],3-discard_segment,4-in_busy,5-out_busy,6-hact,7-sof"))

        dw.append(("dbg_src_set",  vrlg.VOSPI_DBG_SRC+3,        1,   0,  "Enable write to dbg_src"))

        return dw

    

    def _enc_sensio_jtag(self):