another test data for mclt

[*]

[*] GTKWave Analyzer v3.3.78 (w)1999-2016 BSI

[*] Thu Dec 14 02:04:25 2017

[*]

[dumpfile] "/home/eyesis/nc393/elphel393/fpga-elphel/x393_branch_dct/simulation/mclt_test_01-20171213185819967.fst"

[dumpfile_mtime] "Thu Dec 14 01:58:22 2017"

[dumpfile_size] 935615

[savefile] "/home/eyesis/nc393/elphel393/fpga-elphel/x393_branch_dct/mclt_test_01.sav"

[timestart] 0

[size] 1920 1171

[pos] -1921 -1

*-21.521639 8335000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

[treeopen] mclt_test_01.

[treeopen] mclt_test_01.mclt16x16_i.

[sst_width] 446

[signals_width] 198

[sst_expanded] 1

[sst_vpaned_height] 344

@800200

-top

@28

mclt_test_01.RST

mclt_test_01.CLK

mclt_test_01.pre_busy

mclt_test_01.start

@22

mclt_test_01.x_shft[6:0]

mclt_test_01.y_shft[6:0]

mclt_test_01.bayer_r[3:0]

@28

mclt_test_01.mpixel_re

mclt_test_01.mpixel_page

@22

mclt_test_01.page_in[1:0]

mclt_test_01.mpixel_a[7:0]

mclt_test_01.mpixel_d[15:0]

@28

mclt_test_01.pre_last_in

mclt_test_01.pre_first_out

@8023

mclt_test_01.out_addr[7:0]

@28

mclt_test_01.dv

@22

mclt_test_01.dout[24:0]

@28

mclt_test_01.pre_last_out

@1000200

-top

@800200

-mclt16x16

@c00022

mclt_test_01.mclt16x16_i.in_busy[16:0]

@28

(0)mclt_test_01.mclt16x16_i.in_busy[16:0]

(1)mclt_test_01.mclt16x16_i.in_busy[16:0]

(2)mclt_test_01.mclt16x16_i.in_busy[16:0]

(3)mclt_test_01.mclt16x16_i.in_busy[16:0]

(4)mclt_test_01.mclt16x16_i.in_busy[16:0]

(5)mclt_test_01.mclt16x16_i.in_busy[16:0]

(6)mclt_test_01.mclt16x16_i.in_busy[16:0]

(7)mclt_test_01.mclt16x16_i.in_busy[16:0]

(8)mclt_test_01.mclt16x16_i.in_busy[16:0]

(9)mclt_test_01.mclt16x16_i.in_busy[16:0]

(10)mclt_test_01.mclt16x16_i.in_busy[16:0]

(11)mclt_test_01.mclt16x16_i.in_busy[16:0]

(12)mclt_test_01.mclt16x16_i.in_busy[16:0]

(13)mclt_test_01.mclt16x16_i.in_busy[16:0]

(14)mclt_test_01.mclt16x16_i.in_busy[16:0]

(15)mclt_test_01.mclt16x16_i.in_busy[16:0]

(16)mclt_test_01.mclt16x16_i.in_busy[16:0]

@1401200

-group_end

@22

mclt_test_01.mclt16x16_i.in_cntr[7:0]

@28

mclt_test_01.mclt16x16_i.pre_busy

mclt_test_01.mclt16x16_i.pre_busy_r

mclt_test_01.mclt16x16_i.pre_last_in_r

@22

mclt_test_01.mclt16x16_i.x_shft_r[6:0]

mclt_test_01.mclt16x16_i.x_shft_r2[6:0]

mclt_test_01.mclt16x16_i.y_shft_r[6:0]

mclt_test_01.mclt16x16_i.y_shft_r2[6:0]

@c00200

-fold_rom

@8022

mclt_test_01.mclt16x16_i.i_mclt_fold_rom.addr_a[9:0]

@28

mclt_test_01.mclt16x16_i.i_mclt_fold_rom.en_a

mclt_test_01.mclt16x16_i.i_mclt_fold_rom.regen_a

mclt_test_01.mclt16x16_i.i_mclt_fold_rom.we_a

@22

mclt_test_01.mclt16x16_i.i_mclt_fold_rom.data_out_a[17:0]

@200

-

@1401200

-fold_rom

@c00200

-mclt_wnd_mul

@28

mclt_test_01.mclt16x16_i.mclt_wnd_i.en

@22

mclt_test_01.mclt16x16_i.mclt_wnd_i.y_shft[6:0]

mclt_test_01.mclt16x16_i.mclt_wnd_i.x_shft[6:0]

@8022

mclt_test_01.mclt16x16_i.mclt_wnd_i.x_in[3:0]

mclt_test_01.mclt16x16_i.mclt_wnd_i.y_in[3:0]

mclt_test_01.mclt16x16_i.mclt_wnd_i.x_full[9:0]

@28

mclt_test_01.mclt16x16_i.mclt_wnd_i.x_zero

@8022

mclt_test_01.mclt16x16_i.mclt_wnd_i.y_full[9:0]

@28

mclt_test_01.mclt16x16_i.mclt_wnd_i.y_zero

mclt_test_01.mclt16x16_i.mclt_wnd_i.regen[2:0]

@c08022

mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

@28

(0)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(1)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(2)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(3)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(4)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(5)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(6)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(7)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(8)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(9)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(10)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(11)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(12)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(13)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(14)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(15)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(16)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

(17)mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_x[17:0]

@1401200

-group_end

@8022

mclt_test_01.mclt16x16_i.mclt_wnd_i.wnd_out_y[17:0]

@1401200

-mclt_wnd_mul

@c08022

mclt_test_01.mclt16x16_i.window_r[17:0]

@28

(0)mclt_test_01.mclt16x16_i.window_r[17:0]

(1)mclt_test_01.mclt16x16_i.window_r[17:0]

(2)mclt_test_01.mclt16x16_i.window_r[17:0]

(3)mclt_test_01.mclt16x16_i.window_r[17:0]

(4)mclt_test_01.mclt16x16_i.window_r[17:0]

(5)mclt_test_01.mclt16x16_i.window_r[17:0]

(6)mclt_test_01.mclt16x16_i.window_r[17:0]

(7)mclt_test_01.mclt16x16_i.window_r[17:0]

(8)mclt_test_01.mclt16x16_i.window_r[17:0]

(9)mclt_test_01.mclt16x16_i.window_r[17:0]

(10)mclt_test_01.mclt16x16_i.window_r[17:0]

(11)mclt_test_01.mclt16x16_i.window_r[17:0]

(12)mclt_test_01.mclt16x16_i.window_r[17:0]

(13)mclt_test_01.mclt16x16_i.window_r[17:0]

(14)mclt_test_01.mclt16x16_i.window_r[17:0]

(15)mclt_test_01.mclt16x16_i.window_r[17:0]

(16)mclt_test_01.mclt16x16_i.window_r[17:0]

(17)mclt_test_01.mclt16x16_i.window_r[17:0]

@1401200

-group_end

@8022

mclt_test_01.mclt16x16_i.mpixel_d_r[15:0]

@c00022

mclt_test_01.mclt16x16_i.mpix_sgn_r[3:0]

@28

(0)mclt_test_01.mclt16x16_i.mpix_sgn_r[3:0]

(1)mclt_test_01.mclt16x16_i.mpix_sgn_r[3:0]

(2)mclt_test_01.mclt16x16_i.mpix_sgn_r[3:0]

(3)mclt_test_01.mclt16x16_i.mpix_sgn_r[3:0]

@1401200

-group_end

@8420

mclt_test_01.mclt16x16_i.data_cc_r[24:0]

mclt_test_01.mclt16x16_i.data_cs_w1[24:0]

mclt_test_01.mclt16x16_i.data_cs_r[24:0]

mclt_test_01.mclt16x16_i.data_sc_r[24:0]

mclt_test_01.mclt16x16_i.data_ss_r[24:0]

mclt_test_01.mclt16x16_i.data_sc_w0[24:0]

mclt_test_01.mclt16x16_i.data_ss_w2[24:0]

@c08420

mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

@28

(0)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(1)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(2)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(3)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(4)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(5)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(6)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(7)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(8)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(9)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(10)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(11)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(12)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(13)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(14)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(15)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(16)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(17)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(18)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(19)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(20)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(21)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(22)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(23)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(24)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(25)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(26)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(27)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(28)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(29)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(30)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(31)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(32)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

(33)mclt_test_01.mclt16x16_i.pix_wnd_r[33:0]

@1401200

-group_end

@8420

mclt_test_01.mclt16x16_i.pix_wnd_r2[24:0]

@8022

mclt_test_01.mclt16x16_i.mode_mux[1:0]

@8420

mclt_test_01.mclt16x16_i.data_dtt_in[24:0]

@28

mclt_test_01.mclt16x16_i.dtt_in_page

mclt_test_01.mclt16x16_i.start_dtt

mclt_test_01.mclt16x16_i.dtt_r_page

@22

mclt_test_01.mclt16x16_i.dtt_r_data_w[35:0]

@8420

mclt_test_01.mclt16x16_i.dtt_r_data[24:0]

@c00200

-ddt_in_ram

@28

mclt_test_01.mclt16x16_i.ram18p_var_w_var_r_dtt_in_i.we

@22

mclt_test_01.mclt16x16_i.ram18p_var_w_var_r_dtt_in_i.waddr[8:0]

mclt_test_01.mclt16x16_i.ram18p_var_w_var_r_dtt_in_i.data_in[35:0]

mclt_test_01.mclt16x16_i.ram18p_var_w_var_r_dtt_in_i.raddr[8:0]

@28

mclt_test_01.mclt16x16_i.ram18p_var_w_var_r_dtt_in_i.ren

mclt_test_01.mclt16x16_i.ram18p_var_w_var_r_dtt_in_i.regen

@22

mclt_test_01.mclt16x16_i.ram18p_var_w_var_r_dtt_in_i.data_out[35:0]

@200

-

@1401200

-ddt_in_ram

@28

mclt_test_01.mclt16x16_i.dtt_r_re

@c00022

mclt_test_01.mclt16x16_i.dtt_r_cntr[7:0]

@28

(0)mclt_test_01.mclt16x16_i.dtt_r_cntr[7:0]

(1)mclt_test_01.mclt16x16_i.dtt_r_cntr[7:0]

(2)mclt_test_01.mclt16x16_i.dtt_r_cntr[7:0]

(3)mclt_test_01.mclt16x16_i.dtt_r_cntr[7:0]

(4)mclt_test_01.mclt16x16_i.dtt_r_cntr[7:0]

(5)mclt_test_01.mclt16x16_i.dtt_r_cntr[7:0]

(6)mclt_test_01.mclt16x16_i.dtt_r_cntr[7:0]

(7)mclt_test_01.mclt16x16_i.dtt_r_cntr[7:0]

@1401200

-group_end

@28

mclt_test_01.mclt16x16_i.dtt_start

@c00200

-dtt_iv_8x8

@28

mclt_test_01.mclt16x16_i.dtt_iv_8x8_ad_i.start

@22

mclt_test_01.mclt16x16_i.dtt_iv_8x8_ad_i.mode[1:0]

mclt_test_01.mclt16x16_i.dtt_iv_8x8_ad_i.xin[24:0]

@28

mclt_test_01.mclt16x16_i.dtt_iv_8x8_ad_i.out_we

@22

mclt_test_01.mclt16x16_i.dtt_iv_8x8_ad_i.out_wa[3:0]

mclt_test_01.mclt16x16_i.dtt_iv_8x8_ad_i.out_wd[24:0]

@28

mclt_test_01.mclt16x16_i.dtt_iv_8x8_ad_i.sub16

mclt_test_01.mclt16x16_i.dtt_iv_8x8_ad_i.inc16

mclt_test_01.mclt16x16_i.dtt_iv_8x8_ad_i.start_out

@1401200

-dtt_iv_8x8

@c08022

mclt_test_01.mclt16x16_i.dtt_out_ram_wa[8:0]

@28

(0)mclt_test_01.mclt16x16_i.dtt_out_ram_wa[8:0]

(1)mclt_test_01.mclt16x16_i.dtt_out_ram_wa[8:0]

(2)mclt_test_01.mclt16x16_i.dtt_out_ram_wa[8:0]

(3)mclt_test_01.mclt16x16_i.dtt_out_ram_wa[8:0]

(4)mclt_test_01.mclt16x16_i.dtt_out_ram_wa[8:0]

(5)mclt_test_01.mclt16x16_i.dtt_out_ram_wa[8:0]

(6)mclt_test_01.mclt16x16_i.dtt_out_ram_wa[8:0]

(7)mclt_test_01.mclt16x16_i.dtt_out_ram_wa[8:0]

(8)mclt_test_01.mclt16x16_i.dtt_out_ram_wa[8:0]

@1401200

-group_end

@28

mclt_test_01.mclt16x16_i.dtt_out_we

@c00022

mclt_test_01.mclt16x16_i.dtt_out_ram_cntr[4:0]

@28

(0)mclt_test_01.mclt16x16_i.dtt_out_ram_cntr[4:0]

(1)mclt_test_01.mclt16x16_i.dtt_out_ram_cntr[4:0]

(2)mclt_test_01.mclt16x16_i.dtt_out_ram_cntr[4:0]

(3)mclt_test_01.mclt16x16_i.dtt_out_ram_cntr[4:0]

(4)mclt_test_01.mclt16x16_i.dtt_out_ram_cntr[4:0]

@1401200

-group_end

@28

mclt_test_01.mclt16x16_i.dtt_mode[1:0]

mclt_test_01.mclt16x16_i.dtt_start_fill

mclt_test_01.mclt16x16_i.dtt_first_quad_out

@c08022

mclt_test_01.mclt16x16_i.dtt_dly_cntr[7:0]

@28

(0)mclt_test_01.mclt16x16_i.dtt_dly_cntr[7:0]

(1)mclt_test_01.mclt16x16_i.dtt_dly_cntr[7:0]

(2)mclt_test_01.mclt16x16_i.dtt_dly_cntr[7:0]

(3)mclt_test_01.mclt16x16_i.dtt_dly_cntr[7:0]

(4)mclt_test_01.mclt16x16_i.dtt_dly_cntr[7:0]

(5)mclt_test_01.mclt16x16_i.dtt_dly_cntr[7:0]

(6)mclt_test_01.mclt16x16_i.dtt_dly_cntr[7:0]

(7)mclt_test_01.mclt16x16_i.dtt_dly_cntr[7:0]

@1401200

-group_end

@28

mclt_test_01.mclt16x16_i.dtt_start_out

@22

mclt_test_01.mclt16x16_i.dtt_rd_cntr[8:0]

mclt_test_01.mclt16x16_i.dtt_rd_ra[8:0]

@28

mclt_test_01.mclt16x16_i.dtt_rd_regen_dv[2:0]

@22

mclt_test_01.mclt16x16_i.dtt_rd_data[24:0]

@28

mclt_test_01.mclt16x16_i.dtt_start_out

@800200

-rotator

@200

-

@1000200

-rotator

-mclt16x16

@200

-

[pattern_trace] 1

[pattern_trace] 0