Commit 4d159459 authored by Alexey Grebenkin's avatar Alexey Grebenkin
Browse files

fixed potential ADDRESS_BITS+1 bus boundary tresspassing

parent 6f36f6d1
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+1 −1
Original line number Diff line number Diff line
@@ -245,7 +245,7 @@ fifo_same_clock #( .DATA_WIDTH(ADDRESS_BITS+20),.DATA_DEPTH(4))
        .sync_rst(1'b0), // input
        .we(arvalid && arready),
        .re(start_read_burst_w),
        .data_in({arid[11:0], arburst[1:0],arsize[1:0],arlen[3:0],araddr[ADDRESS_BITS+1:2]}),
        .data_in({arid[11:0], arburst[1:0],arsize[1:0],arlen[3:0],2'b00,araddr[ADDRESS_BITS-1:2]/*,araddr[ADDRESS_BITS+1:2]*/}),
        .data_out({arid_out[11:0], arburst_out[1:0],arsize_out[1:0],arlen_out[3:0],araddr_out[ADDRESS_BITS-1:0]}), //SuppressThisWarning ISExst Assignment to arsize ignored, since the identifier is never used
        .nempty(ar_nempty),
        .half_full(ar_half_full)
+1 −1
Original line number Diff line number Diff line
@@ -204,7 +204,7 @@ fifo_same_clock #( .DATA_WIDTH(20+ADDRESS_BITS),.DATA_DEPTH(4))
        .sync_rst  (1'b0),
        .we        (awvalid && awready),
        .re        (start_write_burst_w),
        .data_in   ({awid[11:0], awburst[1:0],awsize[1:0],awlen[3:0],awaddr[ADDRESS_BITS+1:2]}),
        .data_in   ({awid[11:0], awburst[1:0],awsize[1:0],awlen[3:0],2'b00,awaddr[ADDRESS_BITS-1:2]/*,awaddr[ADDRESS_BITS-1:2]*/}),
        .data_out  ({awid_out[11:0], awburst_out[1:0],awsize_out[1:0],awlen_out[3:0],awaddr_out[ADDRESS_BITS-1:0]}),  //SuppressThisWarning ISExst Assignment to awsize_out ignored, since the identifier is never used
        .nempty    (aw_nempty),
        .half_full (aw_half_full)