Commit 36912bd3 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

implemented telemetry on/off, updated mode bits. FPGA version 0393012e

parent c4db5df9
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+2 −1
Original line number Diff line number Diff line
@@ -35,7 +35,8 @@
 * contains all the components and scripts required to completely simulate it
 * with at least one of the Free Software programs.
 */
        parameter FPGA_VERSION =          32'h0393012d;      // debugging - working sync
        parameter FPGA_VERSION =          32'h0393012e;      // re-arranged control bits, added telemetry on/off
//        parameter FPGA_VERSION =          32'h0393012d;      // debugging - working sync
//        parameter FPGA_VERSION =          32'h0393012c;      // debugging - working sync
//      parameter FPGA_VERSION =          32'h0393012b;      // debugging
//      parameter FPGA_VERSION =          32'h0393012a;      // debugging
+14 −11
Original line number Diff line number Diff line
@@ -554,22 +554,25 @@
    parameter VOSPI_MCLK_BITS =          2,
    parameter VOSPI_EN =                 6,
    parameter VOSPI_EN_BITS =            2,
    parameter VOSPI_SEGM0_OK =           8,
    parameter VOSPI_SEGM0_OK_BITS =      2,
    parameter VOSPI_OUT_EN =            10,
    parameter VOSPI_OUT_EN =             8,
    parameter VOSPI_OUT_EN_BITS =        2,
    parameter VOSPI_OUT_EN_SINGL =      12,
    parameter VOSPI_RESET_ERR =         13,
    parameter VOSPI_SPI_CLK =           14,
    parameter VOSPI_OUT_EN_SINGL =      10,
    parameter VOSPI_RESET_ERR =         11,
    parameter VOSPI_SPI_CLK =           12,
    parameter VOSPI_SPI_CLK_BITS =       2,
    parameter VOSPI_GPIO =              16,
    parameter VOSPI_GPIO_BITS =          8,
    parameter VOSPI_VSYNC =             24,
    parameter VOSPI_SEGM0_OK =          14,
    parameter VOSPI_SEGM0_OK_BITS =      2,
    parameter VOSPI_VSYNC =             16,
    parameter VOSPI_VSYNC_BITS =         2,
    parameter VOSPI_NORESYNC =          26, // disable re-sync
    parameter VOSPI_NORESYNC =          18, // disable re-sync
    parameter VOSPI_NORESYNC_BITS =      2,
    parameter VOSPI_DBG_SRC =           28,
    parameter VOSPI_TELEMETRY =         20,
    parameter VOSPI_TELEMETRY_BITS =     2,
    parameter VOSPI_GPIO =              22,
    parameter VOSPI_GPIO_BITS =          6,
    parameter VOSPI_DBG_SRC =           28, // source of the debug output
    parameter VOSPI_DBG_SRC_BITS =       4,

    parameter VOSPI_PACKET_WORDS =      80,
    parameter VOSPI_NO_INVALID =         1, // do not output invalid packets data
    parameter VOSPI_PACKETS_PER_LINE =   2,
+7 −1
Original line number Diff line number Diff line
@@ -122,6 +122,7 @@ def restore_default(vname=None):
SS_EN__RAW = str
CLKIN_PERIOD_PCLK = int
SENSI2C_STATUS_REG_REL__TYPE = str
VOSPI_TELEMETRY__TYPE = str
SENSI2C_CMD_RUN_PBITS__RAW = str
XOR_HIST_BAYER__TYPE = str
HIST_SAXI_AWCACHE__RAW = str
@@ -331,6 +332,7 @@ SENS_JTAG_PGMEN__RAW = str
MCONTR_LINTILE_EXTRAPG_BITS__TYPE = str
MCONTR_BUF3_RD_ADDR__TYPE = str
LOGGER_CONF_EN_BITS__TYPE = str
VOSPI_TELEMETRY_BITS__TYPE = str
CLKIN_PERIOD_PCLK__RAW = str
HISPI_DQS_BIAS__TYPE = str
MULTICLK_DIV_DLYREF__TYPE = str
@@ -441,6 +443,7 @@ LOGGER_CONF_MSG_BITS__TYPE = str
LOGGER_ADDR = int
MCONTR_PHY_0BIT_DCI_RST__RAW = str
REFCLK_FREQUENCY__RAW = str
VOSPI_TELEMETRY_BITS__RAW = str
LOGGER_BIT_HALF_PERIOD__RAW = str
MCNTRL_TEST01_STATUS_REG_CHN3_ADDR__TYPE = str
DLY_DQ_ODELAY__TYPE = str
@@ -532,6 +535,7 @@ MCNTRL_SCANLINE_STATUS_REG_CHN3_ADDR = int
MCNTRL_SCANLINE_WINDOW_WH = int
WBUF_DLY_WLV__RAW = str
SIMULATE_CMPRS_CMODE3__RAW = str
VOSPI_TELEMETRY__RAW = str
TABLE_HUFFMAN_INDEX = int
VOSPI_HACT_TO_HACT_EOF__RAW = str
MCNTRL_TILED_FRAME_LAST = int
@@ -1005,6 +1009,7 @@ MULTICLK_BUF_AXIHP = str
FRAME_WIDTH_BITS = int
READ_PATTERN_OFFSET__TYPE = str
SENS_CTRL_RST_MMCM = int
VOSPI_TELEMETRY_BITS = int
VOSPI_PACKET_LAST = int
MCONTR_CMD_WR_ADDR = int
SENSI2C_TBL_DLY_BITS__RAW = str
@@ -1486,6 +1491,7 @@ TILE_HEIGHT__RAW = str
SCANLINE_STARTY = int
SCANLINE_STARTX = int
SIMULATE_CMPRS_CMODE1__RAW = str
GPIO_DRIVE__TYPE = str
FFCLK0_DIFF_TERM__TYPE = str
HISPI_UNTUNED_SPLIT__TYPE = str
LD_DLY_CMDA__TYPE = str
@@ -2420,7 +2426,7 @@ DFLT_CHN_EN__RAW = str
NUM_CYCLES_LOW_BIT = int
READ_BLOCK_OFFSET = int
RSEL__RAW = str
GPIO_DRIVE__TYPE = str
VOSPI_TELEMETRY = int
LWIR_FRAME_DELAY__RAW = str
VOSPI_SEGM0_OK_BITS__TYPE = str
SDCLK_PHASE__TYPE = str
+11 −7
Original line number Diff line number Diff line
@@ -2133,23 +2133,27 @@ class X393ExportC(object):
        dw.append(("mclk",         vrlg.VOSPI_MCLK,             1,   0,  "Enable master clock (25MHz) to sensor"))
        dw.append(("mclk_set",     vrlg.VOSPI_MCLK + 1,         1,   0,  "When set to 1, MCLK enable  is set  to the 'mclk' field value"))
        dw.append(("spi_en",       vrlg.VOSPI_EN,               2,   0,  "SPI reset/enable: 0 - NOP, 1 - reset+disable, 2 - noreset, disable, 3 - noreset, enable"))
        dw.append(("segm_zero",    vrlg.VOSPI_SEGM0_OK,         1,   0,  "OK to input segment 0 (invalid, valid are 1,2,3,4)"))
        dw.append(("segm_zero_set",vrlg.VOSPI_SEGM0_OK + 1,     1,   0,  "Enable setting of segm_zero"))
        dw.append(("out_en",       vrlg.VOSPI_OUT_EN,           1,   0,  "Enable output sensor data to memory"))
        dw.append(("out_en_set",   vrlg.VOSPI_OUT_EN + 1,       1,   0,  "Set enable sensor data to memory"))
        dw.append(("out_single",   vrlg.VOSPI_OUT_EN_SINGL,     1,   0,  "Enable single sensor frame to memory"))
        dw.append(("reset_err",    vrlg.VOSPI_RESET_ERR,        1,   0,  "Reset CRC and synchronization error status bits"))
        dw.append(("spi_clk",      vrlg.VOSPI_SPI_CLK,          1,   0,  "Enable continuous SPI clock (0 - only when SPI CS is active)"))
        dw.append(("spi_clk_set",  vrlg.VOSPI_SPI_CLK + 1,      1,   0,  "When set to 1, SPI CLK enable  is set  to the 'spi_clk' field value"))
        dw.append(("gpio0",        vrlg.VOSPI_GPIO  ,  2,   0, "Output control for GPIO0: 0 - nop, 1 - set low, 2 - set high, 3 - input"))
        dw.append(("gpio1",        vrlg.VOSPI_GPIO+2,  2,   0, "Output control for GPIO1: 0 - nop, 1 - set low, 2 - set high, 3 - input"))
        dw.append(("gpio2",        vrlg.VOSPI_GPIO+4,  2,   0, "Output control for GPIO2: 0 - nop, 1 - set low, 2 - set high, 3 - input"))
        dw.append(("gpio3",        vrlg.VOSPI_GPIO+6,  2,   0, "Output control for GPIO3: 0 - nop, 1 - set low, 2 - set high, 3 - input"))
        dw.append(("segm_zero",    vrlg.VOSPI_SEGM0_OK,         1,   0,  "OK to input segment 0 (invalid, valid are 1,2,3,4)"))
        dw.append(("segm_zero_set",vrlg.VOSPI_SEGM0_OK + 1,     1,   0,  "Enable setting of segm_zero"))
        dw.append(("vsync_use",    vrlg.VOSPI_VSYNC,            1,   0,  "Wait for the VSYNC (GPIO3). Should be enabled via i2c"))
        dw.append(("vsync_use_set",vrlg.VOSPI_VSYNC+1,          1,   0,  "Enable vsync_use set/reset"))
        dw.append(("noresync",     vrlg.VOSPI_NORESYNC,         1,   0,  "Disable re-synchronization by discard packets"))
        dw.append(("noresync_set", vrlg.VOSPI_NORESYNC+1,       1,   0,  "Enable noresync set/reset"))
        dw.append(("dbg_src",      vrlg.VOSPI_DBG_SRC,          3,   0,  "Hardware debug source:0-running,1-vsync_rdy[0],2-vsync_rdy[1],3-discard_segment,4-in_busy,5-out_busy,6-hact,7-sof"))
        dw.append(("telemetry",    vrlg.VOSPI_TELEMETRY,        1,   0,  "Receive telemetry (will hang if not enabled in Lepton)"))
        dw.append(("telemetry_set",vrlg.VOSPI_TELEMETRY+1, 1,   0,  "Enable telemetry set/reset"))

        dw.append(("gpio0",        vrlg.VOSPI_GPIO  ,  2,   0, "Output control for GPIO0: 0 - nop, 1 - set low, 2 - set high, 3 - input"))
        dw.append(("gpio1",        vrlg.VOSPI_GPIO+2,  2,   0, "Output control for GPIO1: 0 - nop, 1 - set low, 2 - set high, 3 - input"))
        dw.append(("gpio2",        vrlg.VOSPI_GPIO+4,  2,   0, "Output control for GPIO2: 0 - nop, 1 - set low, 2 - set high, 3 - input"))
#       dw.append(("gpio3",        vrlg.VOSPI_GPIO+6,  2,   0, "Output control for GPIO3: 0 - nop, 1 - set low, 2 - set high, 3 - input"))
        
        dw.append(("dbg_src",      vrlg.VOSPI_DBG_SRC,          3,   0,  " Hardware debug source:0-running,1-will_sync,2-vsync_rdy[1],3-discard_segment,4-in_busy,5-out_busy,6-hact,7-sof"))
        dw.append(("dbg_src_set",  vrlg.VOSPI_DBG_SRC+3,        1,   0,  "Enable write to dbg_src"))
        return dw
    
+18 −9
Original line number Diff line number Diff line
@@ -466,9 +466,11 @@ class X393Sensor(object):
                                 gpio0 =      None, 
                                 gpio1 =      None, 
                                 gpio2 =      None, 
                                 gpio3 =      None, 
#                                 gpio3 =      None,
                                 telemetry =  None, 
                                 vsync_use =  None,
                                 noresync =   None,
                                 
                                 dbg_src =    None):
        """
        Combine sensor I/O control parameters into a control word
@@ -484,11 +486,11 @@ class X393Sensor(object):
        @param gpio0 =      Output control for GPIO0: 0 - nop, 1 - set low, 2 - set high, 3 - input
        @param gpio1 =      Output control for GPIO0: 1 - nop, 1 - set low, 2 - set high, 3 - input 
        @param gpio2 =      Output control for GPIO0: 2 - nop, 1 - set low, 2 - set high, 3 - input 
        @param gpio3 =      Output control for GPIO0: 3 - nop, 1 - set low, 2 - set high, 3 - input 
        @param telemetry =  Enable (1) /disable (0) telemetry data lines (should be set in the sensor too, or it will hang)
        @param vsync_use =  Wait for VSYNC (should be enabled over i2c) before reading each segment
        @param noresync =   Disable resynchronization by discard packets
        @param dbg_src =    source of the hardware debug output: 0 - dbg_running
                                                                 1 - vsync_rdy[0]
                                                                 1 - will_sync
                                                                 2 - vsync_rdy[1]
                                                                 3 - discard_segment
                                                                 4 - in_busy
@@ -522,8 +524,12 @@ class X393Sensor(object):
            rslt |= (gpio1 & 3) <<       (vrlg.VOSPI_GPIO + 2)
        if not gpio2 is None:
            rslt |= (gpio2 & 3) <<       (vrlg.VOSPI_GPIO + 4)
        if not gpio3 is None:
            rslt |= (gpio3 & 3) <<       (vrlg.VOSPI_GPIO + 6)
            
#        if not gpio3 is None:
#            rslt |= (gpio3 & 3) <<       (vrlg.VOSPI_GPIO + 6)
        if not telemetry is None:
            rslt |= (2,3)[telemetry] <<  vrlg.VOSPI_TELEMETRY
            
        if not vsync_use is None:
            rslt |= (2,3)[vsync_use] <<  vrlg.VOSPI_VSYNC
        if not noresync is None:
@@ -1074,7 +1080,8 @@ class X393Sensor(object):
                                 gpio0 =      None, 
                                 gpio1 =      None, 
                                 gpio2 =      None, 
                                 gpio3 =      None, 
#                                 gpio3 =      None,
                                 telemetry =  None, 
                                 vsync_use =  None,
                                 noresync =   None,
                                 dbg_src =    None):
@@ -1093,7 +1100,7 @@ class X393Sensor(object):
        @param gpio0 =      Output control for GPIO0: 0 - nop, 1 - set low, 2 - set high, 3 - input
        @param gpio1 =      Output control for GPIO0: 1 - nop, 1 - set low, 2 - set high, 3 - input 
        @param gpio2 =      Output control for GPIO0: 2 - nop, 1 - set low, 2 - set high, 3 - input 
        @param gpio3 =      Output control for GPIO0: 3 - nop, 1 - set low, 2 - set high, 3 - input 
        @param telemetry =  Enable (1) /disable (0) telemetry data lines (should be set in the sensor too, or it will hang)
        @param vsync_use =  Wait for VSYNC (should be enabled over i2c) before reading each segment
        @param noresync =   Disable resynchronization by discard packets
        @param dbg_src =    source of the hardware debug output: 0 - dbg_running
@@ -1121,7 +1128,8 @@ class X393Sensor(object):
                           gpio0 =      gpio0, 
                           gpio1 =      gpio1, 
                           gpio2 =      gpio2, 
                           gpio3 =      gpio3, 
#                           gpio3 =      gpio3, 
                           telemetry =  telemetry, 
                           vsync_use =  vsync_use,
                           noresync =   noresync,
                           dbg_src =    dbg_src)
@@ -1141,7 +1149,8 @@ class X393Sensor(object):
                           gpio0 =      gpio0, 
                           gpio1 =      gpio1, 
                           gpio2 =      gpio2, 
                           gpio3 =      gpio3, 
#                           gpio3 =      gpio3, 
                           telemetry =  telemetry, 
                           vsync_use =  vsync_use,
                           noresync =   noresync,
                           dbg_src =    dbg_src)
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