Commit 34d56fe4 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

Masked external timestamps

parent b5150aa2

fpga_version.vh

+2 −1
Original line number Diff line number Diff line
@@ -35,7 +35,8 @@ 
 * contains all the components and scripts required to completely simulate it

 * with at least one of the Free Software programs.

 */

        parameter FPGA_VERSION =          32'h039300be;      //parallel - adding odd/even pixels shift -0.066/12, 80.26%

        parameter FPGA_VERSION =          32'h039300bf;      //parallel - mask extrenal timestamps mode -0.043/17 79.56%

//        parameter FPGA_VERSION =          32'h039300be;      //parallel - adding odd/even pixels shift -0.066/12, 80.26%

//      parameter FPGA_VERSION =          32'h039300bd;      //hispi,  trying the same -0.173/36, 80.95%

//      parameter FPGA_VERSION =          32'h039300bc;      //parallel, 100kHz min i2c speed -0.076/8, 79.69%

//      parameter FPGA_VERSION =          32'h039300bb;      //parallel, adding i2c almost full. -0.101/8, 79.37%

timing/camsync393.v

+14 −10
Original line number Diff line number Diff line
@@ -167,7 +167,8 @@ module camsync393 #( 
    wire          en_pclk;

    wire          eprst = prst || !en_pclk;

    reg           ts_snd_en;   // enable sending timestamp over sync line

    reg           ts_external; // 1 - use external timestamp, if available. 0 - always use local ts

    reg           ts_external;   // Combined bit  1 - use external timestamp, if available. 0 - always use local ts

    reg           ts_external_m; // 1 - use external timestamp, if available. 0 - always use local ts (mode bit)

    reg           triggered_mode_r;



    reg    [31:0] ts_snd_sec;  // [31:0] timestamp seconds to be sent over the sync line - multiplexed from master channel
@@ -379,7 +380,7 @@ module camsync393 #( 
        if (set_mode_reg_w) begin

            if (cmd_data[CAMSYNC_EN_BIT])        en <=               cmd_data[CAMSYNC_EN_BIT - 1];

            if (cmd_data[CAMSYNC_SNDEN_BIT])     ts_snd_en <=        cmd_data[CAMSYNC_SNDEN_BIT - 1];

            if (cmd_data[CAMSYNC_EXTERNAL_BIT])  ts_external <= cmd_data[CAMSYNC_EXTERNAL_BIT - 1];

            if (cmd_data[CAMSYNC_EXTERNAL_BIT])  ts_external_m <=    cmd_data[CAMSYNC_EXTERNAL_BIT - 1];

            if (cmd_data[CAMSYNC_TRIGGERED_BIT]) triggered_mode_r <= cmd_data[CAMSYNC_TRIGGERED_BIT - 1];

            if (cmd_data[CAMSYNC_MASTER_BIT])    master_chn <=       cmd_data[CAMSYNC_MASTER_BIT - 1 -: 2];

//            if (cmd_data[CAMSYNC_CHN_EN_BIT])    chn_en <= cmd_data[CAMSYNC_CHN_EN_BIT - 1 -: 4];
@@ -390,6 +391,9 @@ module camsync393 #( 
            if (cmd_data[CAMSYNC_CHN_EN_BIT-0])    chn_en[3] <=      cmd_data[CAMSYNC_CHN_EN_BIT - 4];

            

        end

        // Do not try to use external timestamp in free run or internally triggered mode

        ts_external <= ts_external_m && !input_use_intern && triggered_mode_r;

         

        if (mrst) input_use <= 0;

        if (!en) begin

            input_use <= 0;

x393_parallel.bit

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