Commit 2ac46e21 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

implemented read leveling, eye measurement for DDR3 on random data

parent f6b8d427

.project

+14 −14
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@@ -62,72 +62,72 @@ 
		<link>

			<name>vivado_logs/VivadoBitstream.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoBitstream-20140611121113006.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoBitstream-20140611174132808.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoOpt.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoOpt-20140611121113006.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoOpt-20140611174132808.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoOptPhys.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoOptPhys-20140611121113006.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoOptPhys-20140611174132808.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoOptPower.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoOptPower-20140611121113006.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoOptPower-20140611174132808.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoPlace.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoPlace-20140611121113006.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoPlace-20140611174132808.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoRoute.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoRoute-20140611121113006.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoRoute-20140611174132808.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoSynthesis.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoSynthesis-20140611121031786.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoSynthesis-20140611174056482.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoTimimgSummaryReportImplemented-20140611121113006.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoTimimgSummaryReportImplemented-20140611174132808.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoTimimgSummaryReportSynthesis-20140611121113006.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoTimimgSummaryReportSynthesis-20140611174132808.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoTimingReportImplemented.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoTimingReportImplemented-20140611121113006.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoTimingReportImplemented-20140611174132808.log</location>

		</link>

		<link>

			<name>vivado_logs/VivadoTimingReportSynthesis.log</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoTimingReportSynthesis-20140611121113006.log</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_logs/VivadoTimingReportSynthesis-20140611174132808.log</location>

		</link>

		<link>

			<name>vivado_state/eddr3-opt-phys.dcp</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_state/eddr3-opt-phys-20140611121113006.dcp</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_state/eddr3-opt-phys-20140611174132808.dcp</location>

		</link>

		<link>

			<name>vivado_state/eddr3-place.dcp</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_state/eddr3-place-20140611121113006.dcp</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_state/eddr3-place-20140611174132808.dcp</location>

		</link>

		<link>

			<name>vivado_state/eddr3-route.dcp</name>

			<type>1</type>

			<location>/data/vdt/vdt-projects/eddr3/vivado_state/eddr3-route-20140611121113006.dcp</location>

			<location>/data/vdt/vdt-projects/eddr3/vivado_state/eddr3-route-20140611174132808.dcp</location>

		</link>

		<link>

			<name>vivado_state/eddr3-synth.dcp</name>

phy/byte_lane.v

+1 −1
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ 
 *******************************************************************************/

`timescale 1ns/1ps

// minimizing total DQS in delay to match DQ (finedelay stage adds some?)

`define NOFINEDELAY_DQS 1

//`define NOFINEDELAY_DQS 1

module  byte_lane #(

    parameter IODELAY_GRP ="IODELAY_MEMORY",

    parameter IBUF_LOW_PWR ="TRUE",