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Elphel
x393
Commits
28b974c3
Commit
28b974c3
authored
Mar 25, 2016
by
Andrey Filippov
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continue on C exporting
parent
fcd19b51
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3
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3 changed files
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459 additions
and
36 deletions
+459
-36
x393_parameters.vh
includes/x393_parameters.vh
+2
-2
x393_export_c.py
py393/x393_export_c.py
+455
-33
x393_pio_sequences.py
py393/x393_pio_sequences.py
+2
-1
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includes/x393_parameters.vh
View file @
28b974c3
...
@@ -85,7 +85,7 @@
...
@@ -85,7 +85,7 @@
// 0x1030..1031 - MCONTR_EN // 0 bits, disable/enable memory controller
// 0x1030..1031 - MCONTR_EN // 0 bits, disable/enable memory controller
// 0x1032..1033 - REFRESH_EN // 0 bits, disable/enable memory refresh
// 0x1032..1033 - REFRESH_EN // 0 bits, disable/enable memory refresh
// 0x1034..1037 - reserved
// 0x1034..1037 - reserved
parameter MCONTR_TOP_0BIT_MCONTR_EN = 'h0, //
set pre-programmed delays
parameter MCONTR_TOP_0BIT_MCONTR_EN = 'h0, //
disable/enable memory controller
parameter MCONTR_TOP_0BIT_REFRESH_EN = 'h2, // disable/enable command/address outputs
parameter MCONTR_TOP_0BIT_REFRESH_EN = 'h2, // disable/enable command/address outputs
//0x1040..107f - 16-bit data
//0x1040..107f - 16-bit data
// 0x1040..104f - RUN_CHN // address to set sequncer channel and run (4 LSB-s - channel) - bits?
// 0x1040..104f - RUN_CHN // address to set sequncer channel and run (4 LSB-s - channel) - bits?
...
@@ -434,7 +434,7 @@
...
@@ -434,7 +434,7 @@
parameter SENS_LENS_FAT0_OUT_MASK = 'hff,
parameter SENS_LENS_FAT0_OUT_MASK = 'hff,
parameter SENS_LENS_POST_SCALE = 'h6a, // 01101010
parameter SENS_LENS_POST_SCALE = 'h6a, // 01101010
parameter SENS_LENS_POST_SCALE_MASK = 'hff,
parameter SENS_LENS_POST_SCALE_MASK = 'hff,
parameter SENSIO_RADDR = 8, //'h408 .. 'h40f
parameter SENSIO_RADDR = 8, //'h408 .. 'h40f
parameter SENSIO_ADDR_MASK = 'h7f8,
parameter SENSIO_ADDR_MASK = 'h7f8,
// sens_parallel12 registers
// sens_parallel12 registers
...
...
py393/x393_export_c.py
View file @
28b974c3
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py393/x393_pio_sequences.py
View file @
28b974c3
...
@@ -822,7 +822,8 @@ class X393PIOSequences(object):
...
@@ -822,7 +822,8 @@ class X393PIOSequences(object):
self
.
x393_axi_tasks
.
write_control_register
(
vrlg
.
MCONTR_TOP_16BIT_ADDR
+
vrlg
.
MCONTR_TOP_16BIT_REFRESH_PERIOD
,
t_refi
)
self
.
x393_axi_tasks
.
write_control_register
(
vrlg
.
MCONTR_TOP_16BIT_ADDR
+
vrlg
.
MCONTR_TOP_16BIT_REFRESH_PERIOD
,
t_refi
)
# enable refresh - should it be done here?
# enable refresh - should it be done here?
if
en_refresh
:
if
en_refresh
:
self
.
x393_axi_tasks
.
write_control_register
(
vrlg
.
MCONTR_PHY_0BIT_ADDR
+
vrlg
.
MCONTR_TOP_0BIT_REFRESH_EN
+
1
,
0
)
# self.x393_axi_tasks.write_control_register(vrlg.MCONTR_PHY_0BIT_ADDR + vrlg.MCONTR_TOP_0BIT_REFRESH_EN + 1, 0)
self
.
x393_axi_tasks
.
write_control_register
(
vrlg
.
MCONTR_TOP_0BIT_ADDR
+
vrlg
.
MCONTR_TOP_0BIT_REFRESH_EN
+
1
,
0
)
def
set_mrs
(
self
,
# will also calibrate ZQ
def
set_mrs
(
self
,
# will also calibrate ZQ
...
...
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