Commit 26dad413 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

merged with framepars, bitstream version 0x039300d2 - fixed false trigger on... 

merged with framepars, bitstream version 0x039300d2 - fixed false trigger on input configuration change
parents 77112904 7968e5d3

cocotb/x393_cocotb_03.sav

+75 −25
Original line number Diff line number Diff line 
[*]

[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI

[*] Thu Nov 17 03:52:16 2016

[*] Tue Nov 22 04:53:52 2016

[*]

[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20161116200800621.fst"

[dumpfile_mtime] "Thu Nov 17 03:40:28 2016"

[dumpfile_size] 230939121

[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20161121203439871.fst"

[dumpfile_mtime] "Tue Nov 22 04:52:55 2016"

[dumpfile_size] 442146667

[savefile] "/home/eyesis/git/x393-neon/cocotb/x393_cocotb_03.sav"

[timestart] 0

[size] 1814 1171

[pos] 0 0

*-25.389460 68867388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

*-26.832495 36980000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

[treeopen] x393_dut.

[treeopen] x393_dut.simul_sensor12bits_2_i.

[treeopen] x393_dut.simul_sensor12bits_3_i.
@@ -71,7 +71,7 @@ 
[treeopen] x393_dut.x393_i.timing393_i.camsync393_i.

[treeopen] x393_dut.x393_i.timing393_i.camsync393_i.i_frsync_pclk0.

[sst_width] 388

[signals_width] 276

[signals_width] 349

[sst_expanded] 1

[sst_vpaned_height] 486

@820
@@ -575,7 +575,6 @@ x393_dut.x393_i.timing393_i.camsync393_i.set_trig_src_w 
x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition

x393_dut.x393_i.timing393_i.camsync393_i.set_period

x393_dut.x393_i.timing393_i.camsync393_i.set_trig_dst_w

x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition_d

x393_dut.x393_i.timing393_i.camsync393_i.pre_input_use_intern

x393_dut.x393_i.timing393_i.camsync393_i.input_use_intern

x393_dut.x393_i.timing393_i.camsync393_i.master_got_pclk
@@ -1225,7 +1224,6 @@ x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition_filtered 
@22

x393_dut.x393_i.timing393_i.camsync393_i.trigger_filter_cntr[6:0]

@28

x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition_d

x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition

@1001200

-group_end
@@ -2565,9 +2563,9 @@ x393_dut.IMU_SDA 
x393_dut.IMU_TAPS[5:1]

@1401200

-IMU_

@c00200

@800200

-camsync_ext_int

@800022

@c00022

x393_dut.x393_i.timing393_i.camsync393_i.gpio_in[9:0]

@28

(0)x393_dut.x393_i.timing393_i.camsync393_i.gpio_in[9:0]
@@ -2580,7 +2578,7 @@ x393_dut.x393_i.timing393_i.camsync393_i.gpio_in[9:0] 
(7)x393_dut.x393_i.timing393_i.camsync393_i.gpio_in[9:0]

(8)x393_dut.x393_i.timing393_i.camsync393_i.gpio_in[9:0]

(9)x393_dut.x393_i.timing393_i.camsync393_i.gpio_in[9:0]

@1001200

@1401200

-group_end

@c00022

x393_dut.x393_i.timing393_i.frame_sync[3:0]
@@ -2597,6 +2595,7 @@ x393_dut.x393_i.timing393_i.camsync393_i.cmd_a[2:0] 
x393_dut.x393_i.timing393_i.camsync393_i.cmd_we

x393_dut.x393_i.timing393_i.camsync393_i.set_trig_dst_w

x393_dut.x393_i.timing393_i.camsync393_i.en

x393_dut.x393_i.timing393_i.camsync393_i.en_pclk

x393_dut.x393_i.timing393_i.camsync393_i.pclk

@8022

x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]
@@ -2605,7 +2604,10 @@ x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr_run[1:0] 
@28

(0)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr_run[1:0]

(1)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr_run[1:0]

x393_dut.x393_i.timing393_i.camsync393_i.start0

x393_dut.x393_i.timing393_i.camsync393_i.start_d

x393_dut.x393_i.timing393_i.camsync393_i.start_en

x393_dut.x393_i.timing393_i.camsync393_i.rep_en

@800028

x393_dut.x393_i.timing393_i.camsync393_i.start_pclk[2:0]

@28
@@ -2619,7 +2621,6 @@ x393_dut.x393_i.timing393_i.camsync393_i.gpio_out_en_r[9:0] 
x393_dut.x393_i.timing393_i.camsync393_i.ext_int_mode_mclk

x393_dut.x393_i.timing393_i.camsync393_i.ext_int_mode_pclk

x393_dut.x393_i.timing393_i.camsync393_i.ext_int_trigger_condition

x393_dut.x393_i.timing393_i.camsync393_i.ext_int_trigger_condition_d

@22

x393_dut.x393_i.timing393_i.camsync393_i.ext_int_trigger_filter_cntr[6:0]

@28
@@ -2630,10 +2631,8 @@ x393_dut.x393_i.timing393_i.camsync393_i.ext_int_arm[1:0] 
@28

(0)x393_dut.x393_i.timing393_i.camsync393_i.ext_int_arm[1:0]

(1)x393_dut.x393_i.timing393_i.camsync393_i.ext_int_arm[1:0]

x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition

x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition_filtered

@22

x393_dut.x393_i.timing393_i.camsync393_i.input_pattern[9:0]

x393_dut.x393_i.timing393_i.camsync393_i.gpio_out[9:0]

@c00022

x393_dut.x393_i.timing393_i.camsync393_i.input_use[9:0]

@28
@@ -2649,11 +2648,64 @@ x393_dut.x393_i.timing393_i.camsync393_i.input_use[9:0] 
(9)x393_dut.x393_i.timing393_i.camsync393_i.input_use[9:0]

@1401200

-group_end

@22

x393_dut.x393_i.timing393_i.camsync393_i.input_pattern[9:0]

@28

x393_dut.x393_i.timing393_i.camsync393_i.input_use_intern

@22

x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition_mask_w[9:0]

@28

x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition

x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition_filtered

@29

x393_dut.x393_i.timing393_i.camsync393_i.rcv_run_or_deaf

@28

x393_dut.x393_i.timing393_i.camsync393_i.ext_int_mode_pclk

x393_dut.x393_i.timing393_i.camsync393_i.triggered_mode

@22

x393_dut.x393_i.timing393_i.camsync393_i.repeat_period[31:0]

@c00022

x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

@28

(0)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(1)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(2)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(3)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(4)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(5)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(6)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(7)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(8)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(9)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(10)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(11)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(12)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(13)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(14)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(15)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(16)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(17)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(18)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(19)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(20)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(21)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(22)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(23)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(24)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(25)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(26)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(27)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(28)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(29)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(30)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

(31)x393_dut.x393_i.timing393_i.camsync393_i.restart_cntr[31:0]

@1401200

-group_end

@1001200

-group_end

-group_end

-group_end

@1401200

@1000200

-camsync_ext_int

@800200

-sequencers_0
@@ -2758,8 +2810,9 @@ x393_dut.x393_i.sof_out_mclk[3:0] 
(3)x393_dut.x393_i.sof_out_mclk[3:0]

@1401200

-group_end

@800200

@c00200

-jpeg3

@800200

-memsensor3

@22

x393_dut.x393_i.mcntrl393_i.sens_comp_block[2].mcntrl_linear_wr_sensor_i.window_height[16:0]
@@ -2863,7 +2916,7 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.huffman_stuf 
x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.huffman_stuffer_meta_i.bit_stuffer_27_32_i.flush_in

x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.flush_hclk

x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.irq

@23

@22

x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.frame_num_compressed[3:0]

@c00200

-bit_stuffer_27_32
@@ -2903,9 +2956,8 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.huffman_stuf 
-

@1401200

-bit_stuffer_27_32

@1000200

-jpeg3

@800200

@c00200

-jpeg2

@28

x393_dut.x393_i.mcntrl393_i.sens_comp_block[2].mcntrl_tiled_rd_compressor_i.chn_en
@@ -3016,9 +3068,8 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.huffman_stuf 
-

@1401200

-bit_stuffer

@1000200

-jpeg2

@800200

@c00200

-jpeg1

@28

x393_dut.x393_i.mcntrl393_i.sens_comp_block[1].mcntrl_tiled_rd_compressor_i.chn_en
@@ -3064,9 +3115,9 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.huffman_stuf 
@28

x393_dut.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.huffman_stuffer_meta_i.stuffer_bytes[1:0]

x393_dut.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.huffman_stuffer_meta_i.stuffer_dv

@1000200

@1401200

-jpeg1

@800200

@c00200

-jpeg0

@28

x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.chn_rst
@@ -3140,7 +3191,6 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.huffman_stuf 
-

@1401200

-bit_stuffer

@1000200

-jpeg0

[pattern_trace] 1

[pattern_trace] 0

fpga_version.vh

+2 −1
Original line number Diff line number Diff line
@@ -35,7 +35,8 @@ 
 * contains all the components and scripts required to completely simulate it

 * with at least one of the Free Software programs.

 */

        parameter FPGA_VERSION =          32'h039300d1;      //parallel - removed extra debug -0.042/9 80.34%

        parameter FPGA_VERSION =          32'h039300d2;      //parallel - fixing false trigger on input condition change -0.018/21, 80.28 %

//      parameter FPGA_VERSION =          32'h039300d1;      //parallel - removed extra debug -0.042/9 80.34%

//      parameter FPGA_VERSION =          32'h039300d1;      //parallel - changing line_numbers_sync condition  -0.011/3, 80.78 %

//      parameter FPGA_VERSION =          32'h039300d0;      //parallel - more status data

//      parameter FPGA_VERSION =          32'h039300cf;      //parallel - more status data for debugging ddr3_clk_div -0.033/2, 80.94%

py393/x393_export_c.py

+12 −10
Original line number Diff line number Diff line
@@ -1022,10 +1022,10 @@ class X393ExportC(object): 
            (("X393_AFIMUX1_STATUS",                    c, vrlg.CMPRS_AFIMUX_REG_ADDR1 +             ba, ia, z3, "x393_afimux_status", "ro",          "Status of the AFI MUX 1 (including image pointer)")),

            ]



        #GPIO control

        #GPIO control - modified to use sequencer so any channel can control it

        ba = vrlg.GPIO_ADDR

        ia = 0

        c =  ""

        c =  "sens_chn"

        sdefines +=[

            (('_',)),

            (('_GPIO contol. Each of the 10 pins can be controlled by the software - individually or simultaneously or from any of the 3 masters (other FPGA modules)',)),
@@ -1034,7 +1034,7 @@ class X393ExportC(object): 
            (('_     B - reserved (not yet used) and ',)),

            (('_     C - logger (IMU, GPS, images), uses 6 pins, including separate i2c available on extension boards',)),

            (('_If several enabled ports try to contol the same bit, highest priority has port C, lowest - software controlled',)),

            (("X393_GPIO_SET_PINS",                       "", vrlg.GPIO_SET_PINS +                   ba, 0, None, "x393_gpio_set_pins", "wo",       "State of the GPIO pins and seq. number")),

            (("X393_GPIO_SET_PINS",                       c,  vrlg.GPIO_SET_PINS +                   ba, 0, z3,   "x393_gpio_set_pins", "wo",       "State of the GPIO pins and seq. number")),

            (("X393_GPIO_STATUS_CONTROL",                 "", vrlg.GPIO_SET_STATUS +                 ba, 0, None, "x393_status_ctrl", "rw",         "GPIO status control mode"))]

        

        ba = vrlg.STATUS_ADDR
@@ -1065,15 +1065,15 @@ class X393ExportC(object): 
        c =  "sens_chn"

        sdefines +=[

            (('CAMSYNC control',)),

            (("X393_CAMSYNC_MODE",                        "", vrlg.CAMSYNC_MODE +                    ba, 0, None, "x393_camsync_mode", "wo",        "CAMSYNC mode")),

            (("X393_CAMSYNC_TRIG_SRC",                    "", vrlg.CAMSYNC_TRIG_SRC +                ba, 0, None, "x393_camsync_io", "wo",          "CAMSYNC trigger source")),

            (("X393_CAMSYNC_TRIG_DST",                    "", vrlg.CAMSYNC_TRIG_DST +                ba, 0, None, "x393_camsync_io", "wo",          "CAMSYNC trigger destination")),

            (("X393_CAMSYNC_MODE",                        c, vrlg.CAMSYNC_MODE +                     ba, 0, z3,   "x393_camsync_mode", "wo",        "CAMSYNC mode")),

            (("X393_CAMSYNC_TRIG_SRC",                    c, vrlg.CAMSYNC_TRIG_SRC +                 ba, 0, z3,   "x393_camsync_io",   "wo",        "CAMSYNC trigger source")),

            (("X393_CAMSYNC_TRIG_DST",                    c, vrlg.CAMSYNC_TRIG_DST +                 ba, 0, z3,   "x393_camsync_io",   "wo",        "CAMSYNC trigger destination")),

            (('_Trigger period has special value for small (<255) values written to this register',)),

            (('_    d == 0 - disable (stop periodic mode)',)),

            (('_    d == 1 - single trigger',)),

            (('_    d == 2..255 - set output pulse / input-output serial bit duration (no start generated)',)),

            (('_    d >= 256 - repetitive trigger',)),

            (("X393_CAMSYNC_TRIG_PERIOD",                 "", vrlg.CAMSYNC_TRIG_PERIOD +             ba, 0, None, "u32*", "rw",                     "CAMSYNC trigger period")),

            (("X393_CAMSYNC_TRIG_PERIOD",                 c,  vrlg.CAMSYNC_TRIG_PERIOD +             ba, 0, z3,   "u32*", "rw",                     "CAMSYNC trigger period")),

            (("X393_CAMSYNC_TRIG_DELAY",                  c,  vrlg.CAMSYNC_TRIG_DELAY0 +             ba, 1, z3,   "u32*", "rw",                     "CAMSYNC trigger delay"))]

        

        ba = vrlg.CMDFRAMESEQ_ADDR_BASE
@@ -1245,7 +1245,8 @@ class X393ExportC(object): 
                #processing sequencer command (have "w" and var_name and var_range = 0..3

                #TODO: Add special character to rw meaning channel applicable

                channelCmd=False

                if var_name and address_inc and ('w' in rw) and var_range:

#                if var_name and address_inc and ('w' in rw) and var_range:

                if var_name and ('w' in rw) and var_range:

                    multivar = isinstance(address_inc,(list,tuple))

                    if multivar:

                        if isinstance(var_range[0],(list,tuple)) and (var_range[0][0] == 0) and (var_range[0][1] == 3):
@@ -1408,6 +1409,7 @@ class X393ExportC(object): 
                  isGenAbs = False):

#        name, var_name, address, address_inc, var_range, data_type, rw, comment = define_tuple

        name, var_name, address, address_inc, _, data_type, rw, comment = define_tuple

        use_address_inc = address_inc or isGenRel or isGenAbs # so address_inc ==0 will work for TRIG_ parameters

        multivar = isinstance(address_inc,(list,tuple)) # var_name, var_range are also lists/tuples of the same length

        stops=frmt_spcs[('declare','define')[isDefine]]

        #TODO: add optional argument range check?
@@ -1430,7 +1432,7 @@ class X393ExportC(object): 
                args += ', int '+ vn.lower()

        else:

            arg = var_name.lower()   

            if arg and address_inc:

            if arg and use_address_inc:

                args += ', int '+ arg    

        s = "void "

        s = self.str_tab_stop(s,stops[0])
@@ -1475,7 +1477,7 @@ class X393ExportC(object): 
                

            else:   

                s+='{writel(%s, mmio_ptr + '%(td)

                if address_inc:

                if use_address_inc:

                    s+='(0x%04x'%(address)

                    if multivar:

                        for vn, vi in zip (var_name, address_inc):

py393/x393_jpeg.py

+7 −3
Original line number Diff line number Diff line
@@ -2530,7 +2530,10 @@ jpeg_sim_multi 4 
./py393/test_mcntrl.py @py393/cocoargs  --simulated=localhost:7777

measure_all "*DI"

setup_all_sensors  True  None  0xf

#set_sensor_io_ctl  all None None 1 # Set ARO low - check if it is still needed?

#setup_all_sensors  True  None  0xf  False None None None None 0   1   5 # JP4

 setup_all_sensors  True  None  0xf  False None None None None 0   1   0 # JPEG



set_sensor_io_ctl  all None None 1 # Set ARO low - check if it is still needed?



#use EOF instead of SOF for i2c sequencer advance

set_sensor_i2c_command  all  False  None  None  None None None None True
@@ -2549,7 +2552,7 @@ set_logger_params_file "/home/eyesis/git/x393-neon/attic/imu_config.bin" 


reset_camsync_inout 1 # reset all outputs

set_camsync_period 31 # set bit duration

set_camsync_period  10000 # 100 usec

#set_camsync_period  10000 # 100 usec

set_camsync_delay 0  400

set_camsync_delay 1 1000

set_camsync_delay 2 2000
@@ -2562,6 +2565,7 @@ set_camsync_inout 0 7 0 


#set_camsync_mode  <en=None>  <en_snd=None>  <en_ts_external=None>  <triggered_mode=None>  <master_chn=None>  <chn_en=None> 

set_camsync_mode  1 1 1 1 0 0xf

set_camsync_period  10000 # 100 usec # and start

py393/x393_sens_cmprs.py

+3 −3
Original line number Diff line number Diff line
@@ -442,7 +442,7 @@ class X393SensCmprs(object): 
#                              frame_start_address, # calculate through num_sensor, num frames, frame size and start addr?

#                              frame_start_address_inc,

                              last_buf_frame =            1,  #  - just 2-frame buffer

                              cmode =                     vrlg.CMPRS_CBIT_CMODE_JPEG18,

                              cmode =                     0, # vrlg.CMPRS_CBIT_CMODE_JPEG18,

                              colorsat_blue =             0x120,     # 0x90 fo 1x

                              colorsat_red =              0x16c,     # 0xb6 for x1

                              clk_sel =                   1,         # 1
@@ -1141,7 +1141,7 @@ class X393SensCmprs(object): 
             

    def setup_compressor(self,

                          chn,

                          cmode =            vrlg.CMPRS_CBIT_CMODE_JPEG18,

                          cmode =            0, # vrlg.CMPRS_CBIT_CMODE_JPEG18,

                          bayer =            0,

                          qbank =            0,

                          dc_sub =           1,
@@ -1413,7 +1413,7 @@ class X393SensCmprs(object): 
                              window_top =                None, # 0, # 0? 1?

                              compressor_left_margin =    0, #0?`1? 

                              last_buf_frame =            1,  #  - just 2-frame buffer

                              cmode =                     vrlg.CMPRS_CBIT_CMODE_JPEG18,

                              cmode =                     0, # vrlg.CMPRS_CBIT_CMODE_JPEG18,

                              colorsat_blue =             0x120,     # 0x90 fo 1x

                              colorsat_red =              0x16c,     # 0xb6 for x1

                              clk_sel =                   1,         # 1