FPGA code for Elphel 393 camera, created with [VDT plugin](https://github.com/Elphel/vdt-plugin). It runs on Xilinx Zynq 7030 SoC (FPGA plus dual ARM).
[Documentation](http://docs.elphel.com/x393) is generated with Doxygen-based Doxverilog. Unfortunately this program does not yet support 'generate' Verilog operators so some important dependencies are missing, like [compressor393](http://docs.elphel.com/x393/classcompressor393.html) module has generated instances of [jp_channel](http://docs.elphel.com/x393/classjp__channel.html) that are not shown.
We believe it is still useful, you can get [descriptions](http://docs.elphel.com/x393/files.html) of the project files.
[Documentation](http://docs.elphel.com/x393) is generated with Doxygen-based Doxverilog.
Run ./INIT_PROJECT in the top directory to copy initial .project and .pydevproject files for Eclipse
