Commit 19845e09 authored by Raimundas Bastys's avatar Raimundas Bastys
Browse files

added SPI write to testbench - x393_testbench_spi.tf

parent 5d5fb1f3

simulation_modules/simul_sensor_spi.v

+2 −2
Original line number Diff line number Diff line
@@ -132,7 +132,7 @@ end else begin 
        `S_FST_WR_A0 : begin

            reg_addr[ciklu_addr] <= pin_spi_in;

            if ( ciklu_addr[2:0] == 3'b000) begin

                ciklu_addr[2:0] <= 3'b111;//6 data bit

                ciklu_addr[2:0] <= 3'b111;//7 data bit

                sfst <= `S_FST_WR_D0;

            end else

                ciklu_addr[2:0] <= ciklu_addr[2:0] - 1;
@@ -140,7 +140,7 @@ end else begin 
        `S_FST_WR_D0 : begin

            reg_wr[ciklu_addr[2:0]] <= pin_spi_in;

            if ( ciklu_addr[2:0] == 3'b000) begin

                sensor_spi_reg[reg_addr[6:0]][7:0] <= {pin_spi_in, reg_wr[6:0]};

                sensor_spi_reg[reg_addr[6:0]][7:0] <= {reg_wr[7:1], pin_spi_in};

                sfst <= `S_FST_00000;

            end else

                ciklu_addr[2:0] <= ciklu_addr[2:0] - 1;

x393_testbench_spi.tf

+21 −0
Original line number Diff line number Diff line
@@ -208,6 +208,23 @@ module x393_testbench_spi #( 
        end

    endtask



    task write_spi;

        input  [6:0] adresas;

        input  [7:0] write_data;

        begin

            addr[6:0] <= adresas [6:0];

            wr_data[7:0] <= write_data [7:0];

            wr_en <= 1'b1;

            wait (CLK);

            wait (!CLK);

            wait (CLK);

            wr_en <= 1'b0;

            wait (!CLK && spi_ready);

            wait (CLK);

            wait (!CLK);

        end

    endtask



    task all_regs_spi;

        integer i;

        reg  [6:0] adresas;
@@ -249,6 +266,10 @@ module x393_testbench_spi #( 
    RST_CLEAN = 0;

    @(posedge CLK) ;

    all_regs_spi;

    write_spi(0,8'h55);

    read_spi(0);

    $display("===================");

    $display("SPI %d reg - 0x%x =====", addr, reg_data);

    #15000;

    

    $display("normal finish testbench");