Commit 09a8d352 authored by Oleg Dzhimiev's avatar Oleg Dzhimiev
Browse files

one bitstrem name

parent ca1793eb

py393/startup14

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Original line number Diff line number Diff line
@@ -4,7 +4,6 @@ 
-l /usr/local/verilog/x393_cur_params_target.vh

-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle

-c copy /usr/local/bin/imgsrv.py /www/pages

-c bitstream_set_path /usr/local/verilog/x393_hispi.bit

-c setupSensorsPower "HISPI"

-c measure_all "*DI"

-c setup_all_sensors True None 0xf

py393/startup5

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Original line number Diff line number Diff line
@@ -4,7 +4,6 @@ 
-l /usr/local/verilog/x393_cur_params_target.vh

-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle

-c copy /usr/local/bin/imgsrv.py /www/pages

-c bitstream_set_path /usr/local/verilog/x393_parallel.bit

-c setupSensorsPower "PAR12"

-c measure_all "*DI"

-c setup_all_sensors True None 0xf