Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
X
x393
Project
Project
Details
Activity
Releases
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Commits
Open sidebar
Elphel
x393
Repository
fad107cb2ca57d575d0bdcf7091def89e6752192
Switch branch/tag
x393
x393.v
Find file
Blame
History
Permalink
creating Python program to pass Verilog parameters to Python FPGA tests
· 4c3995d6
Andrey Filippov
authored
Mar 03, 2015
4c3995d6
x393.v
89.6 KB
Edit
Web IDE
Replace x393.v
×
Attach a file by drag & drop or
click to upload
Commit message
Replace x393.v
Replace file
Cancel
A new branch will be created in your fork and a new merge request will be started.