x393_testbench01.sav 44.1 KB
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[*]
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[*] GTKWave Analyzer v3.3.64 (w)1999-2014 BSI
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[*] Wed May  6 00:35:07 2015
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[*]
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[dumpfile] "/home/andrey/git/x393/simulation/x393_testbench01-20150505182137719.lxt"
[dumpfile_mtime] "Wed May  6 00:29:43 2015"
[dumpfile_size] 496570537
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[savefile] "/home/andrey/git/x393/x393_testbench01.sav"
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[timestart] 38860800
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[size] 1823 1180
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[pos] 1919 0
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*-16.063198 39110000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
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[treeopen] x393_testbench01.
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[treeopen] x393_testbench01.ddr3_i.
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[treeopen] x393_testbench01.simul_axi_hp_wr_i.
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[treeopen] x393_testbench01.x393_i.
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[sst_width] 363
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[sst_expanded] 1
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x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.window_width[13:0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.window_x0[12:0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.window_y0[15:0]
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x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_done_d[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_grant[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_limited_by_mem_page[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_limited_by_mem_page_r[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_need[0]
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x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_num128[5:0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_num128_r[6:0]
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x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_page_rst_neg[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_page_rst_pos[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_page_rst_r[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_page_rst_rd[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_page_rst_wr[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_partial[0]
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x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_row[14:0]
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x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_start_r[2:0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_start_rd[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_start_rd_r[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_start_wr[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_start_wr_r[0]
x393_testbench01.x393_i.mcntrl393_i.mcntrl_linear_rw_chn1_i.xfer_want[0]
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-linear_rw_chn1
966
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x393_testbench01.x393_i.axibram_write_i.bvalid[0]
x393_testbench01.x393_i.axibram_write_i.bready[0]
x393_testbench01.x393_i.axibram_write_i.bresp_re[0]
x393_testbench01.x393_i.axibram_write_i.wresp_i.we[0]
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x393_testbench01.x393_i.axibram_write_i.awlen_out[3:0]
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x393_testbench01.x393_i.axibram_write_i.awvalid[0]
x393_testbench01.x393_i.axibram_write_i.awready[0]
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x393_testbench01.x393_i.axibram_write_i.aw_half_full[0]
x393_testbench01.x393_i.axibram_write_i.aw_nempty[0]
x393_testbench01.x393_i.axibram_write_i.aw_nempty_ready[0]
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x393_testbench01.x393_i.axibram_write_i.awaddr[31:0]
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x393_testbench01.x393_i.axibram_write_i.awburst[1:0]
x393_testbench01.x393_i.axibram_write_i.awburst_out[1:0]
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x393_testbench01.x393_i.axibram_write_i.awid[11:0]
x393_testbench01.x393_i.axibram_write_i.awid_out[11:0]
x393_testbench01.x393_i.axibram_write_i.awlen[3:0]
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x393_testbench01.x393_i.axibram_write_i.awsize[1:0]
x393_testbench01.x393_i.axibram_write_i.awsize_out[1:0]
x393_testbench01.x393_i.axibram_write_i.awvalid[0]
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x393_testbench01.x393_i.axibram_write_i.bid[11:0]
x393_testbench01.x393_i.axibram_write_i.bram_waddr[13:0]
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x393_testbench01.x393_i.axibram_write_i.bram_wclk[0]
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x393_testbench01.x393_i.axibram_write_i.bram_wdata[31:0]
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x393_testbench01.x393_i.axibram_write_i.bram_wen[0]
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x393_testbench01.x393_i.axibram_write_i.bram_wstb[3:0]
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x393_testbench01.x393_i.axibram_write_i.bresp[1:0]
x393_testbench01.x393_i.axibram_write_i.bresp_in[1:0]
x393_testbench01.x393_i.axibram_write_i.bresp_re[0]
x393_testbench01.x393_i.axibram_write_i.bvalid[0]
x393_testbench01.x393_i.axibram_write_i.dev_ready[0]
x393_testbench01.x393_i.axibram_write_i.dev_ready_r[0]
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x393_testbench01.x393_i.axibram_write_i.next_wr_address_w[13:0]
x393_testbench01.x393_i.axibram_write_i.pre_awaddr[13:0]
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x393_testbench01.x393_i.axibram_write_i.rst[0]
x393_testbench01.x393_i.axibram_write_i.start_burst[0]
x393_testbench01.x393_i.axibram_write_i.start_write_burst_w[0]
x393_testbench01.x393_i.axibram_write_i.w_half_full[0]
x393_testbench01.x393_i.axibram_write_i.w_nempty[0]
x393_testbench01.x393_i.axibram_write_i.w_nempty_ready[0]
x393_testbench01.x393_i.axibram_write_i.was_bresp_re[0]
x393_testbench01.x393_i.axibram_write_i.wburst[1:0]
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x393_testbench01.x393_i.axibram_write_i.wdata[31:0]
x393_testbench01.x393_i.axibram_write_i.wdata_out[31:0]
x393_testbench01.x393_i.axibram_write_i.wid[11:0]
x393_testbench01.x393_i.axibram_write_i.wid_out[11:0]
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x393_testbench01.x393_i.axibram_write_i.wready[0]
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x393_testbench01.x393_i.axibram_write_i.write_address[13:0]
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x393_testbench01.x393_i.axibram_write_i.write_in_progress[0]
x393_testbench01.x393_i.axibram_write_i.write_in_progress_w[0]
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x393_testbench01.x393_i.axibram_write_i.write_left[3:0]
x393_testbench01.x393_i.axibram_write_i.wstb[3:0]
x393_testbench01.x393_i.axibram_write_i.wstb_out[3:0]
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x393_testbench01.x393_i.axibram_write_i.wvalid[0]
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x393_testbench01.x393_i.cmd_mux_i.axi_clk[0]
x393_testbench01.x393_i.cmd_mux_i.busy[0]
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x393_testbench01.x393_i.cmd_mux_i.can_start_w[0]
x393_testbench01.x393_i.cmd_mux_i.cmdseq_full_r[0]
x393_testbench01.x393_i.cmd_mux_i.cseq_ackn[0]
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x393_testbench01.x393_i.cmd_mux_i.cseq_waddr[13:0]
x393_testbench01.x393_i.cmd_mux_i.cseq_waddr_r[13:0]
x393_testbench01.x393_i.cmd_mux_i.cseq_wdata[31:0]
x393_testbench01.x393_i.cmd_mux_i.cseq_wdata_r[31:0]
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x393_testbench01.x393_i.cmd_mux_i.cseq_wr_en[0]
x393_testbench01.x393_i.cmd_mux_i.fifo_half_empty[0]
x393_testbench01.x393_i.cmd_mux_i.fifo_nempty[0]
x393_testbench01.x393_i.cmd_mux_i.mclk[0]
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x393_testbench01.x393_i.cmd_mux_i.par_ad[47:0]
x393_testbench01.x393_i.cmd_mux_i.par_data[31:0]
x393_testbench01.x393_i.cmd_mux_i.par_waddr[13:0]
x393_testbench01.x393_i.cmd_mux_i.pre_waddr[13:0]
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x393_testbench01.x393_i.cmd_mux_i.rst[0]
x393_testbench01.x393_i.cmd_mux_i.selected[0]
x393_testbench01.x393_i.cmd_mux_i.selected_w[0]
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x393_testbench01.x393_i.cmd_mux_i.seq_busy_r[4:0]
x393_testbench01.x393_i.cmd_mux_i.seq_length[3:0]
x393_testbench01.x393_i.cmd_mux_i.seq_length_rom_a[3:0]
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x393_testbench01.x393_i.cmd_mux_i.ss[0]
x393_testbench01.x393_i.cmd_mux_i.start_axi_w[0]
x393_testbench01.x393_i.cmd_mux_i.start_w[0]
x393_testbench01.x393_i.cmd_mux_i.start_wburst[0]
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x393_testbench01.x393_i.cmd_mux_i.waddr[13:0]
x393_testbench01.x393_i.cmd_mux_i.waddr_fifo_out[13:0]
x393_testbench01.x393_i.cmd_mux_i.wdata[31:0]
x393_testbench01.x393_i.cmd_mux_i.wdata_fifo_out[31:0]
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x393_testbench01.x393_i.cmd_mux_i.wr_en[0]
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x393_testbench01.x393_i.status_read_i.ad[7:0]
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x393_testbench01.x393_i.status_read_i.axi_clk[0]
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x393_testbench01.x393_i.status_read_i.axi_status_rdata[31:0]
x393_testbench01.x393_i.status_read_i.axi_status_rdata_r[31:0]
x393_testbench01.x393_i.status_read_i.axird_pre_araddr[13:0]
x393_testbench01.x393_i.status_read_i.axird_raddr[7:0]
x393_testbench01.x393_i.status_read_i.axird_rdata[31:0]
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x393_testbench01.x393_i.status_read_i.axird_regen[0]
x393_testbench01.x393_i.status_read_i.axird_ren[0]
x393_testbench01.x393_i.status_read_i.axird_selected[0]
x393_testbench01.x393_i.status_read_i.axird_start_burst[0]
x393_testbench01.x393_i.status_read_i.clk[0]
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x393_testbench01.x393_i.status_read_i.dstb[3:0]
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x393_testbench01.x393_i.status_read_i.rd[0]
x393_testbench01.x393_i.status_read_i.regen[0]
x393_testbench01.x393_i.status_read_i.rq[0]
x393_testbench01.x393_i.status_read_i.rq_r[0]
x393_testbench01.x393_i.status_read_i.rst[0]
x393_testbench01.x393_i.status_read_i.select_d[0]
x393_testbench01.x393_i.status_read_i.select_r[0]
x393_testbench01.x393_i.status_read_i.select_w[0]
x393_testbench01.x393_i.status_read_i.start[0]
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x393_testbench01.x393_i.status_read_i.waddr[7:0]
x393_testbench01.x393_i.status_read_i.wdata[31:0]
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x393_testbench01.x393_i.status_read_i.we[0]
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x393_testbench01.x393_i.cmd_readback_i.ad_stb[0]
x393_testbench01.x393_i.cmd_readback_i.axi_clk[0]
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x393_testbench01.x393_i.cmd_readback_i.axi_rback_rdata[31:0]
x393_testbench01.x393_i.cmd_readback_i.axi_rback_rdata_r[31:0]
x393_testbench01.x393_i.cmd_readback_i.axird_pre_araddr[13:0]
x393_testbench01.x393_i.cmd_readback_i.axird_raddr[9:0]
x393_testbench01.x393_i.cmd_readback_i.axird_rdata[31:0]
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x393_testbench01.x393_i.cmd_readback_i.axird_regen[0]
x393_testbench01.x393_i.cmd_readback_i.axird_ren[0]
x393_testbench01.x393_i.cmd_readback_i.axird_selected[0]
x393_testbench01.x393_i.cmd_readback_i.axird_start_burst[0]
x393_testbench01.x393_i.cmd_readback_i.mclk[0]
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x393_testbench01.x393_i.cmd_readback_i.par_data[31:0]
x393_testbench01.x393_i.cmd_readback_i.par_waddr[13:0]
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x393_testbench01.x393_i.cmd_readback_i.rd[0]
x393_testbench01.x393_i.cmd_readback_i.regen[0]
x393_testbench01.x393_i.cmd_readback_i.rst[0]
x393_testbench01.x393_i.cmd_readback_i.select_d[0]
x393_testbench01.x393_i.cmd_readback_i.select_r[0]
x393_testbench01.x393_i.cmd_readback_i.select_w[0]
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x393_testbench01.x393_i.cmd_readback_i.waddr[9:0]
x393_testbench01.x393_i.cmd_readback_i.wdata[31:0]
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x393_testbench01.x393_i.cmd_readback_i.we[0]
x393_testbench01.x393_i.cmd_readback_i.we_w[0]
@1401200
-readback
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