eddr3=====ddr3 subproject for Elphel 393 cameraThis subproject is started to create a DDR3 memory controller for Elphel camera that does not depend on any non-documentedfeatures of Xilinx Zynq and can be simulated by Free Software tools (Icarus Verilog + GTKWave) without use of any encryptedmodules. Everything in plain Verilog and constraints.
