x359_map.mrp 205 KB
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Release 10.1.03 Map K.39 (lin)
Xilinx Mapping Report File for Design 'x359'

Design Information
------------------
Command Line   : map -ise /home/andrey/cvs_sync/elphel353-8.0.6.4/elphel353/fpga/x359/x359.ise -intstyle ise -p
xc3s1200e-ft256-4 -timing -logic_opt on -ol high -xe n -t 1 -register_duplication -cm speed -detail
-ignore_keep_hierarchy -pr b -k 5 -power off -o x359_map.ncd x359.ngd x359.pcf 
Target Device  : xc3s1200e
Target Package : ft256
Target Speed   : -4
Mapper Version : spartan3e -- $Revision: 1.28 $
Mapped Date    : Tue Jan 17 14:07:30 2012

Design Summary
--------------
Number of errors:      0
Number of warnings:   83
Logic Utilization:
  Number of Slice Flip Flops:         3,291 out of  17,344   18%
  Number of 4 input LUTs:             2,785 out of  17,344   16%
Logic Distribution:
  Number of occupied Slices:          3,262 out of   8,672   37%
    Number of Slices containing only related logic:   3,262 out of   3,262 100%
    Number of Slices containing unrelated logic:          0 out of   3,262   0%
      *See NOTES below for an explanation of the effects of unrelated logic.
  Total Number of 4 input LUTs:       3,728 out of  17,344   21%
    Number used as logic:             2,694
    Number used as a route-thru:        943
    Number used for Dual Port RAMs:      84
      (Two LUTs used per Dual Port RAM)
    Number used as Shift registers:       7
  Number of bonded IOBs:                134 out of     190   70%
    IOB Flip Flops:                      83
    IOB Master Pads:                      2
    IOB Slave Pads:                       2
  Number of IDDR2s used:                 21
    Number of DDR_ALIGNMENT = NONE       21
    Number of DDR_ALIGNMENT = C0          0
    Number of DDR_ALIGNMENT = C1          0
  Number of ODDR2s used:                 23
    Number of DDR_ALIGNMENT = NONE       23
    Number of DDR_ALIGNMENT = C0          0
    Number of DDR_ALIGNMENT = C1          0
  Number of RAMB16s:                     16 out of      28   57%
  Number of BUFGMUXs:                     8 out of      24   33%
  Number of DCMs:                         5 out of       8   62%

Peak Memory Usage:  302 MB
Total REAL time to MAP completion:  2 mins 1 secs 
Total CPU time to MAP completion:   1 mins 57 secs 

Table of Contents
-----------------
Section 1 - Errors
Section 2 - Warnings
Section 3 - Informational
Section 4 - Removed Logic Summary
Section 5 - Removed Logic
Section 6 - IOB Properties
Section 7 - RPMs
Section 8 - Guide Report
Section 9 - Area Group and Partition Summary
Section 10 - Modular Design Summary
Section 11 - Timing Report
Section 12 - Configuration String Information
Section 13 - Control Set Information
Section 14 - Utilization by Hierarchy

Section 1 - Errors
------------------

Section 2 - Warnings
--------------------
WARNING:LIT:243 - Logical network N1154 has no load.
WARNING:LIT:243 - Logical network N1155 has no load.
WARNING:LIT:243 - Logical network N1156 has no load.
WARNING:LIT:243 - Logical network N1157 has no load.
WARNING:LIT:243 - Logical network N1158 has no load.
WARNING:LIT:243 - Logical network N1159 has no load.
WARNING:LIT:243 - Logical network N1160 has no load.
WARNING:LIT:243 - Logical network N1161 has no load.
WARNING:LIT:243 - Logical network N1162 has no load.
WARNING:LIT:243 - Logical network N1163 has no load.
WARNING:LIT:243 - Logical network N1164 has no load.
WARNING:LIT:243 - Logical network N1165 has no load.
WARNING:LIT:243 - Logical network N1166 has no load.
WARNING:LIT:243 - Logical network N1167 has no load.
WARNING:LIT:243 - Logical network N1168 has no load.
WARNING:LIT:243 - Logical network N1169 has no load.
WARNING:LIT:243 - Logical network i_SENSPGM1/O has no load.
WARNING:LIT:243 - Logical network i_SENSPGM2/O has no load.
WARNING:LIT:243 - Logical network i_SENSPGM3/O has no load.
WARNING:LIT:243 - Logical network i_AUXSCL/O has no load.
WARNING:LIT:243 - Logical network i_scls1/O has no load.
WARNING:LIT:243 - Logical network i_scls2/O has no load.
WARNING:LIT:243 - Logical network i_scls3/O has no load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram14/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram13/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram12/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram11/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram10/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram9/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram8/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram7/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram6/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram5/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram4/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_data_vact/Mram_ram3/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_hact_vact/Mram_ram2/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp0/i_fifo_hact_vact/Mram_ram1/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram14/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram13/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram12/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram11/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram10/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram9/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram8/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram7/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram6/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram5/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram4/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_data_vact/Mram_ram3/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_hact_vact/Mram_ram1/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp2/i_fifo_hact_vact/Mram_ram2/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram14/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram13/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram12/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram11/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram10/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram9/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram8/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram7/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram6/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram5/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram4/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_data_vact/Mram_ram3/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_hact_vact/Mram_ram1/SPO has no
   load.
WARNING:LIT:243 - Logical network i_sp1/i_fifo_hact_vact/Mram_ram2/SPO has no
   load.
WARNING:LIT:243 - Logical network i_mcontr/i_mcontr_line_rd/i_dqs_re3_off/i_q/Q
   has no load.
WARNING:LIT:243 - Logical network i_mcontr/i_mcontr_line_rd/i_dqs_re3_on/i_q/Q
   has no load.
WARNING:MapLib:701 - Signal PX_BPF1 connected to top level port PX_BPF1 has been
   removed.
WARNING:MapLib:701 - Signal PX_BPF2 connected to top level port PX_BPF2 has been
   removed.
WARNING:MapLib:701 - Signal PX_BPF3 connected to top level port PX_BPF3 has been
   removed.
WARNING:LIT:176 - Clock buffer is designated to drive clock loads. BUFGMUX
   symbol "physical_group_pclk/i_pclk" (output signal=pclk) has a mix of clock
   and non-clock loads. The non-clock loads are:
   Pin PSCLK of physical_group_i_dcm_359_1/pre_clk0/i_dcm_359_1/i_dcm_sensor
   Pin PSCLK of physical_group_i_dcm_359_2/isdclk0/i_dcm_359_2/i_dcm2
   Pin PSCLK of physical_group_i_sp0/pre_pre_en_idata/i_sp0/i_dcm_sensor
   Pin PSCLK of physical_group_i_sp1/pre_pre_en_idata/i_sp1/i_dcm_sensor
   Pin PSCLK of physical_group_i_sp2/pre_pre_en_idata/i_sp2/i_dcm_sensor
WARNING:Pack:501 - The I/O component HACT has conflicting DRIVE property values.
    The symbol HACT has property value 4.  The symbol i_HACT has property value
   12.  The system will use the property value attached to symbol HACT.
WARNING:Pack:501 - The I/O component SDA0 has conflicting DRIVE property values.
    The symbol SDA0 has property value 4.  The symbol i_sdam/OBUFT has property
   value 12.  The system will use the property value attached to symbol SDA0.
WARNING:Pack:501 - The I/O component SCL0 has conflicting DRIVE property values.
    The symbol SCL0 has property value 4.  The symbol i_sclm/OBUFT has property
   value 12.  The system will use the property value attached to symbol SCL0.
WARNING:Pack:501 - The I/O component VACT has conflicting DRIVE property values.
    The symbol VACT has property value 4.  The symbol i_VACT has property value
   12.  The system will use the property value attached to symbol VACT.
WARNING:Pack:266 - The function generator i2c_do_wire<16>41 failed to merge with
   F5 multiplexer i2c_do_wire<19>105_SW1.  There is a conflict for the FXMUX. 
   The design will exhibit suboptimal timing.
WARNING:Timing:3223 - Timing constraint TS_PX_CHDL = MAXDELAY FROM TIMEGRP
   "TNM_PX" TO TIMEGRP "TG_CHDL" 8 ns ignored during timing analysis.
WARNING:Place:619 - This design is using a Side-BUFG site due to placement constraints on a BUFG, DCM, clock IOB or the
   loads of these components. It is recommended that Top and Bottom BUFG sites be used instead of Side-BUFG sites
   whenever possible because they can reach every clock region on the device. Side-BUFG sites can reach only clock
   regions on the same side of the device and also preclude the use of certain Top and Bottom BUFGs in the same clock
   region.
WARNING:Place:1019 - A clock IOB / clock component pair have been found that are not placed at an optimal clock IOB /
   clock site pair. The clock component <iaro_BUFG> is placed at site <BUFGMUX_X1Y0>. The IO component <ARO> is placed
   at site <N2>.  This will not allow the use of the fast path between the IO and the Clock buffer. This is normally an
   ERROR but the CLOCK_DEDICATED_ROUTE constraint was applied on COMP.PIN <ARO.PAD> allowing your design to continue.
   This constraint disables all clock placer rules related to the specified COMP.PIN. The use of this override is highly
   discouraged as it may lead to very poor timing results. It is recommended that this error condition be corrected in
   the design.
WARNING:Place:1019 - A clock IOB / clock component pair have been found that are not placed at an optimal clock IOB /
   clock site pair. The clock component <i_pclk> is placed at site <BUFGMUX_X1Y1>. The IO component <DCLK> is placed at
   site <E4>.  This will not allow the use of the fast path between the IO and the Clock buffer. This is normally an
   ERROR but the CLOCK_DEDICATED_ROUTE constraint was applied on COMP.PIN <DCLK.PAD> allowing your design to continue.
   This constraint disables all clock placer rules related to the specified COMP.PIN. The use of this override is highly
   discouraged as it may lead to very poor timing results. It is recommended that this error condition be corrected in
   the design.
WARNING:PhysDesignRules:1131 - Dangling pins on block:<i_dcm_359_2/i_dcm2>:<DCM_DCM>.  CLKFX is unconnected. STATUS2 can
   change values when CLKFX is unconnected and should not be monitored.
WARNING:PhysDesignRules:738 - Unexpected DCM configuration. DCM comp i_dcm_359_2/i_dcm2 has CLKOUT_PHASE_SHIFT set
   without a connection from CLKO or CLK2X to CLKFB. To achieve fine-grained phase shifting (CLKOUT_PHASE_SHIFT = FIXED
   or VARIABLE), CLKFB must be connected to either CLK0 or CLK2X.
WARNING:PhysDesignRules:739 - Unexpected DCM feedback loop. The signal i_dcm_359_2/isdclk90 on the CLKFB pin of comp
   i_dcm_359_2/i_dcm2 is not driven by an IOB or BUFGMUX therefore the phase relationship of output clocks to CLKIN
   cannot be guaranteed.

Section 3 - Informational
-------------------------
INFO:MapLib:562 - No environment variables are currently set.
INFO:LIT:244 - All of the single ended outputs in this design are using slew
   rate limited output drivers. The delay on speed critical single ended outputs
   can be dramatically reduced by designating them as fast outputs.
INFO:LIT:66 - BUFGMUX chain detected. Two or more BUFMGUXs are connected in
   series. Because non-standard routing resources must be used to connect the
   BUFGMUXs, this chain can result in: 1) skew between the clocks derived from
   outputs of different stages of this chain, and/or 2) skew between the
   resulting clock and clocks that use other BUFGMUX paths.
INFO:Pack:1716 - Initializing temperature to 85.000 Celsius. (default - Range:
   -40.000 to 100.000 Celsius)
INFO:Pack:1720 - Initializing voltage to 1.140 Volts. (default - Range: 1.140 to
   1.320 Volts)
INFO:Timing:3377 - Intersecting Constraints found and resolved.  For more
   information see the TSI report.
INFO:Pack:1650 - Map created a placed design.

Section 4 - Removed Logic Summary
---------------------------------
  35 block(s) removed
  50 block(s) optimized away
  22 signal(s) removed
1246 Block(s) redundant

Section 5 - Removed Logic
-------------------------

The trimmed logic report below shows the logic removed from your design due to
sourceless or loadless signals, and VCC or ground connections.  If the removal
of a signal or symbol results in the subsequent removal of an additional signal
or symbol, the message explaining that second removal will be indented.  This
indentation will be repeated as a chain of related logic is removed.

To quickly locate the original cause for the removal of a chain of logic, look
above the place where that logic is listed in the trimming report, then locate
the lines that are least indented (begin at the leftmost edge).

Loadless block "i_PX_BPF2" (BUF) removed.
 The signal "PX_BPF2" is loadless and has been removed.
  Loadless block "PX_BPF2" (PAD) removed.
Loadless block "i_PX_BPF3" (BUF) removed.
 The signal "PX_BPF3" is loadless and has been removed.
  Loadless block "PX_BPF3" (PAD) removed.
Loadless block "i_dcm_359_1/i_clk180" (CKBUF) removed.
 The signal "i_dcm_359_1/pre_clk180" is loadless and has been removed.
Loadless block "i_dcm_359_1/i_clk90" (CKBUF) removed.
 The signal "i_dcm_359_1/pre_clk90" is loadless and has been removed.
Loadless block "i_dcm_359_2/i_gsdclk" (CKBUF) removed.
Loadless block "i_dcm_359_2/i_xclk" (CKBUF) removed.
 The signal "i_dcm_359_2/ixclk" is loadless and has been removed.
  Loadless block "i_dcm_359_2/i_ixclk" (FF) removed.
   The signal "i_dcm_359_2/i_ixclk_not0000" is loadless and has been removed.
    Loadless block "i_dcm_359_2/i_ixclk_not00001_INV_0" (BUF) removed.
Loadless block "i_sddqs/i_dqsl/i_q0" (FF) removed.
 The signal "i_sddqs/i_dqsl/qp" is loadless and has been removed.
  Loadless block "i_sddqs/i_dqsl/i_dq/IBUF" (BUF) removed.
Loadless block "i_sddqs/i_dqsl/i_q1" (FF) removed.
Loadless block "i_sddqs/i_dqsu/i_q0" (FF) removed.
 The signal "i_sddqs/i_dqsu/qp" is loadless and has been removed.
  Loadless block "i_sddqs/i_dqsu/i_dq/IBUF" (BUF) removed.
Loadless block "i_sddqs/i_dqsu/i_q1" (FF) removed.
Loadless block "i_sddqs/i_t2" (FF) removed.
Loadless block "i_sp0/i_sync_alt_d0" (FF) removed.
Loadless block "i_sp1/i_sync_alt_d0" (FF) removed.
Loadless block "i_sp2/i_sync_alt_d0" (FF) removed.
Loadless block "i_PX_BPF1" (CKBUF) removed.
 The signal "PX_BPF1" is loadless and has been removed.
  Loadless block "PX_BPF1" (PAD) removed.
The signal "i_SENSPGM1/O" is sourceless and has been removed.
The signal "i_SENSPGM2/O" is sourceless and has been removed.
The signal "i_SENSPGM3/O" is sourceless and has been removed.
The signal "i_AUXSCL/O" is sourceless and has been removed.
The signal "i_scls1/O" is sourceless and has been removed.
The signal "i_scls2/O" is sourceless and has been removed.
The signal "i_scls3/O" is sourceless and has been removed.
The signal "i_mcontr/i_mcontr_line_rd/i_dqs_re3_off/i_q/Q" is sourceless and has
been removed.
The signal "i_mcontr/i_mcontr_line_rd/i_dqs_re3_off/i_q/CE" is sourceless and
has been removed.
The signal "i_mcontr/i_mcontr_line_rd/i_dqs_re3_off/i_q/CLKNOT" is sourceless
and has been removed.
The signal "i_mcontr/i_mcontr_line_rd/i_dqs_re3_on/i_q/Q" is sourceless and has
been removed.
The signal "i_mcontr/i_mcontr_line_rd/i_dqs_re3_on/i_q/CE" is sourceless and has
been removed.
The signal "i_mcontr/i_mcontr_line_rd/i_dqs_re3_on/i_q/CLKNOT" is sourceless and
has been removed.
Unused block "i_AUXSCL/IBUF" (BUF) removed.
Unused block "i_SENSPGM1/IBUF" (BUF) removed.
Unused block "i_SENSPGM2/IBUF" (BUF) removed.
Unused block "i_SENSPGM3/IBUF" (BUF) removed.
Unused block "i_mcontr/i_mcontr_line_rd/i_dqs_re3_off/i_q/CLKNOT" (BUF) removed.
Unused block "i_mcontr/i_mcontr_line_rd/i_dqs_re3_off/i_q/SRL16E" () removed.
Unused block "i_mcontr/i_mcontr_line_rd/i_dqs_re3_off/i_q/VCC" (ONE) removed.
Unused block "i_mcontr/i_mcontr_line_rd/i_dqs_re3_on/i_q/CLKNOT" (BUF) removed.
Unused block "i_mcontr/i_mcontr_line_rd/i_dqs_re3_on/i_q/SRL16E" () removed.
Unused block "i_mcontr/i_mcontr_line_rd/i_dqs_re3_on/i_q/VCC" (ONE) removed.
Unused block "i_scls1/IBUF" (BUF) removed.
Unused block "i_scls2/IBUF" (BUF) removed.
Unused block "i_scls3/IBUF" (BUF) removed.

Optimized Block(s):
TYPE 		BLOCK
GND 		XST_GND
VCC 		XST_VCC
GND 		i_SDDd/i_dq0/XST_GND
VCC 		i_SDDd/i_dq0/XST_VCC
GND 		i_SDDd/i_dq1/XST_GND
VCC 		i_SDDd/i_dq1/XST_VCC
GND 		i_SDDd/i_dq10/XST_GND
VCC 		i_SDDd/i_dq10/XST_VCC
GND 		i_SDDd/i_dq11/XST_GND
VCC 		i_SDDd/i_dq11/XST_VCC
GND 		i_SDDd/i_dq12/XST_GND
VCC 		i_SDDd/i_dq12/XST_VCC
GND 		i_SDDd/i_dq13/XST_GND
VCC 		i_SDDd/i_dq13/XST_VCC
GND 		i_SDDd/i_dq14/XST_GND
VCC 		i_SDDd/i_dq14/XST_VCC
GND 		i_SDDd/i_dq15/XST_GND
VCC 		i_SDDd/i_dq15/XST_VCC
GND 		i_SDDd/i_dq2/XST_GND
VCC 		i_SDDd/i_dq2/XST_VCC
GND 		i_SDDd/i_dq3/XST_GND
VCC 		i_SDDd/i_dq3/XST_VCC
GND 		i_SDDd/i_dq4/XST_GND
VCC 		i_SDDd/i_dq4/XST_VCC
GND 		i_SDDd/i_dq5/XST_GND
VCC 		i_SDDd/i_dq5/XST_VCC
GND 		i_SDDd/i_dq6/XST_GND
VCC 		i_SDDd/i_dq6/XST_VCC
GND 		i_SDDd/i_dq7/XST_GND
VCC 		i_SDDd/i_dq7/XST_VCC
GND 		i_SDDd/i_dq8/XST_GND
VCC 		i_SDDd/i_dq8/XST_VCC
GND 		i_SDDd/i_dq9/XST_GND
VCC 		i_SDDd/i_dq9/XST_VCC
GND 		i_SDLDM/i_dq/XST_GND
VCC 		i_SDLDM/i_dq/XST_VCC
GND 		i_SDUDM/i_dq/XST_GND
VCC 		i_SDUDM/i_dq/XST_VCC
MUXCY 		i_mcontr/i_channel0/Maccum_nx_cy<0>
MUXCY 		i_mcontr/i_channel1/Maccum_nx_cy<0>
MUXCY 		i_mcontr/i_channel2/Maccum_nx_cy<0>
MUXCY 		i_mcontr/i_channel3/Maccum_nx_cy<0>
MUXCY 		i_mcontr/i_channel4/Maccum_nx_cy<0>

Redundant Block(s):
TYPE 		BLOCK
LOCALBUF 		i2c_do_wire<14>47/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<12>47/LUT4_D_BUF
LOCALBUF 		i_mcontr/i_mcontr_arbiter/prechannel_8_mux00004/LUT4_D_BUF
LOCALBUF 		da_dcm_s21/LUT4_D_BUF
LOCALBUF 		da_dcm111/LUT4_D_BUF
LOCALBUF 		i_mcontr/i_mcontr_arbiter/prechannel_8_mux000011/LUT4_D_BUF
LOCALBUF 		i_mcontr/i_mcontr_arbiter/no_urgent_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<16>101/LUT3_D_BUF
LOCALBUF 		i2c_do_wire<16>151/LUT2_D_BUF
LOCALBUF 		i2c_do_wire<2>171/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<2>1121/LUT2_D_BUF
LOCALBUF 		i2c_do_wire<16>1361/LUT2_D_BUF
LOCALBUF 		i2c_do_wire<16>1341/LUT2_D_BUF
LOCALBUF 		i2c_do_wire<28>62/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<8>102/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<8>132/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<8>182/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<24>4/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<24>100/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<5>4/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<5>87/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<5>152/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<24>32/LUT2_D_BUF
LOCALBUF 		i2c_do_wire<2>151/LUT3_D_BUF
LOCALBUF 		i2c_do_wire<16>171/LUT3_D_BUF
LOCALBUF 		i2c_do_wire<6>111/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<4>111/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<2>85/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<2>136/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<2>149/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<22>4/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<20>4/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<19>4/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<17>83/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<16>70/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<17>125/LUT2_D_BUF
LOCALBUF 		i2c_do_wire<31>232/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<25>216/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<17>142/LUT2_D_BUF
LOCALBUF 		i2c_do_wire<16>1352/LUT3_D_BUF
LOCALBUF 		i2c_do_wire<17>154/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<16>311/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<24>122/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<7>142/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<31>121/LUT3_D_BUF
LOCALBUF 		i2c_do_wire<22>49/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<20>49/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<26>72/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<25>72/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<24>151_SW0/LUT3_L_BUF
LOCALBUF 		i2c_do_wire<27>79_SW1/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<27>137_SW1/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<2>141/LUT4_D_BUF
LOCALBUF 		N2431/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<29>176/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<26>36_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<25>36_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<31>56_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<16>137_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<10>152/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<7>121/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<5>211/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<2>161/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<7>181/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<31>90/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<6>10/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<4>10/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<17>20/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<16>20/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<31>29/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<21>262_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<18>262_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<26>61_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<25>61_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<20>141_SW0/LUT2_D_BUF
LOCALBUF 		i2c_do_wire<28>110_SW1/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<28>168_SW1/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<9>97_SW1/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<10>97_SW1/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<29>79_SW1/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<29>137_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<1>85_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<1>156_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<0>85_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<0>156_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<7>16_SW0/LUT3_L_BUF
LOCALBUF 		i2c_do_wire<2>41/LUT4_D_BUF
LOCALBUF 		N1391/LUT3_D_BUF
LOCALBUF 		i2c_do_wire<9>122/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<10>122/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<19>105_SW2/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<30>178_SW0_SW0/LUT3_L_BUF
LOCALBUF 		i2c_do_wire<26>237_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<17>89_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<30>146_SW1/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<25>113_SW0/LUT3_L_BUF
LOCALBUF 		i2c_do_wire<26>205_SW1/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<23>99_SW0/LUT3_L_BUF
LOCALBUF 		i2c_do_wire<19>133_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<22>133_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<20>133_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<1>10_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<0>10_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<27>202/LUT4_L_BUF
LOCALBUF 		da_dcm121/LUT4_D_BUF
LOCALBUF 		da_dcm21/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<22>105_SW11/LUT3_L_BUF
LOCALBUF 		i2c_do_wire<20>105_SW11/LUT3_L_BUF
LOCALBUF 		chn_enable_or00001/LUT2_D_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/Mcount_left_xor<5>1211/LUT4_D_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<0>2_SW0/LUT3_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<0>1_SW1/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<9>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<8>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<7>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<6>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<5>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<4>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<3>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<31>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<30>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<2>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<29>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<28>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<27>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<26>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<25>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<24>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<23>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<22>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<21>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<20>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<1>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<19>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<18>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<17>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<16>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<15>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<14>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<13>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<12>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<11>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<10>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/sddo_mux0000<0>49/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/Mcount_left_xor<2>111/LUT2_D_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<14>25/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<14>36/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<15>36/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<15>36/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<16>36/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<16>36/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<17>36/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<17>36/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<18>36/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<18>36/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<20>58/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<20>58/LUT4_L_BUF
LOCALBUF 		da_dcm_s11/LUT4_D_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_cmp_eq000041/LUT4_D_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_cmp_eq000041/LUT4_D_BUF
LOCALBUF 		sddqt_manual1/LUT4_D_BUF
LOCALBUF 		i2c_do_wire<15>17/LUT2_L_BUF
LOCALBUF 		i2c_do_wire<13>17/LUT2_L_BUF
LOCALBUF 		ch3a_or0000_SW0/LUT4_L_BUF
LOCALBUF 		ch2a_or0000_SW0/LUT4_L_BUF
LOCALBUF 		ch1a_or0000_SW0/LUT4_L_BUF
LOCALBUF 		ch0a_or0000_SW0/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<19>50/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<19>50/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<3>4/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<6>149/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<4>149/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<7>132/LUT3_D_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<19>103/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<19>103/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<23>236_SW0/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<21>13/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<21>13/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<9>17_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<10>17_SW0/LUT4_L_BUF
LOCALBUF 		i2c_do_wire<27>240_SW0/LUT2_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<14>57/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<14>70/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<15>70/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<15>70/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<16>70/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<16>70/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<17>70/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<17>70/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_wr/pre3sda_mux0000<18>70/LUT4_L_BUF
LOCALBUF 		i_mcontr/i_mcontr_line_rd/pre3sda_mux0000<18>70/LUT4_L_BUF
LOCALBUF 		i_sync_frames/wait_first_or0000311_SW0/LUT4_L_BUF
INV 		i_SDDd/i_dq0/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq1/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq2/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq3/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq4/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq5/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq6/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq7/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq8/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq9/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq10/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq11/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq12/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq13/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq14/i_qq_not00001_INV_0
INV 		i_SDDd/i_dq15/i_qq_not00001_INV_0
INV 		i_sddqs/i_dqsl/i_dr_not00001_INV_0
INV 		i_sddqs/i_dqsl/i_dr_not00001_INV_0_1
INV 		i_SDDd/i_dq0/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq1/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq2/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq3/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq4/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq5/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq6/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq7/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq8/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq9/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq10/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq11/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq12/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq13/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq14/i_dr_not00001_INV_0
INV 		i_SDDd/i_dq15/i_dr_not00001_INV_0
INV 		i_SDUDM/i_dq/i_dr_not00001_INV_0
INV 		i_SDLDM/i_dq/i_dr_not00001_INV_0
LUT1 		Msub__sub0000_cy<0>_rt
LUT1 		Msub__sub0003_cy<0>_rt
LUT1 		Msub__sub0001_cy<0>_rt
LUT1 		Msub__sub0002_cy<0>_rt
LUT1 		Msub__sub0004_cy<0>_rt
LUT1 		Mcount_new_clk2_cnt_cy<1>_rt
LUT1 		Mcount_new_clk2_cnt_cy<2>_rt
LUT1 		Mcount_new_clk2_cnt_cy<3>_rt
LUT1 		Mcount_new_clk2_cnt_cy<4>_rt
LUT1 		Mcount_new_clk2_cnt_cy<5>_rt
LUT1 		Mcount_new_clk2_cnt_cy<6>_rt
LUT1 		Mcount_new_clk1_cnt_cy<1>_rt
LUT1 		Mcount_new_clk1_cnt_cy<2>_rt
LUT1 		Mcount_new_clk1_cnt_cy<3>_rt
LUT1 		Mcount_new_clk1_cnt_cy<4>_rt
LUT1 		Mcount_new_clk1_cnt_cy<5>_rt
LUT1 		Mcount_new_clk1_cnt_cy<6>_rt
LUT1 		Mcount_new_clk1_cnt_cy<7>_rt
LUT1 		Mcount_new_clk1_cnt_cy<8>_rt
LUT1 		Mcount_new_clk1_cnt_cy<9>_rt
LUT1 		Mcount_new_clk1_cnt_cy<10>_rt
LUT1 		Mcount_new_clk1_cnt_cy<11>_rt
LUT1 		Mcount_new_clk1_cnt_cy<12>_rt
LUT1 		Mcount_new_clk1_cnt_cy<13>_rt
LUT1 		Mcount_new_clk1_cnt_cy<14>_rt
LUT1 		Mcount_new_clk0_cnt_cy<1>_rt
LUT1 		Mcount_new_clk0_cnt_cy<2>_rt
LUT1 		Mcount_new_clk0_cnt_cy<3>_rt
LUT1 		Mcount_new_clk0_cnt_cy<4>_rt
LUT1 		Mcount_new_clk0_cnt_cy<5>_rt
LUT1 		Mcount_new_clk0_cnt_cy<6>_rt
LUT1 		Mcount_new_clk0_cnt_cy<7>_rt
LUT1 		Mcount_new_clk0_cnt_cy<8>_rt
LUT1 		Mcount_new_clk0_cnt_cy<9>_rt
LUT1 		Mcount_new_clk0_cnt_cy<10>_rt
LUT1 		Mcount_new_clk0_cnt_cy<11>_rt
LUT1 		Mcount_new_clk0_cnt_cy<12>_rt
LUT1 		Mcount_new_clk0_cnt_cy<13>_rt
LUT1 		Mcount_new_clk0_cnt_cy<14>_rt
LUT1 		Mcount_i2c_bit_cnt_cy<1>_rt
LUT1 		Mcount_i2c_bit_cnt_cy<2>_rt
LUT1 		Mcount_i2c_bit_cnt_cy<3>_rt
LUT1 		Mcount_i2c_bit_cnt_cy<4>_rt
LUT1 		Mcount_i2c_bit_cnt_cy<5>_rt
LUT1 		Mcount_i2c_bit_cnt_cy<6>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<1>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<2>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<3>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<4>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<5>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<6>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<7>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<8>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<9>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<10>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<11>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<12>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<13>_rt
LUT1 		Mcount_pre_px_hact1_cnt_cy<14>_rt
LUT1 		Mcount_pclk_cnt_cy<1>_rt
LUT1 		Mcount_pclk_cnt_cy<2>_rt
LUT1 		Mcount_pclk_cnt_cy<3>_rt
LUT1 		Mcount_pclk_cnt_cy<4>_rt
LUT1 		Mcount_pclk_cnt_cy<5>_rt
LUT1 		Mcount_pclk_cnt_cy<6>_rt
LUT1 		Mcount_ddr_addr_r_cy<1>_rt
LUT1 		Mcount_ddr_addr_r_cy<2>_rt
LUT1 		Mcount_ddr_addr_r_cy<3>_rt
LUT1 		Mcount_ddr_addr_r_cy<4>_rt
LUT1 		Mcount_ddr_addr_r_cy<5>_rt
LUT1 		Mcount_ddr_addr_r_cy<6>_rt
LUT1 		Mcount_ddr_addr_r_cy<7>_rt
LUT1 		Mcount_ddr_addr_r_cy<8>_rt
LUT1 		Mcount_ddr_addr_r_cy<9>_rt
LUT1 		Mcount_ddr_addr_r_cy<10>_rt
LUT1 		Mcount_ch0_hact_cnt_cy<1>_rt
LUT1 		Mcount_ch0_hact_cnt_cy<2>_rt
LUT1 		Mcount_ch0_hact_cnt_cy<3>_rt
LUT1 		Mcount_ch0_hact_cnt_cy<4>_rt
LUT1 		Mcount_ch0_hact_cnt_cy<5>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<1>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<2>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<3>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<4>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<5>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<6>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<7>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<8>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<9>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<10>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<11>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<12>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<13>_rt
LUT1 		Mcount_pre_px_hact2_cnt_cy<14>_rt
LUT1 		Mcount_ch2_hact_cnt_cy<1>_rt
LUT1 		Mcount_ch2_hact_cnt_cy<2>_rt
LUT1 		Mcount_ch2_hact_cnt_cy<3>_rt
LUT1 		Mcount_ch2_hact_cnt_cy<4>_rt
LUT1 		Mcount_ch2_hact_cnt_cy<5>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<1>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<2>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<3>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<4>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<5>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<6>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<7>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<8>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<9>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<10>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<11>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<12>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<13>_rt
LUT1 		Mcount_ch1_line_pause_cnt_cy<14>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<1>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<2>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<3>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<4>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<5>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<6>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<7>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<8>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<9>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<10>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<11>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<12>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<13>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_cy<14>_rt
LUT1 		Mcount_ch1_line_cnt_cy<1>_rt
LUT1 		Mcount_ch1_line_cnt_cy<2>_rt
LUT1 		Mcount_ch1_line_cnt_cy<3>_rt
LUT1 		Mcount_ch1_line_cnt_cy<4>_rt
LUT1 		Mcount_ch1_line_cnt_cy<5>_rt
LUT1 		Mcount_ch1_line_cnt_cy<6>_rt
LUT1 		Mcount_ch1_line_cnt_cy<7>_rt
LUT1 		Mcount_ch1_line_cnt_cy<8>_rt
LUT1 		Mcount_ch1_line_cnt_cy<9>_rt
LUT1 		Mcount_ch1_line_cnt_cy<10>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<1>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<2>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<3>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<4>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<5>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<6>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<7>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<8>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<9>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<10>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<11>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<12>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<13>_rt
LUT1 		Mcount_ch3_line_pause_cnt_cy<14>_rt
LUT1 		Mcount_ch3_line_cnt_cy<1>_rt
LUT1 		Mcount_ch3_line_cnt_cy<2>_rt
LUT1 		Mcount_ch3_line_cnt_cy<3>_rt
LUT1 		Mcount_ch3_line_cnt_cy<4>_rt
LUT1 		Mcount_ch3_line_cnt_cy<5>_rt
LUT1 		Mcount_ch3_line_cnt_cy<6>_rt
LUT1 		Mcount_ch3_line_cnt_cy<7>_rt
LUT1 		Mcount_ch3_line_cnt_cy<8>_rt
LUT1 		Mcount_ch3_line_cnt_cy<9>_rt
LUT1 		Mcount_ch3_line_cnt_cy<10>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<1>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<2>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<3>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<4>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<5>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<6>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<7>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<8>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<9>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<10>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<11>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<12>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<13>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_cy<14>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<1>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<2>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<3>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<4>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<5>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<6>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<7>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<8>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<9>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<10>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<11>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<12>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<13>_rt
LUT1 		Mcount_ch3_blank_line_cnt_cy<14>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<1>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<2>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<3>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<4>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<5>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<6>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<7>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<8>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<9>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<10>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<11>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<12>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<13>_rt
LUT1 		Mcount_ch1_blank_line_cnt_cy<14>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<1>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<2>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<3>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<4>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<5>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<6>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<7>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<8>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<9>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<10>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<11>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<12>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<13>_rt
LUT1 		Mcount_ch1_blank_cnt_cy<14>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<1>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<2>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<3>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<4>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<5>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<6>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<7>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<8>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<9>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<10>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<11>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<12>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<13>_rt
LUT1 		Mcount_ch3_blank_cnt_cy<14>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<1>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<2>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<3>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<4>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<5>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<6>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<7>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<8>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<9>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<10>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<11>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<12>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<13>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_cy<14>_rt
LUT1 		Mcount_buf_pix_cnt_cy<1>_rt
LUT1 		Mcount_buf_pix_cnt_cy<2>_rt
LUT1 		Mcount_buf_pix_cnt_cy<3>_rt
LUT1 		Mcount_buf_pix_cnt_cy<4>_rt
LUT1 		Mcount_buf_pix_cnt_cy<5>_rt
LUT1 		Mcount_buf_pix_cnt_cy<6>_rt
LUT1 		Mcount_buf_pix_cnt_cy<7>_rt
LUT1 		Mcount_buf_pix_cnt_cy<8>_rt
LUT1 		Mcount_buf_pix_cnt_cy<9>_rt
LUT1 		Mcount_buf_pix_cnt_cy<10>_rt
LUT1 		Mcount_buf_pix_cnt_cy<11>_rt
LUT1 		Mcount_buf_pix_cnt_cy<12>_rt
LUT1 		Mcount_buf_pix_cnt_cy<13>_rt
LUT1 		Mcount_buf_pix_cnt_cy<14>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<1>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<2>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<3>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<4>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<5>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<6>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<7>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<8>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<9>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<10>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<11>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<12>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<13>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_cy<14>_rt
LUT1 		Mcount_env1_cnt_cy<1>_rt
LUT1 		Mcount_env1_cnt_cy<2>_rt
LUT1 		Mcount_env1_cnt_cy<3>_rt
LUT1 		Mcount_env1_cnt_cy<4>_rt
LUT1 		Mcount_env1_cnt_cy<5>_rt
LUT1 		Mcount_env1_cnt_cy<6>_rt
LUT1 		Mcount_env1_cnt_cy<7>_rt
LUT1 		Mcount_env1_cnt_cy<8>_rt
LUT1 		Mcount_env1_cnt_cy<9>_rt
LUT1 		Mcount_env1_cnt_cy<10>_rt
LUT1 		Mcount_env1_cnt_cy<11>_rt
LUT1 		Mcount_env1_cnt_cy<12>_rt
LUT1 		Mcount_env1_cnt_cy<13>_rt
LUT1 		Mcount_env1_cnt_cy<14>_rt
LUT1 		Mcount_test_pattern_counter_cy<1>_rt
LUT1 		Mcount_test_pattern_counter_cy<2>_rt
LUT1 		Mcount_test_pattern_counter_cy<3>_rt
LUT1 		Mcount_test_pattern_counter_cy<4>_rt
LUT1 		Mcount_test_pattern_counter_cy<5>_rt
LUT1 		Mcount_test_pattern_counter_cy<6>_rt
LUT1 		Mcount_test_pattern_counter_cy<7>_rt
LUT1 		Mcount_test_pattern_counter_cy<8>_rt
LUT1 		Mcount_test_pattern_counter_cy<9>_rt
LUT1 		Mcount_test_pattern_counter_cy<10>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<1>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<2>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<3>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<4>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<5>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<6>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<7>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<8>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<9>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<10>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<11>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<12>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<13>_rt
LUT1 		Mcount_buf_pix_cnt2_cy<14>_rt
LUT1 		Mcount_env2_cnt_cy<1>_rt
LUT1 		Mcount_env2_cnt_cy<2>_rt
LUT1 		Mcount_env2_cnt_cy<3>_rt
LUT1 		Mcount_env2_cnt_cy<4>_rt
LUT1 		Mcount_env2_cnt_cy<5>_rt
LUT1 		Mcount_env2_cnt_cy<6>_rt
LUT1 		Mcount_env2_cnt_cy<7>_rt
LUT1 		Mcount_env2_cnt_cy<8>_rt
LUT1 		Mcount_env2_cnt_cy<9>_rt
LUT1 		Mcount_env2_cnt_cy<10>_rt
LUT1 		Mcount_env2_cnt_cy<11>_rt
LUT1 		Mcount_env2_cnt_cy<12>_rt
LUT1 		Mcount_env2_cnt_cy<13>_rt
LUT1 		Mcount_env2_cnt_cy<14>_rt
LUT1 		Mcount_sclk0_cnt_cy<1>_rt
LUT1 		Mcount_sclk0_cnt_cy<2>_rt
LUT1 		Mcount_sclk0_cnt_cy<3>_rt
LUT1 		Mcount_sclk0_cnt_cy<4>_rt
LUT1 		Mcount_sclk0_cnt_cy<5>_rt
LUT1 		Mcount_sclk0_cnt_cy<6>_rt
LUT1 		Mcount_reset_counter_cy<1>_rt
LUT1 		Mcount_reset_counter_cy<2>_rt
LUT1 		Mcount_reset_counter_cy<3>_rt
LUT1 		Mcount_reset_counter_cy<4>_rt
LUT1 		Mcount_reset_counter_cy<5>_rt
LUT1 		Mcount_reset_counter_cy<6>_rt
LUT1 		Mcount_reset_counter_cy<7>_rt
LUT1 		Mcount_reset_counter_cy<8>_rt
LUT1 		Mcount_reset_counter_cy<9>_rt
LUT1 		Mcount_reset_counter_cy<10>_rt
LUT1 		Mcount_reset_counter_cy<11>_rt
LUT1 		Mcount_reset_counter_cy<12>_rt
LUT1 		Mcount_reset_counter_cy<13>_rt
LUT1 		Mcount_reset_counter_cy<14>_rt
LUT1 		Mcount_n_lines_cnt_cy<1>_rt
LUT1 		Mcount_n_lines_cnt_cy<2>_rt
LUT1 		Mcount_n_lines_cnt_cy<3>_rt
LUT1 		Mcount_n_lines_cnt_cy<4>_rt
LUT1 		Mcount_n_lines_cnt_cy<5>_rt
LUT1 		Mcount_n_lines_cnt_cy<6>_rt
LUT1 		Mcount_n_lines_cnt_cy<7>_rt
LUT1 		Mcount_n_lines_cnt_cy<8>_rt
LUT1 		Mcount_n_lines_cnt_cy<9>_rt
LUT1 		Mcount_n_lines_cnt_cy<10>_rt
LUT1 		Mcount_n_pixels_cnt_cy<1>_rt
LUT1 		Mcount_n_pixels_cnt_cy<2>_rt
LUT1 		Mcount_n_pixels_cnt_cy<3>_rt
LUT1 		Mcount_n_pixels_cnt_cy<4>_rt
LUT1 		Mcount_n_pixels_cnt_cy<5>_rt
LUT1 		Mcount_n_pixels_cnt_cy<6>_rt
LUT1 		Mcount_n_pixels_cnt_cy<7>_rt
LUT1 		Mcount_n_pixels_cnt_cy<8>_rt
LUT1 		Mcount_n_pixels_cnt_cy<9>_rt
LUT1 		Mcount_n_pixels_cnt_cy<10>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<1>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<2>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<3>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<4>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<5>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<6>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<7>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<8>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<9>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<10>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<11>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<12>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<13>_rt
LUT1 		Mcount_ch1_n_lines_err_cy<14>_rt
LUT1 		Mcount_ch1_n_lines_cnt_cy<1>_rt
LUT1 		Mcount_ch1_n_lines_cnt_cy<2>_rt
LUT1 		Mcount_ch1_n_lines_cnt_cy<3>_rt
LUT1 		Mcount_ch1_n_lines_cnt_cy<4>_rt
LUT1 		Mcount_ch1_n_lines_cnt_cy<5>_rt
LUT1 		Mcount_ch1_n_lines_cnt_cy<6>_rt
LUT1 		Mcount_ch1_n_lines_cnt_cy<7>_rt
LUT1 		Mcount_ch1_n_lines_cnt_cy<8>_rt
LUT1 		Mcount_ch1_n_lines_cnt_cy<9>_rt
LUT1 		Mcount_ch1_n_lines_cnt_cy<10>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<1>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<2>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<3>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<4>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<5>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<6>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<7>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<8>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<9>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<10>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<11>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<12>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<13>_rt
LUT1 		Mcount_ch1_n_pixels_err_cy<14>_rt
LUT1 		Mcount_ch2_n_lines_cnt_cy<1>_rt
LUT1 		Mcount_ch2_n_lines_cnt_cy<2>_rt
LUT1 		Mcount_ch2_n_lines_cnt_cy<3>_rt
LUT1 		Mcount_ch2_n_lines_cnt_cy<4>_rt
LUT1 		Mcount_ch2_n_lines_cnt_cy<5>_rt
LUT1 		Mcount_ch2_n_lines_cnt_cy<6>_rt
LUT1 		Mcount_ch2_n_lines_cnt_cy<7>_rt
LUT1 		Mcount_ch2_n_lines_cnt_cy<8>_rt
LUT1 		Mcount_ch2_n_lines_cnt_cy<9>_rt
LUT1 		Mcount_ch2_n_lines_cnt_cy<10>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<1>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<2>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<3>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<4>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<5>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<6>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<7>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<8>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<9>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<10>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<11>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<12>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<13>_rt
LUT1 		Mcount_ch2_n_lines_err_cy<14>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<1>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<2>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<3>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<4>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<5>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<6>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<7>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<8>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<9>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<10>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<11>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<12>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<13>_rt
LUT1 		Mcount_ch2_n_pixels_err_cy<14>_rt
LUT1 		Mcount_ch3_n_lines_cnt_cy<1>_rt
LUT1 		Mcount_ch3_n_lines_cnt_cy<2>_rt
LUT1 		Mcount_ch3_n_lines_cnt_cy<3>_rt
LUT1 		Mcount_ch3_n_lines_cnt_cy<4>_rt
LUT1 		Mcount_ch3_n_lines_cnt_cy<5>_rt
LUT1 		Mcount_ch3_n_lines_cnt_cy<6>_rt
LUT1 		Mcount_ch3_n_lines_cnt_cy<7>_rt
LUT1 		Mcount_ch3_n_lines_cnt_cy<8>_rt
LUT1 		Mcount_ch3_n_lines_cnt_cy<9>_rt
LUT1 		Mcount_ch3_n_lines_cnt_cy<10>_rt
LUT1 		Mcount_ivi_cnt_cy<1>_rt
LUT1 		Mcount_ivi_cnt_cy<2>_rt
LUT1 		Mcount_ivi_cnt_cy<3>_rt
LUT1 		Mcount_ivi_cnt_cy<4>_rt
LUT1 		Mcount_ivi_cnt_cy<5>_rt
LUT1 		Mcount_ivi_cnt_cy<6>_rt
LUT1 		Mcount_ivi_cnt_cy<7>_rt
LUT1 		Mcount_ivi_cnt_cy<8>_rt
LUT1 		Mcount_ivi_cnt_cy<9>_rt
LUT1 		Mcount_ivi_cnt_cy<10>_rt
LUT1 		Mcount_ivi_cnt_cy<11>_rt
LUT1 		Mcount_ivi_cnt_cy<12>_rt
LUT1 		Mcount_ivi_cnt_cy<13>_rt
LUT1 		Mcount_ivi_cnt_cy<14>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<1>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<2>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<3>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<4>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<5>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<6>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<7>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<8>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<9>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<10>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<11>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<12>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<13>_rt
LUT1 		Mcount_ch3_n_lines_err_cy<14>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<1>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<2>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<3>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<4>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<5>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<6>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<7>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<8>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<9>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<10>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<11>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<12>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<13>_rt
LUT1 		Mcount_ch3_n_pixels_err_cy<14>_rt
LUT1 		Maccum_fosum_cy<12>_rt
LUT1 		Maccum_fosum_cy<13>_rt
LUT1 		Maccum_fosum_cy<14>_rt
LUT1 		Mcount_check_counter_cy<1>_rt
LUT1 		Mcount_check_counter_cy<2>_rt
LUT1 		Mcount_check_counter_cy<3>_rt
LUT1 		Mcount_check_counter_cy<4>_rt
LUT1 		Mcount_check_counter_cy<5>_rt
LUT1 		Mcount_check_counter_cy<6>_rt
LUT1 		Mcount_check_counter_cy<7>_rt
LUT1 		Mcount_check_counter_cy<8>_rt
LUT1 		Mcount_check_counter_cy<9>_rt
LUT1 		Mcount_check_counter_cy<10>_rt
LUT1 		Mcount_check_counter_cy<11>_rt
LUT1 		Mcount_check_counter_cy<12>_rt
LUT1 		Mcount_check_counter_cy<13>_rt
LUT1 		Mcount_check_counter_cy<14>_rt
LUT1 		Mcount_sdram_read_cnt_cy<1>_rt
LUT1 		Mcount_sdram_read_cnt_cy<2>_rt
LUT1 		Mcount_sdram_read_cnt_cy<3>_rt
LUT1 		Mcount_sdram_read_cnt_cy<4>_rt
LUT1 		Mcount_sdram_read_cnt_cy<5>_rt
LUT1 		Mcount_sdram_read_cnt_cy<6>_rt
LUT1 		Mcount_output_frame_counter_cy<1>_rt
LUT1 		Mcount_output_frame_counter_cy<2>_rt
LUT1 		Mcount_output_frame_counter_cy<3>_rt
LUT1 		Mcount_output_frame_counter_cy<4>_rt
LUT1 		Mcount_output_frame_counter_cy<5>_rt
LUT1 		Mcount_output_frame_counter_cy<6>_rt
LUT1 		Mcount_output_frame_counter_cy<7>_rt
LUT1 		Mcount_output_frame_counter_cy<8>_rt
LUT1 		Mcount_output_frame_counter_cy<9>_rt
LUT1 		Mcount_output_frame_counter_cy<10>_rt
LUT1 		Mcount_output_frame_counter_cy<11>_rt
LUT1 		Mcount_output_frame_counter_cy<12>_rt
LUT1 		Mcount_output_frame_counter_cy<13>_rt
LUT1 		Mcount_output_frame_counter_cy<14>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_cy<1>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_cy<2>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_cy<3>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_cy<4>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_cy<5>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_cy<6>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_cy<7>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_cy<8>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_cy<9>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_cy<10>_rt
LUT1 		Mcount_sdram_write_cnt_cy<1>_rt
LUT1 		Mcount_sdram_write_cnt_cy<2>_rt
LUT1 		Mcount_sdram_write_cnt_cy<3>_rt
LUT1 		Mcount_sdram_write_cnt_cy<4>_rt
LUT1 		Mcount_sdram_write_cnt_cy<5>_rt
LUT1 		Mcount_sdram_write_cnt_cy<6>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_cy<1>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_cy<2>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_cy<3>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_cy<4>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_cy<5>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_cy<6>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_cy<7>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_cy<8>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_cy<9>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_cy<10>_rt
LUT1 		Mcount_buf_cnt_cy<1>_rt
LUT1 		Mcount_buf_cnt_cy<2>_rt
LUT1 		Mcount_buf_cnt_cy<3>_rt
LUT1 		Mcount_buf_cnt_cy<4>_rt
LUT1 		Mcount_buf_cnt_cy<5>_rt
LUT1 		Mcount_buf_cnt_cy<6>_rt
LUT1 		Mcount_buf_cnt_cy<7>_rt
LUT1 		Mcount_buf_cnt_cy<8>_rt
LUT1 		Mcount_buf_cnt_cy<9>_rt
LUT1 		Mcount_buf_cnt_cy<10>_rt
LUT1 		Mcount_buf_cnt_cy<11>_rt
LUT1 		Mcount_buf_cnt_cy<12>_rt
LUT1 		Mcount_buf_cnt_cy<13>_rt
LUT1 		Mcount_buf_cnt_cy<14>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_cy<1>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_cy<2>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_cy<3>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_cy<4>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_cy<5>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_cy<6>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_cy<7>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_cy<8>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_cy<9>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_cy<10>_rt
LUT1 		Mcount_sp0_clk_cnt_cy<1>_rt
LUT1 		Mcount_sp0_clk_cnt_cy<2>_rt
LUT1 		Mcount_sp0_clk_cnt_cy<3>_rt
LUT1 		Mcount_sp0_clk_cnt_cy<4>_rt
LUT1 		Mcount_sp0_clk_cnt_cy<5>_rt
LUT1 		Mcount_sp0_clk_cnt_cy<6>_rt
LUT1 		Mcount_ch3weo_cnt_cy<1>_rt
LUT1 		Mcount_ch3weo_cnt_cy<2>_rt
LUT1 		Mcount_ch3weo_cnt_cy<3>_rt
LUT1 		Mcount_ch3weo_cnt_cy<4>_rt
LUT1 		Mcount_ch3weo_cnt_cy<5>_rt
LUT1 		Mcount_ch3weo_cnt_cy<6>_rt
LUT1 		Mcount_ch3weo_cnt_cy<7>_rt
LUT1 		Mcount_ch3weo_cnt_cy<8>_rt
LUT1 		Mcount_ch3weo_cnt_cy<9>_rt
LUT1 		Mcount_ch3weo_cnt_cy<10>_rt
LUT1 		Mcount_ch3weo_cnt_cy<11>_rt
LUT1 		Mcount_ch3weo_cnt_cy<12>_rt
LUT1 		Mcount_ch3weo_cnt_cy<13>_rt
LUT1 		Mcount_ch3weo_cnt_cy<14>_rt
LUT1 		Mcount_buf_cnt2_cy<1>_rt
LUT1 		Mcount_buf_cnt2_cy<2>_rt
LUT1 		Mcount_buf_cnt2_cy<3>_rt
LUT1 		Mcount_buf_cnt2_cy<4>_rt
LUT1 		Mcount_buf_cnt2_cy<5>_rt
LUT1 		Mcount_buf_cnt2_cy<6>_rt
LUT1 		Mcount_buf_cnt2_cy<7>_rt
LUT1 		Mcount_buf_cnt2_cy<8>_rt
LUT1 		Mcount_buf_cnt2_cy<9>_rt
LUT1 		Mcount_buf_cnt2_cy<10>_rt
LUT1 		Mcount_buf_cnt2_cy<11>_rt
LUT1 		Mcount_buf_cnt2_cy<12>_rt
LUT1 		Mcount_buf_cnt2_cy<13>_rt
LUT1 		Mcount_buf_cnt2_cy<14>_rt
LUT1 		Mcount_ch1weo_cnt_cy<1>_rt
LUT1 		Mcount_ch1weo_cnt_cy<2>_rt
LUT1 		Mcount_ch1weo_cnt_cy<3>_rt
LUT1 		Mcount_ch1weo_cnt_cy<4>_rt
LUT1 		Mcount_ch1weo_cnt_cy<5>_rt
LUT1 		Mcount_ch1weo_cnt_cy<6>_rt
LUT1 		Mcount_ch1weo_cnt_cy<7>_rt
LUT1 		Mcount_ch1weo_cnt_cy<8>_rt
LUT1 		Mcount_ch1weo_cnt_cy<9>_rt
LUT1 		Mcount_ch1weo_cnt_cy<10>_rt
LUT1 		Mcount_ch1weo_cnt_cy<11>_rt
LUT1 		Mcount_ch1weo_cnt_cy<12>_rt
LUT1 		Mcount_ch1weo_cnt_cy<13>_rt
LUT1 		Mcount_ch1weo_cnt_cy<14>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_add0000_cy<1>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<4>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_add0000_cy<2>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<5>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_add0000_cy<3>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<6>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_add0000_cy<4>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<7>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_add0000_cy<5>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<8>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_add0000_cy<6>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<9>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_add0000_cy<7>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<10>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_add0000_cy<8>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<11>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<1>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<2>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_cy<3>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_add0000_cy<1>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<4>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_add0000_cy<2>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<5>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_add0000_cy<3>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<6>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_add0000_cy<4>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<7>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_add0000_cy<5>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<8>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_add0000_cy<6>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<9>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_add0000_cy<7>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<10>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_add0000_cy<8>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<11>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<1>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<2>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_cy<3>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<1>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<2>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<3>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<4>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<5>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<6>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<7>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<8>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<9>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<10>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<11>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_cy<12>_rt
LUT1 		i_mcontr/i_channel5/Mcount_a_cy<1>_rt
LUT1 		i_mcontr/i_channel5/Mcount_a_cy<2>_rt
LUT1 		i_mcontr/i_channel5/Mcount_a_cy<3>_rt
LUT1 		i_mcontr/i_channel5/Mcount_a_cy<4>_rt
LUT1 		i_mcontr/i_channel5/Mcount_a_cy<5>_rt
LUT1 		i_mcontr/i_channel5/Mcount_a_cy<6>_rt
LUT1 		i_mcontr/i_channel5/Mcount_a_cy<7>_rt
LUT1 		i_mcontr/i_channel5/Mcount_nx_cnt_cy<1>_rt
LUT1 		i_mcontr/i_channel5/Mcount_nx_cnt_cy<2>_rt
LUT1 		i_mcontr/i_channel5/Mcount_nx_cnt_cy<3>_rt
LUT1 		i_mcontr/i_channel5/Mcount_nx_cnt_cy<4>_rt
LUT1 		i_mcontr/i_channel5/Mcount_nx_cnt_cy<5>_rt
LUT1 		i_mcontr/i_channel5/Mcount_nx_cnt_cy<6>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<1>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<2>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<3>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<4>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<5>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<6>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<7>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<8>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<9>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<10>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<11>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_cy<12>_rt
LUT1 		i_mcontr/i_channel1/Maccum_nx_cy<0>_rt
XORCY 		i_mcontr/i_channel1/Maccum_nx_xor<0>
LUT1 		i_mcontr/i_channel1/Maccum_nx_cy<2>_rt
LUT1 		i_mcontr/i_channel1/Maccum_nx_cy<3>_rt
LUT1 		i_mcontr/i_channel1/Maccum_nx_cy<4>_rt
LUT1 		i_mcontr/i_channel1/Maccum_nx_cy<5>_rt
LUT1 		i_mcontr/i_channel1/Mcount_nx_cnt_cy<1>_rt
LUT1 		i_mcontr/i_channel1/Mcount_nx_cnt_cy<2>_rt
LUT1 		i_mcontr/i_channel1/Mcount_nx_cnt_cy<3>_rt
LUT1 		i_mcontr/i_channel1/Mcount_nx_cnt_cy<4>_rt
LUT1 		i_mcontr/i_channel1/Mcount_nx_cnt_cy<5>_rt
LUT1 		i_mcontr/i_channel1/Mcount_nx_cnt_cy<6>_rt
LUT1 		i_mcontr/i_channel1/Mcount_a_cy<1>_rt
LUT1 		i_mcontr/i_channel1/Mcount_a_cy<2>_rt
LUT1 		i_mcontr/i_channel1/Mcount_a_cy<3>_rt
LUT1 		i_mcontr/i_channel1/Mcount_a_cy<4>_rt
LUT1 		i_mcontr/i_channel1/Mcount_a_cy<5>_rt
LUT1 		i_mcontr/i_channel1/Mcount_a_cy<6>_rt
LUT1 		i_mcontr/i_channel1/Mcount_a_cy<7>_rt
LUT1 		i_mcontr/i_channel1/Mcount_a_cy<8>_rt
LUT1 		i_mcontr/i_channel1/Mcount_a_cy<9>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<1>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<2>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<3>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<4>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<5>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<6>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<7>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<8>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<9>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<10>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<11>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_cy<12>_rt
LUT1 		i_mcontr/i_channel3/Maccum_nx_cy<0>_rt
XORCY 		i_mcontr/i_channel3/Maccum_nx_xor<0>
LUT1 		i_mcontr/i_channel3/Maccum_nx_cy<2>_rt
LUT1 		i_mcontr/i_channel3/Maccum_nx_cy<3>_rt
LUT1 		i_mcontr/i_channel3/Maccum_nx_cy<4>_rt
LUT1 		i_mcontr/i_channel3/Maccum_nx_cy<5>_rt
LUT1 		i_mcontr/i_channel3/Mcount_nx_cnt_cy<1>_rt
LUT1 		i_mcontr/i_channel3/Mcount_nx_cnt_cy<2>_rt
LUT1 		i_mcontr/i_channel3/Mcount_nx_cnt_cy<3>_rt
LUT1 		i_mcontr/i_channel3/Mcount_nx_cnt_cy<4>_rt
LUT1 		i_mcontr/i_channel3/Mcount_nx_cnt_cy<5>_rt
LUT1 		i_mcontr/i_channel3/Mcount_nx_cnt_cy<6>_rt
LUT1 		i_mcontr/i_channel3/Mcount_a_cy<1>_rt
LUT1 		i_mcontr/i_channel3/Mcount_a_cy<2>_rt
LUT1 		i_mcontr/i_channel3/Mcount_a_cy<3>_rt
LUT1 		i_mcontr/i_channel3/Mcount_a_cy<4>_rt
LUT1 		i_mcontr/i_channel3/Mcount_a_cy<5>_rt
LUT1 		i_mcontr/i_channel3/Mcount_a_cy<6>_rt
LUT1 		i_mcontr/i_channel3/Mcount_a_cy<7>_rt
LUT1 		i_mcontr/i_channel3/Mcount_a_cy<8>_rt
LUT1 		i_mcontr/i_channel3/Mcount_a_cy<9>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<1>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<2>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<3>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<4>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<5>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<6>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<7>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<8>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<9>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<10>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<11>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_cy<12>_rt
LUT1 		i_mcontr/i_channel0/Maccum_nx_cy<0>_rt
XORCY 		i_mcontr/i_channel0/Maccum_nx_xor<0>
LUT1 		i_mcontr/i_channel0/Maccum_nx_cy<2>_rt
LUT1 		i_mcontr/i_channel0/Maccum_nx_cy<3>_rt
LUT1 		i_mcontr/i_channel0/Maccum_nx_cy<4>_rt
LUT1 		i_mcontr/i_channel0/Maccum_nx_cy<5>_rt
LUT1 		i_mcontr/i_channel0/Mcount_nx_cnt_cy<1>_rt
LUT1 		i_mcontr/i_channel0/Mcount_nx_cnt_cy<2>_rt
LUT1 		i_mcontr/i_channel0/Mcount_nx_cnt_cy<3>_rt
LUT1 		i_mcontr/i_channel0/Mcount_nx_cnt_cy<4>_rt
LUT1 		i_mcontr/i_channel0/Mcount_nx_cnt_cy<5>_rt
LUT1 		i_mcontr/i_channel0/Mcount_nx_cnt_cy<6>_rt
LUT1 		i_mcontr/i_channel0/Mcount_a_cy<1>_rt
LUT1 		i_mcontr/i_channel0/Mcount_a_cy<2>_rt
LUT1 		i_mcontr/i_channel0/Mcount_a_cy<3>_rt
LUT1 		i_mcontr/i_channel0/Mcount_a_cy<4>_rt
LUT1 		i_mcontr/i_channel0/Mcount_a_cy<5>_rt
LUT1 		i_mcontr/i_channel0/Mcount_a_cy<6>_rt
LUT1 		i_mcontr/i_channel0/Mcount_a_cy<7>_rt
LUT1 		i_mcontr/i_channel0/Mcount_a_cy<8>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<1>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<2>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<3>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<4>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<5>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<6>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<7>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<8>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<9>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<10>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<11>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_cy<12>_rt
LUT1 		i_mcontr/i_channel2/Maccum_nx_cy<0>_rt
XORCY 		i_mcontr/i_channel2/Maccum_nx_xor<0>
LUT1 		i_mcontr/i_channel2/Maccum_nx_cy<2>_rt
LUT1 		i_mcontr/i_channel2/Maccum_nx_cy<3>_rt
LUT1 		i_mcontr/i_channel2/Maccum_nx_cy<4>_rt
LUT1 		i_mcontr/i_channel2/Maccum_nx_cy<5>_rt
LUT1 		i_mcontr/i_channel2/Mcount_nx_cnt_cy<1>_rt
LUT1 		i_mcontr/i_channel2/Mcount_nx_cnt_cy<2>_rt
LUT1 		i_mcontr/i_channel2/Mcount_nx_cnt_cy<3>_rt
LUT1 		i_mcontr/i_channel2/Mcount_nx_cnt_cy<4>_rt
LUT1 		i_mcontr/i_channel2/Mcount_nx_cnt_cy<5>_rt
LUT1 		i_mcontr/i_channel2/Mcount_nx_cnt_cy<6>_rt
LUT1 		i_mcontr/i_channel2/Mcount_a_cy<1>_rt
LUT1 		i_mcontr/i_channel2/Mcount_a_cy<2>_rt
LUT1 		i_mcontr/i_channel2/Mcount_a_cy<3>_rt
LUT1 		i_mcontr/i_channel2/Mcount_a_cy<4>_rt
LUT1 		i_mcontr/i_channel2/Mcount_a_cy<5>_rt
LUT1 		i_mcontr/i_channel2/Mcount_a_cy<6>_rt
LUT1 		i_mcontr/i_channel2/Mcount_a_cy<7>_rt
LUT1 		i_mcontr/i_channel2/Mcount_a_cy<8>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<1>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<2>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<3>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<4>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<5>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<6>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<7>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<8>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<9>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<10>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<11>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_cy<12>_rt
LUT1 		i_mcontr/i_channel4/Maccum_nx_cy<0>_rt
XORCY 		i_mcontr/i_channel4/Maccum_nx_xor<0>
LUT1 		i_mcontr/i_channel4/Maccum_nx_cy<2>_rt
LUT1 		i_mcontr/i_channel4/Maccum_nx_cy<3>_rt
LUT1 		i_mcontr/i_channel4/Maccum_nx_cy<4>_rt
LUT1 		i_mcontr/i_channel4/Maccum_nx_cy<5>_rt
LUT1 		i_mcontr/i_channel4/Mcount_nx_cnt_cy<1>_rt
LUT1 		i_mcontr/i_channel4/Mcount_nx_cnt_cy<2>_rt
LUT1 		i_mcontr/i_channel4/Mcount_nx_cnt_cy<3>_rt
LUT1 		i_mcontr/i_channel4/Mcount_nx_cnt_cy<4>_rt
LUT1 		i_mcontr/i_channel4/Mcount_nx_cnt_cy<5>_rt
LUT1 		i_mcontr/i_channel4/Mcount_nx_cnt_cy<6>_rt
LUT1 		i_mcontr/i_channel4/Mcount_a_cy<1>_rt
LUT1 		i_mcontr/i_channel4/Mcount_a_cy<2>_rt
LUT1 		i_mcontr/i_channel4/Mcount_a_cy<3>_rt
LUT1 		i_mcontr/i_channel4/Mcount_a_cy<4>_rt
LUT1 		i_mcontr/i_channel4/Mcount_a_cy<5>_rt
LUT1 		i_mcontr/i_channel4/Mcount_a_cy<6>_rt
LUT1 		i_mcontr/i_channel4/Mcount_a_cy<7>_rt
LUT1 		i_mcontr/i_channel4/Mcount_a_cy<8>_rt
LUT1 		i_mcontr/i_mcontr_refresh/Mcount_rcntr_cy<0>_rt
LUT1 		Mcount_new_clk2_cnt_xor<7>_rt
LUT1 		Mcount_new_clk1_cnt_xor<15>_rt
LUT1 		Mcount_new_clk0_cnt_xor<15>_rt
LUT1 		Mcount_i2c_bit_cnt_xor<7>_rt
LUT1 		Mcount_pre_px_hact1_cnt_xor<15>_rt
LUT1 		Mcount_pclk_cnt_xor<7>_rt
LUT1 		Mcount_ddr_addr_r_xor<11>_rt
LUT1 		Mcount_ch0_hact_cnt_xor<6>_rt
LUT1 		Mcount_pre_px_hact2_cnt_xor<15>_rt
LUT1 		Mcount_ch2_hact_cnt_xor<6>_rt
LUT1 		Mcount_ch1_line_pause_cnt_xor<15>_rt
LUT1 		Mcount_ch1_vact_imt_cnt_xor<15>_rt
LUT1 		Mcount_ch1_line_cnt_xor<11>_rt
LUT1 		Mcount_ch3_line_pause_cnt_xor<15>_rt
LUT1 		Mcount_ch3_line_cnt_xor<11>_rt
LUT1 		Mcount_ch3_vact_imt_cnt_xor<15>_rt
LUT1 		Mcount_ch3_blank_line_cnt_xor<15>_rt
LUT1 		Mcount_ch1_blank_line_cnt_xor<15>_rt
LUT1 		Mcount_ch1_blank_cnt_xor<15>_rt
LUT1 		Mcount_ch3_blank_cnt_xor<15>_rt
LUT1 		Mcount_ch3_blank_vact_imt_cnt_xor<15>_rt
LUT1 		Mcount_buf_pix_cnt_xor<15>_rt
LUT1 		Mcount_ch1_blank_vact_imt_cnt_xor<15>_rt
LUT1 		Mcount_env1_cnt_xor<15>_rt
LUT1 		Mcount_test_pattern_counter_xor<11>_rt
LUT1 		Mcount_buf_pix_cnt2_xor<15>_rt
LUT1 		Mcount_env2_cnt_xor<15>_rt
LUT1 		Mcount_sclk0_cnt_xor<7>_rt
LUT1 		Mcount_reset_counter_xor<15>_rt
LUT1 		Mcount_n_lines_cnt_xor<11>_rt
LUT1 		Mcount_n_pixels_cnt_xor<11>_rt
LUT1 		Mcount_ch1_n_lines_err_xor<15>_rt
LUT1 		Mcount_ch1_n_lines_cnt_xor<11>_rt
LUT1 		Mcount_ch1_n_pixels_err_xor<15>_rt
LUT1 		Mcount_ch2_n_lines_cnt_xor<11>_rt
LUT1 		Mcount_ch2_n_lines_err_xor<15>_rt
LUT1 		Mcount_ch2_n_pixels_err_xor<15>_rt
LUT1 		Mcount_ch3_n_lines_cnt_xor<11>_rt
LUT1 		Mcount_ivi_cnt_xor<15>_rt
LUT1 		Mcount_ch3_n_lines_err_xor<15>_rt
LUT1 		Mcount_ch3_n_pixels_err_xor<15>_rt
LUT1 		Maccum_fosum_xor<15>_rt
LUT1 		Mcount_check_counter_xor<15>_rt
LUT1 		Mcount_sdram_read_cnt_xor<7>_rt
LUT1 		Mcount_output_frame_counter_xor<15>_rt
LUT1 		Mcount_ch2_n_pixels_cnt_xor<11>_rt
LUT1 		Mcount_sdram_write_cnt_xor<7>_rt
LUT1 		Mcount_ch1_n_pixels_cnt_xor<11>_rt
LUT1 		Mcount_buf_cnt_xor<15>_rt
LUT1 		Mcount_ch3_n_pixels_cnt_xor<11>_rt
LUT1 		Mcount_sp0_clk_cnt_xor<7>_rt
LUT1 		Mcount_ch3weo_cnt_xor<15>_rt
LUT1 		Mcount_buf_cnt2_xor<15>_rt
LUT1 		Mcount_ch1weo_cnt_xor<15>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_add0000_xor<9>_rt
LUT1 		i_mcontr/i_mcontr_line_rd/Madd_pre3sda_addsub0000_xor<12>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_add0000_xor<9>_rt
LUT1 		i_mcontr/i_mcontr_line_wr/Madd_pre3sda_addsub0000_xor<12>_rt
LUT1 		i_mcontr/i_channel5/Madd__AUX_101_xor<13>_rt
LUT1 		i_mcontr/i_channel5/Mcount_a_xor<8>_rt
LUT1 		i_mcontr/i_channel5/Mcount_nx_cnt_xor<7>_rt
LUT1 		i_mcontr/i_channel1/Madd__AUX_100_xor<13>_rt
LUT1 		i_mcontr/i_channel1/Maccum_nx_xor<6>_rt
LUT1 		i_mcontr/i_channel1/Mcount_nx_cnt_xor<7>_rt
LUT1 		i_mcontr/i_channel1/Mcount_a_xor<10>_rt
LUT1 		i_mcontr/i_channel3/Madd__AUX_100_xor<13>_rt
LUT1 		i_mcontr/i_channel3/Maccum_nx_xor<6>_rt
LUT1 		i_mcontr/i_channel3/Mcount_nx_cnt_xor<7>_rt
LUT1 		i_mcontr/i_channel3/Mcount_a_xor<10>_rt
LUT1 		i_mcontr/i_channel0/Madd__AUX_99_xor<13>_rt
LUT1 		i_mcontr/i_channel0/Maccum_nx_xor<6>_rt
LUT1 		i_mcontr/i_channel0/Mcount_nx_cnt_xor<7>_rt
LUT1 		i_mcontr/i_channel0/Mcount_a_xor<9>_rt
LUT1 		i_mcontr/i_channel2/Madd__AUX_99_xor<13>_rt
LUT1 		i_mcontr/i_channel2/Maccum_nx_xor<6>_rt
LUT1 		i_mcontr/i_channel2/Mcount_nx_cnt_xor<7>_rt
LUT1 		i_mcontr/i_channel2/Mcount_a_xor<9>_rt
LUT1 		i_mcontr/i_channel4/Madd__AUX_99_xor<13>_rt
LUT1 		i_mcontr/i_channel4/Maccum_nx_xor<6>_rt
LUT1 		i_mcontr/i_channel4/Mcount_nx_cnt_xor<7>_rt
LUT1 		i_mcontr/i_channel4/Mcount_a_xor<9>_rt
INV 		sp0_clk_inv1_INV_0
INV 		sensor_clk_reg1_INV_0
INV 		new_clk2_inv1_INV_0
INV 		new_clk1_inv1_INV_0
INV 		new_clk0_inv1_INV_0
INV 		i_sp2/i_ihact_not00001_INV_0
INV 		i_sp1/i_ihact_not00001_INV_0
INV 		stch3_not00011_INV_0
INV 		stch1_not00011_INV_0
INV 		i_sp2/fifo_data_in_addr_saved_sub0000<1>1_INV_0
INV 		i_sp2/Mcount_phase_hact_sel_xor<0>11_INV_0
INV 		i_sp2/Mcount_phase90sel_xor<0>11_INV_0
INV 		i_sp2/Mcount_fifo_data_in_addr_xor<0>11_INV_0
INV 		i_sp2/Mcount_dcm_locked_cntr_xor<0>11_INV_0
INV 		i_sp1/fifo_data_in_addr_saved_sub0000<1>1_INV_0
INV 		i_sp1/Mcount_phase_hact_sel_xor<0>11_INV_0
INV 		i_sp1/Mcount_phase90sel_xor<0>11_INV_0
INV 		i_sp1/Mcount_fifo_data_in_addr_xor<0>11_INV_0
INV 		i_sp1/Mcount_dcm_locked_cntr_xor<0>11_INV_0
INV 		i_sp0/fifo_data_in_addr_saved_sub0000<1>1_INV_0
INV 		i_sp0/Mcount_phase_hact_sel_xor<0>11_INV_0
INV 		i_sp0/Mcount_phase90sel_xor<0>11_INV_0
INV 		i_sp0/Mcount_fifo_data_in_addr_xor<0>11_INV_0
INV 		i_sp0/Mcount_dcm_locked_cntr_xor<0>11_INV_0
INV 		i_sdram_phase/Mcount_phase90sel_xor<0>11_INV_0
INV 		i_mcontr/i_mcontr_refresh/Mcount_ucntr_xor<0>11_INV_0
INV 		i_mcontr/i_mcontr_arbiter/Mcount_cntr_xor<0>11_INV_0
INV 		i_mcontr/i_channel5/Mcount_rq_cnt_xor<0>11_INV_0
INV 		i_mcontr/i_channel5/Maccum_nx_xor<1>11_INV_0
INV 		i_mcontr/i_channel4/Mcount_full_pages_in_buffer_xor<0>11_INV_0
INV 		i_mcontr/i_channel3/Mcount_rq_cnt_xor<0>11_INV_0
INV 		i_mcontr/i_channel2/Mcount_full_pages_in_buffer_xor<0>11_INV_0
INV 		i_mcontr/i_channel1/Mcount_rq_cnt_xor<0>11_INV_0
INV 		i_mcontr/i_channel0/Mcount_full_pages_in_buffer_xor<0>11_INV_0
INV 		i_i2csbr/Mcount_bcntr_xor<0>11_INV_0
INV 		i_dcm_359_2/dcm_done_mux00001_INV_0
INV 		Mcount_i2c_cnt_xor<0>11_INV_0
INV 		Mcount_dcm_s3_ph90_xor<0>11_INV_0
INV 		Mcount_dcm_s2_ph90_xor<0>11_INV_0
INV 		Mcount_dcm_s1_ph90_xor<0>11_INV_0
INV 		rst_inv1_INV_0
INV 		px_vact2_rnm0_inv1_INV_0
INV 		px_vact1_rnm0_inv1_INV_0
INV 		pre_ivact_inv1_INV_0
INV 		ipx_vact_direct_d_inv1_INV_0
INV 		i_sp2/dcm_fifo_locked_inv1_INV_0
INV 		i_sp1/dcm_fifo_locked_inv1_INV_0
INV 		i_sp0/dcm_fifo_locked_inv1_INV_0
INV 		pre_ihact_d_inv1_INV_0
INV 		ivact_inv1_INV_0
INV 		ipx_hact_direct_inv1_INV_0
INV 		i_sp2/dcm_in_locked<1>_inv1_INV_0
INV 		i_sp1/dcm_in_locked<1>_inv1_INV_0
INV 		i_sp0/dcm_in_locked<1>_inv1_INV_0
INV 		i_mcontr/i_mcontr_cmd/mancmd_stb_inv1_INV_0
INV 		i_mcontr/i_mcontr_cmd/init_chn<8>1_INV_0
INV 		i_mcontr/i_mcontr_cmd/init_chn<5>1_INV_0
INV 		i_mcontr/i_mcontr_cmd/init_chn<4>1_INV_0
INV 		i_mcontr/i_mcontr_arbiter/prestart_inv1_INV_0
INV 		i_i2csbr/i2c_active_inv1_INV_0
INV 		test_page_w_inv1_INV_0
INV 		ch2_wpage_last_inv1_INV_0
INV 		ch0_wpage_last_inv1_INV_0
INV 		pclk_inv1_INV_0
INV 		i_dcm_359_1/cmd<0>_inv2_INV_0
INV 		dcm_s3_incdec_inv2_INV_0
INV 		dcm_s2_incdec_inv2_INV_0
INV 		dcm_s1_incdec_inv2_INV_0
INV 		dcm2_incdec_inv2_INV_0
INV 		i_sp2/shact_inv1_INV_0
INV 		i_sp1/shact_inv1_INV_0
INV 		i_sp0/shact_inv1_INV_0
INV 		i_RUN_not00001_INV_0
INV 		ch3a_cmp_eq0000_inv1_INV_0
INV 		ch1a_cmp_eq0000_inv1_INV_0
INV 		i2c_aux_allow_not000111_INV_0

Section 6 - IOB Properties
--------------------------

+-------------------------------------------------------------------------------------------------------------------------------------------------+
| IOB Name                           | Type             | Direction | IO Standard          | Drive    | Slew | Reg (s)      | Resistor | IOB      |
|                                    |                  |           |                      | Strength | Rate |              |          | Delay    |
+-------------------------------------------------------------------------------------------------------------------------------------------------+
| ALWAYS0                            | IBUF             | INPUT     | LVCMOS25             |          |      |              | PULLDOWN | 0 / 0    |
| ARO                                | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| ARST                               | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| AUXSCL                             | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW |              | PULLUP   | 0 / 0    |
| AUXSDA                             | IOB              | BIDIR     | LVCMOS25             | 12       | SLOW |              | PULLUP   | 0 / 0    |
| BPF                                | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW |              |          | 0 / 0    |
| CLK0                               | IBUF             | INPUT     | LVCMOS25             |          |      |              |          | 0 / 0    |
| CLK1                               | IBUF             | INPUT     | LVCMOS25             |          |      |              |          | 0 / 0    |
| CLK2                               | IBUF             | INPUT     | LVCMOS25             |          |      |              |          | 0 / 0    |
| CNVCLK                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| CNVSYNC                            | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| DCLK                               | IBUF             | INPUT     | LVCMOS25             |          |      |              |          | 0 / 0    |
| HACT                               | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| LDQS                               | IOB              | OUTPUT    | SSTL2_I              |          |      | ODDR2        |          | 0 / 0    |
| MRST                               | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<0>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<1>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<2>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<3>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<4>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF2         |          | 0 / 3    |
| PXD1<5>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<6>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<7>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<8>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<9>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<10>                           | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD1<11>                           | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<0>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<1>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<2>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<3>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<4>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<5>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<6>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<7>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<8>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<9>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<10>                           | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD2<11>                           | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<0>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<1>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<2>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<3>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<4>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<5>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<6>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<7>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<8>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<9>                            | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<10>                           | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD3<11>                           | IBUF             | INPUT     | LVCMOS25             |          |      | IFF1         |          | 0 / 3    |
| PXD<0>                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| PXD<1>                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| PXD<2>                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| PXD<3>                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| PXD<4>                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| PXD<5>                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| PXD<6>                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| PXD<7>                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| PXD<8>                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| PXD<9>                             | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW | OFF1         |          | 0 / 0    |
| PX_ARO1                            | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | OFF1         |          | 0 / 0    |
| PX_ARO2                            | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | OFF1         |          | 0 / 0    |
| PX_ARO3                            | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | OFF1         |          | 0 / 0    |
| PX_ARST1                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | OFF1         |          | 0 / 0    |
| PX_ARST2                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | OFF1         |          | 0 / 0    |
| PX_ARST3                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | OFF1         |          | 0 / 0    |
| PX_DCLK1                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | ODDR2        |          | 0 / 0    |
| PX_DCLK2                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | ODDR2        |          | 0 / 0    |
| PX_DCLK3                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | ODDR2        |          | 0 / 0    |
| PX_HACT1                           | IBUF             | INPUT     | LVCMOS25             |          |      | IDDR2        |          | 0 / 3    |
| PX_HACT2                           | IBUF             | INPUT     | LVCMOS25             |          |      | IDDR2        |          | 0 / 3    |
| PX_HACT3                           | IBUF             | INPUT     | LVCMOS25             |          |      | IDDR2        |          | 0 / 3    |
| PX_MRST1                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | OFF1         |          | 0 / 0    |
| PX_MRST2                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | OFF1         |          | 0 / 0    |
| PX_MRST3                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW | OFF1         |          | 0 / 0    |
| PX_SCL1                            | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW |              | PULLUP   | 0 / 0    |
| PX_SCL2                            | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW |              | PULLUP   | 0 / 0    |
| PX_SCL3                            | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW |              | PULLUP   | 0 / 0    |
| PX_SDA1                            | IOB              | BIDIR     | LVCMOS25             | 12       | SLOW |              | PULLUP   | 0 / 0    |
| PX_SDA2                            | IOB              | BIDIR     | LVCMOS25             | 12       | SLOW |              | PULLUP   | 0 / 0    |
| PX_SDA3                            | IOB              | BIDIR     | LVCMOS25             | 12       | SLOW |              | PULLUP   | 0 / 0    |
| PX_VACT1                           | IBUF             | INPUT     | LVCMOS25             |          |      | IFF2         |          | 0 / 3    |
| PX_VACT2                           | IBUF             | INPUT     | LVCMOS25             |          |      | IDDR2        |          | 0 / 3    |
| PX_VACT3                           | IBUF             | INPUT     | LVCMOS25             |          |      | IDDR2        |          | 0 / 3    |
| RUN                                | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW |              |          | 0 / 0    |
| SCL0                               | IOB              | BIDIR     | LVCMOS25             | 4        | SLOW | IFF1         | PULLUP   | 0 / 3    |
| SDA0                               | IOB              | BIDIR     | LVCMOS25             | 4        | SLOW | IFF1         | PULLUP   | 0 / 3    |
| SDA<0>                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<1>                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<2>                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<3>                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<4>                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<5>                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<6>                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<7>                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<8>                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<9>                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<10>                            | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<11>                            | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<12>                            | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<13>                            | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDA<14>                            | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDCAS                              | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDCLK                              | DIFFM            | OUTPUT    | DIFF_SSTL2_I         |          |      |              |          | 0 / 0    |
| SDCLKE                             | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SDCLK_FB                           | DIFFSI           | INPUT     | DIFF_SSTL2_I         |          |      |              |          | 0 / 0    |
| SDD<0>                             | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<1>                             | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<2>                             | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<3>                             | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<4>                             | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<5>                             | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<6>                             | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<7>                             | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<8>                             | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<9>                             | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<10>                            | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<11>                            | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<12>                            | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<13>                            | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<14>                            | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDD<15>                            | IOB              | BIDIR     | SSTL2_I              |          |      | IDDR2        |          | 0 / 0    |
|                                    |                  |           |                      |          |      | ODDR2        |          |          |
|                                    |                  |           |                      |          |      | TFF1         |          |          |
| SDLDM                              | IOB              | OUTPUT    | SSTL2_I              |          |      | ODDR2        |          | 0 / 0    |
| SDNCLK                             | DIFFS            | OUTPUT    | DIFF_SSTL2_I         |          |      |              |          | 0 / 0    |
| SDNCLK_FB                          | DIFFMI           | INPUT     | DIFF_SSTL2_I         |          |      |              |          | 0 / 0    |
| SDRAS                              | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF2         |          | 0 / 0    |
| SDUDM                              | IOB              | OUTPUT    | SSTL2_I              |          |      | ODDR2        |          | 0 / 0    |
| SDWE                               | IOB              | OUTPUT    | SSTL2_I              |          |      | OFF1         |          | 0 / 0    |
| SENSPGM1                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW |              |          | 0 / 0    |
| SENSPGM2                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW |              |          | 0 / 0    |
| SENSPGM3                           | IOB              | OUTPUT    | LVCMOS25             | 12       | SLOW |              |          | 0 / 0    |
| UDQS                               | IOB              | OUTPUT    | SSTL2_I              |          |      | ODDR2        |          | 0 / 0    |
| VACT                               | IOB              | OUTPUT    | LVCMOS25             | 4        | SLOW |              |          | 0 / 0    |
+-------------------------------------------------------------------------------------------------------------------------------------------------+

Section 7 - RPMs
----------------

Section 8 - Guide Report
------------------------
Guide not run on this design.

Section 9 - Area Group and Partition Summary
--------------------------------------------

Partition Implementation Status
-------------------------------

  No Partitions were found in this design.

-------------------------------

Area Group Information
----------------------

  No area groups were found in this design.

----------------------

Section 10 - Modular Design Summary
-----------------------------------
Modular Design not used for this design.

Section 11 - Timing Report
--------------------------
A logic-level (pre-route) timing report can be generated by using Xilinx static
timing analysis tools, Timing Analyzer (GUI) or TRCE (command line), with the
mapped NCD and PCF files. Please note that this timing report will be generated
using estimated delay information. For accurate numbers, please generate a
timing report with the post Place and Route NCD file.

For more information about the Timing Analyzer, consult the Xilinx Timing
Analyzer Reference Manual; for more information about TRCE, consult the Xilinx
Development System Reference Guide "TRACE" chapter.

Section 12 - Configuration String Details
-----------------------------------------
BUFGMUX "BUFGMUX_inst":
DISABLE_ATTR:LOW



RAMB16 "TEST_RAMB16_S18_S18":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:1024X18
WRITEMODEB:WRITE_FIRST
INIT_B = 00000
SRVAL_B = 00000


BUFGMUX "i_dcm_359_1/i_clk0a":
DISABLE_ATTR:LOW



BUFGMUX "i_dcm_359_1/i_clk270":
DISABLE_ATTR:LOW



DCM "i_dcm_359_1/i_dcm_sensor":
CLKDV_DIVIDE:2
CLKOUT_PHASE_SHIFT:VARIABLE
CLK_FEEDBACK:1X
DESKEW_ADJUST:7
DFS_FREQUENCY_MODE:LOW
DLL_FREQUENCY_MODE:LOW
DUTY_CYCLE_CORRECTION:TRUE
FACTORY_JF1:0XC0
FACTORY_JF2:0X80
CLKFX_DIVIDE = 1
CLKFX_MULTIPLY = 4
PHASE_SHIFT = 0
X_CLKIN_PERIOD = 10.0000000000000000


DCM "i_dcm_359_2/i_dcm2":
CLKDV_DIVIDE:2
CLKOUT_PHASE_SHIFT:VARIABLE
CLK_FEEDBACK:1X
DESKEW_ADJUST:7
DFS_FREQUENCY_MODE:LOW
DLL_FREQUENCY_MODE:LOW
DUTY_CYCLE_CORRECTION:TRUE
FACTORY_JF1:0XC0
FACTORY_JF2:0X80
CLKFX_DIVIDE = 1
CLKFX_MULTIPLY = 4
PHASE_SHIFT = 0
X_CLKIN_PERIOD = 8.3333300000000001


RAMB16 "i_mcontr/i_channel0/i_buf_0":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel0/i_buf_1":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel1/i_buf_0":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel1/i_buf_1":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel1/i_buf_2":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel1/i_buf_3":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel2/i_buf_0":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel2/i_buf_1":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel3/i_buf_0":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel3/i_buf_1":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel3/i_buf_2":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel3/i_buf_3":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel4/i_buf_0":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel4/i_buf_1":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


RAMB16 "i_mcontr/i_channel5/i_buf_0":
INITP_00 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_01 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_02 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_03 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_04 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_05 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_06 = 0000000000000000000000000000000000000000000000000000000000000000
INITP_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_00 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_01 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_02 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_03 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_04 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_05 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_06 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_07 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_08 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_09 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_0f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_10 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_11 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_12 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_13 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_14 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_15 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_16 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_17 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_18 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_19 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_1f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_20 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_21 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_22 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_23 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_24 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_25 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_26 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_27 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_28 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_29 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_2f = 0000000000000000000000000000000000000000000000000000000000000000
INIT_30 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_31 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_32 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_33 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_34 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_35 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_36 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_37 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_38 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_39 = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3a = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3b = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3c = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3d = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3e = 0000000000000000000000000000000000000000000000000000000000000000
INIT_3f = 0000000000000000000000000000000000000000000000000000000000000000
PORTA_ATTR:1024X18
WRITEMODEA:WRITE_FIRST
INIT_A = 00000
SRVAL_A = 00000
PORTB_ATTR:512X36
WRITEMODEB:WRITE_FIRST
INIT_B = 000000000
SRVAL_B = 000000000


BUFGMUX "i_pclk":
DISABLE_ATTR:LOW



DCM "i_sp0/i_dcm_sensor":
CLKDV_DIVIDE:2
CLKOUT_PHASE_SHIFT:VARIABLE
CLK_FEEDBACK:1X
DESKEW_ADJUST:7
DFS_FREQUENCY_MODE:LOW
DLL_FREQUENCY_MODE:LOW
DUTY_CYCLE_CORRECTION:TRUE
FACTORY_JF1:0XC0
FACTORY_JF2:0X80
CLKFX_DIVIDE = 1
CLKFX_MULTIPLY = 4
PHASE_SHIFT = 0
X_CLKIN_PERIOD = 10.0000000000000000


BUFGMUX "i_sp0/i_pclk":
DISABLE_ATTR:LOW



DCM "i_sp1/i_dcm_sensor":
CLKDV_DIVIDE:2
CLKOUT_PHASE_SHIFT:VARIABLE
CLK_FEEDBACK:1X
DESKEW_ADJUST:7
DFS_FREQUENCY_MODE:LOW
DLL_FREQUENCY_MODE:LOW
DUTY_CYCLE_CORRECTION:TRUE
FACTORY_JF1:0XC0
FACTORY_JF2:0X80
CLKFX_DIVIDE = 1
CLKFX_MULTIPLY = 4
PHASE_SHIFT = 0
X_CLKIN_PERIOD = 10.0000000000000000


BUFGMUX "i_sp1/i_pclk":
DISABLE_ATTR:LOW



DCM "i_sp2/i_dcm_sensor":
CLKDV_DIVIDE:2
CLKOUT_PHASE_SHIFT:VARIABLE
CLK_FEEDBACK:1X
DESKEW_ADJUST:7
DFS_FREQUENCY_MODE:LOW
DLL_FREQUENCY_MODE:LOW
DUTY_CYCLE_CORRECTION:TRUE
FACTORY_JF1:0XC0
FACTORY_JF2:0X80
CLKFX_DIVIDE = 1
CLKFX_MULTIPLY = 4
PHASE_SHIFT = 0
X_CLKIN_PERIOD = 10.0000000000000000


BUFGMUX "i_sp2/i_pclk":
DISABLE_ATTR:LOW



BUFGMUX "iaro_BUFG":
DISABLE_ATTR:LOW




Section 13 - Control Set Information
------------------------------------
No control set information for this architecture.

Section 14 - Utilization by Hierarchy
-------------------------------------
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| Module             | Partition | Slices        | Slice Reg     | LUTs          | LUTRAM        | BRAM      | MULT18X18 | BUFG  | DCM   | Full Hierarchical Name                         |
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
| x359/              |           | 2246/3693     | 2005/3291     | 2519/3728     | 0/91          | 1/16      | 0/0       | 3/8   | 0/5   | x359                                           |
| +i_SDA             |           | 0/15          | 0/15          | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA                                     |
| ++i_q0             |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q0                                |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q0/i_q                            |
| ++i_q1             |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q1                                |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q1/i_q                            |
| ++i_q10            |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q10                               |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q10/i_q                           |
| ++i_q11            |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q11                               |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q11/i_q                           |
| ++i_q12            |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q12                               |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q12/i_q                           |
| ++i_q13            |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q13                               |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q13/i_q                           |
| ++i_q14            |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q14                               |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q14/i_q                           |
| ++i_q2             |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q2                                |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q2/i_q                            |
| ++i_q3             |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q3                                |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q3/i_q                            |
| ++i_q4             |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q4                                |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q4/i_q                            |
| ++i_q5             |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q5                                |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q5/i_q                            |
| ++i_q6             |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q6                                |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q6/i_q                            |
| ++i_q7             |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q7                                |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q7/i_q                            |
| ++i_q8             |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q8                                |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q8/i_q                            |
| ++i_q9             |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q9                                |
| +++i_q             |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDA/i_q9/i_q                            |
| +i_SDCAS           |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDCAS                                   |
| ++i_q              |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDCAS/i_q                               |
| +i_SDDd            |           | 0/96          | 0/96          | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd                                    |
| ++i_dq0            |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq0                              |
| ++i_dq1            |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq1                              |
| ++i_dq10           |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq10                             |
| ++i_dq11           |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq11                             |
| ++i_dq12           |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq12                             |
| ++i_dq13           |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq13                             |
| ++i_dq14           |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq14                             |
| ++i_dq15           |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq15                             |
| ++i_dq2            |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq2                              |
| ++i_dq3            |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq3                              |
| ++i_dq4            |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq4                              |
| ++i_dq5            |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq5                              |
| ++i_dq6            |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq6                              |
| ++i_dq7            |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq7                              |
| ++i_dq8            |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq8                              |
| ++i_dq9            |           | 6/6           | 6/6           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDDd/i_dq9                              |
| +i_SDLDM           |           | 0/2           | 0/3           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDLDM                                   |
| ++i_dq             |           | 2/2           | 3/3           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDLDM/i_dq                              |
| +i_SDRAS           |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDRAS                                   |
| ++i_q              |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDRAS/i_q                               |
| +i_SDUDM           |           | 0/2           | 0/3           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDUDM                                   |
| ++i_dq             |           | 2/2           | 3/3           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDUDM/i_dq                              |
| +i_SDWE            |           | 0/1           | 0/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDWE                                    |
| ++i_q              |           | 1/1           | 1/1           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_SDWE/i_q                                |
| +i_dcm_359_1       |           | 12/12         | 16/16         | 15/15         | 0/0           | 0/0       | 0/0       | 2/2   | 1/1   | x359/i_dcm_359_1                               |
| +i_dcm_359_2       |           | 3/3           | 1/1           | 3/3           | 0/0           | 0/0       | 0/0       | 0/0   | 1/1   | x359/i_dcm_359_2                               |
| +i_i2csbr          |           | 55/55         | 56/56         | 45/45         | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_i2csbr                                  |
| +i_mcontr          |           | 145/813       | 60/655        | 228/823       | 0/7           | 0/15      | 0/0       | 0/0   | 0/0   | x359/i_mcontr                                  |
| ++i_channel0       |           | 66/66         | 67/67         | 57/57         | 0/0           | 2/2       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_channel0                       |
| ++i_channel1       |           | 67/67         | 67/67         | 55/55         | 0/0           | 4/4       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_channel1                       |
| ++i_channel2       |           | 68/68         | 68/68         | 57/57         | 0/0           | 2/2       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_channel2                       |
| ++i_channel3       |           | 72/72         | 68/68         | 55/55         | 0/0           | 4/4       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_channel3                       |
| ++i_channel4       |           | 68/68         | 67/67         | 57/57         | 0/0           | 2/2       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_channel4                       |
| ++i_channel5       |           | 54/54         | 61/61         | 39/39         | 0/0           | 1/1       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_channel5                       |
| ++i_mcontr_arbiter |           | 51/52         | 48/48         | 44/45         | 0/1           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_arbiter                 |
| +++i_sddo_sel_stb  |           | 1/1           | 0/0           | 1/1           | 1/1           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_arbiter/i_sddo_sel_stb  |
| ++i_mcontr_cmd     |           | 32/32         | 34/34         | 17/17         | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_cmd                     |
| ++i_mcontr_line_rd |           | 79/82         | 39/39         | 81/84         | 0/3           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_line_rd                 |
| +++i_pre6rd        |           | 1/1           | 0/0           | 1/1           | 1/1           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_line_rd/i_pre6rd        |
| +++i_predrun_off   |           | 1/1           | 0/0           | 1/1           | 1/1           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_line_rd/i_predrun_off   |
| +++i_predrun_on    |           | 1/1           | 0/0           | 1/1           | 1/1           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_line_rd/i_predrun_on    |
| ++i_mcontr_line_wr |           | 75/78         | 43/43         | 86/89         | 0/3           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_line_wr                 |
| +++i_drive_sd3_off |           | 1/1           | 0/0           | 1/1           | 1/1           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_line_wr/i_drive_sd3_off |
| +++i_pre6wr        |           | 1/1           | 0/0           | 1/1           | 1/1           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_line_wr/i_pre6wr        |
| +++i_predrun_off   |           | 1/1           | 0/0           | 1/1           | 1/1           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_line_wr/i_predrun_off   |
| ++i_mcontr_refresh |           | 29/29         | 33/33         | 40/40         | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_mcontr/i_mcontr_refresh                 |
| +i_sddqs           |           | 2/2           | 2/2           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sddqs                                   |
| ++i_dqsl           |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sddqs/i_dqsl                            |
| ++i_dqsu           |           | 0/0           | 0/0           | 0/0           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sddqs/i_dqsu                            |
| +i_sdram_phase     |           | 8/8           | 5/5           | 6/6           | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sdram_phase                             |
| +i_sp0             |           | 130/144       | 147/147       | 71/99         | 0/28          | 0/0       | 0/0       | 1/1   | 1/1   | x359/i_sp0                                     |
| ++i_fifo_data_vact |           | 12/12         | 0/0           | 24/24         | 24/24         | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sp0/i_fifo_data_vact                    |
| ++i_fifo_hact_vact |           | 2/2           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sp0/i_fifo_hact_vact                    |
| +i_sp1             |           | 125/139       | 137/137       | 75/103        | 0/28          | 0/0       | 0/0       | 1/1   | 1/1   | x359/i_sp1                                     |
| ++i_fifo_data_vact |           | 12/12         | 0/0           | 24/24         | 24/24         | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sp1/i_fifo_data_vact                    |
| ++i_fifo_hact_vact |           | 2/2           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sp1/i_fifo_hact_vact                    |
| +i_sp2             |           | 130/144       | 137/137       | 76/104        | 0/28          | 0/0       | 0/0       | 1/1   | 1/1   | x359/i_sp2                                     |
| ++i_fifo_data_vact |           | 12/12         | 0/0           | 24/24         | 24/24         | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sp2/i_fifo_data_vact                    |
| ++i_fifo_hact_vact |           | 2/2           | 0/0           | 4/4           | 4/4           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sp2/i_fifo_hact_vact                    |
| +i_sync_frames     |           | 9/9           | 10/10         | 11/11         | 0/0           | 0/0       | 0/0       | 0/0   | 0/0   | x359/i_sync_frames                             |
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

* Slices can be packed with basic elements from multiple hierarchies.
  Therefore, a slice will be counted in every hierarchical module
  that each of its packed basic elements belong to.
** For each column, there are two numbers reported <A>/<B>.
   <A> is the number of elements that belong to that specific hierarchical module.
   <B> is the total number of elements from that hierarchical module and any lower level
   hierarchical modules below.
*** The LUTRAM column counts all LUTs used as memory including RAM, ROM, and shift registers.