Commit ff84b914 authored by Andrey Filippov's avatar Andrey Filippov

Updating to use separate "label" and "tooltip" attributes

parent 5c4264fe
......@@ -41,7 +41,7 @@
icon="xilinx.png"
call="VivadoUnisims"/>
<menuitem name="Vivado Server"
label="Run remote Vivado session"
label="Start remote Vivado session"
icon="xilinx.png"
call="Vivado"/>
<menuitem name="Vivado Test"
......@@ -49,7 +49,7 @@
icon="my_tool.gif"
call="VivadoTest"/>
<menuitem name="VivadoSynthesis"
label="Run Vivado synthesis"
label="Synthesise design"
icon="xilinx.png"
call="VivadoSynthesis"/>
<menuitem name="VivadoOptPlace"
......
......@@ -8,123 +8,119 @@
<!-- typedef -->
</interface>
<package name="FPGA_package"
label="Common parameters for all FPGA projects"
label="Common parameters for FPGA projects"
interface="FPGAPprojectInterface">
<parameter id="RemoteHost" label="Remote Host IP" type="String"
<parameter id="RemoteHost" label="Remote Host IP" tooltip="Remote Host IP" type="String"
format="CopyValue" default="192.168.0.122" readonly="false" visible="true" />
<parameter id="RemoteUser" label="Remote user name" type="String"
<parameter id="RemoteUser" label="Remote user name" tooltip="Remote user name" type="String"
format="CopyValue" default="xilinx" readonly="false" visible="true" />
<parameter id="PreSSH" label="pre-ssh shell parameters"
<parameter id="PreSSH" label="pre-ssh" tooltip="pre-ssh shell parameters"
type="String" format="CopyValue" default="" readonly="false" visible="true" />
<parameter id="ShellSwitches" label="Shell switches" type="String"
<parameter id="ShellSwitches" label="Shell switch" tooltip="Shell switches" type="String"
format="CopyValue" default="-c" readonly="false" visible="true" />
<parameter id="TerminalMode" type="BoolYesNo" format="None"
default="false" label="Force terminal mode for the remote program" />
default="false" label="Force terminal mode" tooltip="Force terminal mode for the remote program" />
<parameter id="SSHSwitches" label="Other ssh switches"
<parameter id="SSHSwitches" label="ssh switches" tooltip="Other ssh switches"
type="String" format="CopyValue" default="" readonly="false" visible="true" />
<parameter id="VivadoRelease" label="Vivado release number (part of the path)"
<parameter id="VivadoRelease" label="Vivade release" tooltip="Vivado release number (part of the path)"
type="String" format="CopyValue" default="2013.4" readonly="false"
visible="true" />
<parameter id="VivadoInstallationRoot" label="Vivado Installation Root"
<parameter id="VivadoInstallationRoot" label="Vivado root" tooltip="Vivado Installation Root"
type="String" format="CopyValue" default="/opt/Xilinx/Vivado" readonly="false"
visible="true" />
<parameter id="VivadoRelativeExeOptions" label="Vivado relative executable path and options"
<parameter id="VivadoRelativeExeOptions" label="Vivado launch command" tooltip="Vivado relative executable path and command options"
type="String" format="CopyValue" default="bin/vivado -mode tcl" readonly="false"
visible="true" />
<parameter id="VivadoUnisimsPath" label="Relative location of Xilinx unisims library"
<parameter id="VivadoUnisimsPath" label="unisims location" tooltip="Relative location of Xilinx unisims library"
type="String" format="CopyValue" default="data/verilog/src" readonly="false"
visible="true" />
<!-- /opt/Xilinx/Vivado/2013.4/bin/vivado -mode tcl -->
<parameter id="RemoteCommand" label="Remote ssh command"
<parameter id="RemoteCommand" label="Remote command" tooltip="Remote ssh command"
type="String" format="CopyValue"
default="%VivadoInstallationRoot/%VivadoRelease/%VivadoRelativeExeOptions"
readonly="true"
visible="true" />
<parameter id="VivadoUnisimsAbsolutePath" label="Full path of Xilinx unisims primitives library"
<parameter id="VivadoUnisimsAbsolutePath" label="Full unisims path" tooltip="Full path of Xilinx unisims primitives library"
type="String" format="CopyValue"
default="%VivadoInstallationRoot/%VivadoRelease/%VivadoUnisimsPath"
readonly="true"
visible="true" />
<parameter id="SSHExtra" label="ssh extra parameters" type="String"
<parameter id="SSHExtra" label="ssh extra parameters" tooltip="ssh extra parameters" type="String"
format="CopyValue" default="" readonly="false" visible="true" />
<parameter id="VivadoConsole" default="Vivado" label="Vivado console name"
<parameter id="VivadoConsole" default="Vivado" label="Vivado console name" tooltip="Vivado console name in Eclipse, used by other tools"
type="String" format="CopyValue" visible="true" readonly="false"/>
<!--
-->
<input>
<group name="VivadoServer" label="Vivado server setup">
"RemoteHost"
"RemoteUser"
"VivadoRelease"
"VivadoInstallationRoot"
</group>
<group name="Advanced" label="Vivado server advanced setup">
"TerminalMode"
"ShellSwitches"
"PreSSH"
"SSHSwitches"
"SSHExtra"
"VivadoConsole"
"VivadoRelease"
"VivadoInstallationRoot"
"VivadoRelativeExeOptions"
"VivadoUnisimsPath"
"RemoteCommand"
"VivadoUnisimsAbsolutePath"
</group>
</input>
</package>
<project name="FPGA_project" label="Project parameters for FPGA_project"
package="FPGA_package"
interface="FPGAPprojectInterface">
<!-- Simulation parameters -->
<parameter id="SimulationTopFile" label="Project top simulation file"
<parameter id="SimulationTopFile" label="Top simulation file" tooltip="Project top simulation file"
type="Filename" default="" format="CopyValue"
readonly="false" />
<parameter id="SimulationTopModule" label="Project top simulation module"
<parameter id="SimulationTopModule" label="Simulation top module" tooltip="Project top simulation module"
type="String" default="" format="CopyValue" readonly="false" />
<parameter id="ImplementationTopFile" label="Project file with top implementation module"
<parameter id="ImplementationTopFile" label="Implementation top module" tooltip="Project file with top implementation module"
type="Filename" default="" format="CopyValue" readonly="false" />
<parameter id="SimulDir" label="project simulation directory"
<parameter id="SimulDir" label="Simulation directory" tooltip="Project simulation directory"
type="Pathname" default="simulation" format="CopyValue" readonly="false" />
<!-- Vivado parameters -->
<parameter id="part" label= "Xilinx device to use"
<parameter id="part" label="Device" tooltip= "FPGA part number (device) to use"
default="" visible="true" omit="" type="String" format="Dash"/>
<parameter id="VivadoProjectRoot" label="Relative (to user home directory) path of the workspace on Vivado server"
<parameter id="VivadoProjectRoot" label="Workspace directory" tooltip="Relative (to user home directory) path of the workspace on Vivado server"
type="String" default="vdt" format="RemoteRootSyntax" readonly="false" />
<parameter id="VivadoLocalDir" label="Project subdirectroy for Vivado files"
<parameter id="VivadoLocalDir" label="Local Xilinx directory" tooltip="Local project subdirectroy for Xilinx Vivado generated files"
type="Pathname" default="vivado" format="CopyValue" readonly="false" />
<parameter id="VivadoIgnoreSource" label="Ignore source files that match this regular expression"
<parameter id="VivadoIgnoreSource" label="Ignore source files" tooltip="Pattern to ignore source files that match this regular expression"
type="String" default=".*unisims.*" format="CopyValue" readonly="false" />
<!-- Calculated -->
<parameter id="VivadoProjectRoot" label="Relative (to user home directory) path of the project on Vivado server"
type="String" default="vdt" format="RemoteRootSyntax" readonly="false" />
<!-- <parameter id="VivadoProjectRoot" label="" tooltip="Relative (to user home directory) path of the project on Vivado server"
type="String" default="vdt" format="RemoteRootSyntax" readonly="false" /> -->
<parameter id="SnapshotSynth"
label="name of Vivado snapshot archive after synthesis"
label="Synthesis snapshot" tooltip="Name of Vivado snapshot archive after synthesis"
default="%%ProjectName-synth.dcp"
type="String" format="CopyValue" />
<parameter id="SnapshotOptPlace"
label="name of Vivado snapshot archive after optimization/placement"
label="Placement snapshot" tooltip="Name of Vivado snapshot archive after optimization/placement"
default="%%ProjectName-opt-pace.dcp"
type="String" format="CopyValue" />
......@@ -136,7 +132,7 @@
<parameter id="SimulDirSlash" type="Pathname" visible="false"
default="?%SimulDir=:,%SimulDir/" format="CopyValue"/>
<parameter id="SedPaths" type="String" format="CopyValue"
label="Remote file prefix to be removed for the local error parser"
label="sed commaaand line" tooltip="Remote file prefix to be removed for the local error parser"
default="sed -u 's@/home/%RemoteUser/%VivadoProjectRoot/%%ProjectName/@@'"/>
......@@ -164,4 +160,3 @@
</output>
</project>
</vdt-project>
<!-- "| sed -u 's@/home/xilinx/vdt/npmtest/@@'" -->
\ No newline at end of file
......@@ -2,9 +2,9 @@
<vdt-project>
<interface name="VivadoInterface" extends="FPGAPprojectInterface">
<syntax name="QuietSyntax" format=" -quiet" />
<!-- <syntax name="QuietSyntax" format=" -quiet" />
<syntax name="VerboseSyntax" format=" -verbose" />
<syntax name="DirectiveSyntax" format=" -directive %%ParamValue" />
<syntax name="DirectiveSyntax" format=" -directive %%ParamValue" /> -->
<!--
......
......@@ -11,6 +11,7 @@
</action-menu>
<input>
<group name="General">
"RemoteCommand"
</group>
</input>
......
......@@ -57,27 +57,27 @@
<action-menu>
<action label="Optimize and Place" resource="" icon="xilinx.png" />
</action-menu>
<parameter id="FromMemory" tooltip="Do not load snapshot created after synthesis" label="Run from memory"
<parameter id="FromMemory" label="Run from memory" tooltip="Do not load snapshot created after synthesis"
default="false" type= "Boolean" format="None"/>
<parameter id="SkipPreOptimization" label="Do not run pre optimization TCL commands"
<parameter id="SkipPreOptimization" label="Skip pre-optimization" tooltip="Do not run pre optimization TCL commands"
default="false" type= "Boolean" format="None"/>
<parameter id="SkipOptimization" label="Do not run opt_design"
<parameter id="SkipOptimization" label="Skip optimize" tooltip="Do not run opt_design"
default="false" type= "Boolean" format="None"/>
<parameter id="SkipPowerOptimization" label="Do not run power_opt_design"
<parameter id="SkipPowerOptimization" label="skip power optimize" tooltip="Do not run power_opt_design"
default="false" type= "Boolean" format="None"/>
<parameter id="SkipPlacement" label="Do not run place_design"
<parameter id="SkipPlacement" label="Skip place" tooltip="Do not run place_design"
default="false" type= "Boolean" format="None"/>
<parameter id="SkipPhysOpt" label="Do not run phys_opt_design"
<parameter id="SkipPhysOpt" label="Skip physical optimize" tooltip="Do not run phys_opt_design"
default="false" type= "Boolean" format="None"/>
<parameter id="SkipSnapshotPlace" label="Do not create snapshot after placement"
<parameter id="SkipSnapshotPlace" label="Skip snapshot save" tooltip="Do not create snapshot after placement"
default="false" type= "Boolean" format="None"/>
<!-- left from synthesis, may need update-->
<parameter id="ShowWarnings" label="Parse warning messages"
<parameter id="ShowWarnings" label="Parse warnings" tooltip="Parse warning messages"
default="true"
type= "Boolean" format="None"/>
<parameter id="ShowInfo" label="Parse info messages"
<parameter id="ShowInfo" label="Parse info" tooltip="Parse info messages"
default="true"
type= "Boolean" format="None"/>
<parameter id="PreGrepW" visible="false"
......@@ -86,94 +86,91 @@
<parameter id="PreGrepI" visible="false"
type="String" format="None"
default="?%ShowInfo=true: |INFO, "/>
<parameter id="GrepEWI" label="Grep filter"
<parameter id="GrepEWI" label="Grep filter" tooltip="Calculated grep filter"
default="grep --line-buffered -E 'ERROR%PreGrepW%PreGrepI'"
type="String" format="CopyValue"
visible="true" readonly="true"/>
<parameter id="PreOptTCL" label="TCL commands to run before opt_design"
<parameter id="PreOptTCL" label="Pre-optimize TCL commands" tooltip="TCL commands to run before opt_design"
type="Stringlist" format="ProgramSyntax" default="" omit=""
readonly="false" visible="true" />
<!-- opt_design arguments -->
<parameter id="retarget" label= "Retarget"
<parameter id="directive_opt" outid="directive" label="Directive" tooltip= "Mode of behaviour for opt_design command, not compatible with individual optimization settings."
default="Default" visible="true" omit="off" type="OptDirectiveType" format="Dash"/>
<parameter id="retarget" label="Retarget" tooltip= "Retarget block types when using different part"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="propconst" label= "Propagate constants across leaf-level instances"
<parameter id="propconst" label="Propagate constants" tooltip= "Propagate constants across leaf-level instances"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="sweep" label= "Remove unconnected leaf-level instances"
<parameter id="sweep" label="Remove unconnected instances" tooltip= "Remove unconnected leaf-level instances"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="bram_power_opt" label= "Retarget"
<parameter id="bram_power_opt" label="Optimize BRAM" tooltip= "Power optimization of BRAM cells - changes WRITE_MODE and clock gating"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="remap" label= "Remap logic optimally in LUTs"
<parameter id="remap" label="Remap LUTs" tooltip= "Remap logic optimally in LUTs"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="resynth_area" label= "Resynthesis"
<parameter id="resynth_area" label="Re-synthesis in area mode" tooltip= " Perform re-synthesis in area mode to reduce the number of LUTs."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="resynth_seq_area" label= "Resynthesis (with Sequential optimizations)"
<parameter id="resynth_seq_area" label="Re-synthesis with sequential" tooltip= "Re-synthesis with both combinatorial and sequential optimizations)."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="directive_opt" label= "Mode of behaviour for opt_design command"
default="Default" visible="true" omit="off" type="OptDirectiveType" format="DirectiveSyntax"/>
<parameter id="quiet_opt" label= "Ignore errors, return TCL_OK in any case"
default="false" visible="true" omit="false" type="Boolean" format="QuietSyntax"/>
<parameter id="verbose_opt" label= "Temporarily override message limits set with set_msg_config"
default="false" visible="true" omit="false" type="Boolean" format="VerboseSyntax"/>
<parameter id="quiet_opt" outid="quiet" label="Quiet" tooltip= "Ignore errors, return TCL_OK in any case"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="verbose_opt" outid="verbose" label="verbose" tooltip= "Temporarily override message limits set with set_msg_config"
default="false" visible="true" omit="False" type="Boolean" format="DashName"/>
<!-- power_opt_design arguments -->
<parameter id="quiet_pwr_opt" label= "Ignore errors, return TCL_OK in any case"
default="false" visible="true" omit="false" type="Boolean" format="QuietSyntax"/>
<parameter id="verbose_pwr_opt" label= "Temporarily override message limits set with set_msg_config"
default="false" visible="true" omit="false" type="Boolean" format="VerboseSyntax"/>
<parameter id="quiet_pwr_opt" outid="quiet" label="Quiet" tooltip= "Ignore errors, return TCL_OK in any case"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="verbose_pwr_opt" outid="verbose" label="Verbose" tooltip= "Temporarily override message limits set with set_msg_config"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<!-- place_design arguments -->
<!-- No support yet for "-cells" to limit placement to selected cells. Will require multiple runs with
different settings. Can probably create several pages of parameters alternatives for that purpose
and then run "placement - alt1", "placement - alt2", ... -->
<parameter id="directive_place" label= "Placement algorithm mode (not compatible with other specific options)"
default="Default" visible="true" omit="off" type="PlaceDirectiveType" format="DirectiveSyntax"/>
<parameter id="no_timing_driven" label= "Disables the default timing driven placement algorithm."
<parameter id="directive_place" outid="directive" label="Directive" tooltip= "Placement algorithm mode (not compatible with other specific options)"
default="Default" visible="true" omit="off" type="PlaceDirectiveType" format="Dash"/>
<parameter id="no_timing_driven" label="No timing-driven" tooltip= "Disables the default timing driven placement algorithm."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="unplace" label= "Unplace all the instances which are not locked by constraints."
<parameter id="unplace" label="Unplace" tooltip= "Unplace all the instances which are not locked by constraints."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="post_place_opt" label= "Run optimization after placement to improve critical path timing."
<parameter id="post_place_opt" label="Post-placement" tooltip= "Run optimization after placement to improve critical path timing."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="quiet_place" outid="quiet" label="Quiet" tooltip= "Ignore errors, return TCL_OK in any case"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="verbose_place" outid="verbose" label="Verbose" tooltip= "Temporarily override message limits set with set_msg_config"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="quiet_place" label= "Ignore errors, return TCL_OK in any case"
default="false" visible="true" omit="false" type="Boolean" format="QuietSyntax"/>
<parameter id="verbose_place" label= "Temporarily override message limits set with set_msg_config"
default="false" visible="true" omit="false" type="Boolean" format="VerboseSyntax"/>
<!-- phys_opt_design arguments -->
<!-- TODO: Make a separate command with several different settings sets -->
<parameter id="directive_phys_opt" label= "Placement algorithm mode (not compatible with other specific options)"
default="Default" visible="true" omit="off" type="PhysOptDirectiveType" format="DirectiveSyntax"/>
<parameter id="fanout_opt" label= "Delay-driven optimization on high-fanout timing critical nets by replicating drivers."
<parameter id="directive_phys_opt" outid="directive" label="Directive" tooltip= "Placement algorithm mode (not compatible with other specific options)"
default="Default" visible="true" omit="off" type="PhysOptDirectiveType" format="Dash"/>
<parameter id="fanout_opt" label="Fanout optimization" tooltip= "Delay-driven optimization on high-fanout timing critical nets by replicating drivers."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="placement_opt" label= "Move cells to reduce delay on timing-critical nets."
<parameter id="placement_opt" label="Placement optimization" tooltip= "Move cells to reduce delay on timing-critical nets."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="rewire" label= "Refactor logic cones to reduce logic levels and reduce delay on critical signals."
<parameter id="rewire" label="Rewire" tooltip= "Refactor logic cones to reduce logic levels and reduce delay on critical signals."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="critical_cell_opt" label= "Replicate cells on timing critical nets to reduce delays."
<parameter id="critical_cell_opt" label="Replicate cells" tooltip= "Replicate cells on timing critical nets to reduce delays."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="dsp_register_opt" label= "Improve critical path delay by moving registers from slices to DSP or from DSP to slices."
<parameter id="dsp_register_opt" label="DSP register optimization" tooltip= "Improve critical path delay by moving registers from slices to DSP or from DSP to slices."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="bram_register_opt" label= "Improve critical path delay by moving registers from slices to BRAM or from BRAM to slices."
<parameter id="bram_register_opt" label="BRAM register optimization" tooltip= "Improve critical path delay by moving registers from slices to BRAM or from BRAM to slices."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="bram_enable_opt" label= "Selectively reverses power optimization for enable logic of BRAMs."
<parameter id="bram_enable_opt" label="BRAM clock enable optimization" tooltip= "Selectively reverses power optimization for enable logic of BRAMs."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="shift_register_opt" label= "Eextract beginnning/end FF from SLR to improve timing"
<parameter id="shift_register_opt" label="Shift register optimization" tooltip= "Eextract beginnning/end FF from SLR to improve timing"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="hold_fix" label= "Insert data path delay to fix hold time violations."
<parameter id="hold_fix" label="Hold violations fix" tooltip= "Insert data path delay to fix hold time violations."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="retime" label= "Move registers through combinatorial fabric."
<parameter id="retime" label="Move registers" tooltip= "Move registers through combinatorial fabric."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<!-- TODO: Implement force_replication_on_nets args (requires? get_nets command ) -->
<parameter id="critical_pin_opt" label= "Swap LUT pins to improve critical path timimg."
<parameter id="critical_pin_opt" label="Swap LUT pins" tooltip= "Swap LUT pins to improve critical path timimg."
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="quiet_phys_opt" outid="quiet" label="Quiet" tooltip= "Ignore errors, return TCL_OK in any case"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="verbose_phys_opt" outid="verbose" label="Verbose" tooltip= "Temporarily override message limits set with set_msg_config"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="quiet_phys_opt" label= "Ignore errors, return TCL_OK in any case"
default="false" visible="true" omit="false" type="Boolean" format="QuietSyntax"/>
<parameter id="verbose_phys_opt" label= "Temporarily override message limits set with set_msg_config"
default="false" visible="true" omit="false" type="Boolean" format="VerboseSyntax"/>
<!-- TODO: Try outid to use with different parameters having same keyword -->
<!-- hidden (calculated) parameters -->
<input>
......@@ -185,6 +182,7 @@
"SkipPlacement"
"SkipPhysOpt"
"SkipSnapshotPlace"
"---"
"SnapshotOptPlace" <!-- same as in project -->
"ShowWarnings"
"ShowInfo"
......@@ -195,6 +193,7 @@
</group>
<group name="Optimization">
"directive_opt"
"---"
"retarget"
"propconst"
"sweep"
......@@ -212,14 +211,17 @@
</group>
<group name="Placement">
"directive_place"
"---"
"no_timing_driven"
"unplace"
"post_place_opt"
"---"
"quiet_place"
"verbose_place"
</group>
<group name="Physical Optimization">
"directive_phys_opt"
"---"
"fanout_opt"
"placement_opt"
"rewire"
......@@ -232,6 +234,7 @@
"retime"
<!-- TODO: Implement force_replication_on_nets args (requires? get_nets command ) -->
"critical_pin_opt"
"---"
"quiet_phys_opt"
"verbose_phys_opt"
</group>
......@@ -342,7 +345,7 @@
<if SkipSnapshotPlace="false">
"write_checkpoint -force %SnapshotOptPlace\n"
</if>
"puts '@@FINISH@@'\n"
"puts \"@@FINISH@@\"\n"
</line>
<!-- -top npmtest -part xc7k70tfbg484-2 -flatten rebuilt\n" -->
<if-and SkipSnapshotSynth="false"
......
......@@ -69,18 +69,18 @@
</action-menu>
<parameter id="ConstraintsFiles" type="Filelist" format="ParamListSyntax"
default="" label="Select constraint files to load to Vivado" readonly="false"
default="" label="Constraints files" tooltip="Select constraint files to load to Vivado" readonly="false"
visible="true" />
<parameter id="SkipSnapshotSynth" label="Do not create snapshot after synthesis"
<parameter id="SkipSnapshotSynth" label="Skip snapshot" tooltip="Do not create snapshot after synthesis"
default="false"
type= "Boolean" format="None"/>
<parameter id="ResetProject" label="Reset project before loading source files"
<parameter id="ResetProject" label="Reset project" tooltip="Reset project before loading source files"
default="true"
type= "Boolean" format="None"/>
<parameter id="ShowWarnings" label="Parse warning messages"
<parameter id="ShowWarnings" label="Show Warnings" tooltip="Parse warning messages"
default="true"
type= "Boolean" format="None"/>
<parameter id="ShowInfo" label="Parse info messages"
<parameter id="ShowInfo" label="Show info" tooltip="Parse info messages"
default="true"
type= "Boolean" format="None"/>
<parameter id="PreGrepW" visible="false"
......@@ -89,58 +89,55 @@
<parameter id="PreGrepI" visible="false"
type="String" format="None"
default="?%ShowInfo=true: |INFO, "/>
<parameter id="GrepEWI" label="Grep filter"
<parameter id="GrepEWI" label="Grep filter" tooltip="Calculated grep filter"
default="grep --line-buffered -E 'ERROR%PreGrepW%PreGrepI'"
type="String" format="CopyValue"
visible="true" readonly="true"/>
<!-- synth_design arguments -->
<parameter id="name" label= "Design to open after synth"
<parameter id="directive" label="Directive" tooltip= "Skip some of the optimization algorithms"
default="default" visible="true" omit="default" type="DirectiveType" format="Dash"/>
<parameter id="name" label="Design name" tooltip= "Design to open after synth"
default="" visible="true" omit="" type="String" format="Dash"/>
<!-- part is defined in "FPGA_project" -->
<!-- <parameter id="part" label= "Xilinx device to use"
<!-- <parameter id="part" label="Part" tooltip= "Xilinx device to use"
default="" visible="true" omit="" type="String" format="Dash"/> -->
<parameter id="constrset" label= "Constraints set to use"
<parameter id="constrset" label="Constraints set" tooltip= "Constraints set to use"
default="" visible="true" omit="" type="String" format="Dash"/>
<!-- <parameter id="top" label= "Top module of the design (you may set in in project properties)"
<!-- <parameter id="top" label="" tooltip= "Top module of the design (you may set in in project properties)"
default="%ImplementationTopModule" visible="true" omit="" type="String" format="Dash"/> -->
<parameter id="include_dirs" label= "Include directories for Verilog `include"
<parameter id="include_dirs" label="Include directory" tooltip= "Include directories for Verilog `include"
default="" visible="true" omit="" type="Stringlist" format="DashList"/>
<parameter id="generic" label= '"name=value" list of VHDL generic entity or Verilog parameter'
<parameter id="generic" label="VHDL/Verilog parameters" tooltip= '"name=value" list of VHDL generic entity or Verilog parameter'
default="" visible="true" omit="" type="Stringlist" format="DashList"/>
<parameter id="verilog_define" label= 'Verilog "macro=text" definitions'
<parameter id="verilog_define" label="Verilog defines" tooltip= 'Verilog "macro=text" definitions'
default="" visible="true" omit="" type="Stringlist" format="DashList"/>
<parameter id="flatten_hierarchy" label= "Flatten Hierarchy during LUT mapping"
<parameter id="flatten_hierarchy" label="Flatten hierarchy" tooltip= "Flatten Hierarchy during LUT mapping"
default="rebuilt" visible="true" omit="rebuilt" type="FlattenHierarchyType" format="Dash"/>
<parameter id="gated_clock_conversion" label= "Conversion of gated clocks to FF CE where possible"
<parameter id="gated_clock_conversion" label="Gated clock conversion" tooltip= "Conversion of gated clocks to FF CE where possible"
default="off" visible="true" omit="off" type="GatedClockConversionType" format="Dash"/>
<parameter id="directive" label= "Skip some of the optimization algorithms"
default="default" visible="true" omit="default" type="DirectiveType" format="Dash"/>
<parameter id="rtl" label= "Elaborate HDL source files and open RTL design"
<parameter id="rtl" label="open RTL" tooltip= "Elaborate HDL source files and open RTL design"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="bufg" label= "Maximum number of global buffers to use"
<parameter id="bufg" label="BUFG maximal number" tooltip= "Maximum number of global buffers to use"
default="12" visible="true" omit="12" type="Cardinal" format="Dash"/>
<parameter id="no_lc" label= "Disable LUT combining feature"
<parameter id="no_lc" label="Disable LUT combining" tooltip= "Disable LUT combining feature"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="fanout_limit" label= "Maximum fanout applied during synthesis"
<parameter id="fanout_limit" label="Fanout limit" tooltip= "Maximum fanout applied during synthesis"
default="10000" visible="true" omit="10000" type="Cardinal_1" format="Dash"/>
<parameter id="mode" label= "Imaginary property synthesis type"
<parameter id="mode" label="ImgP synthesis type" tooltip= "Imaginary property synthesis type"
default="default" visible="true" omit="default" type="ModeType" format="Dash"/>
<parameter id="fsm_extraction" label= "Finite State Machine encoding"
<parameter id="fsm_extraction" label="FSM encoding" tooltip= "Finite State Machine encoding"
default="off" visible="true" omit="off" type="FSMType" format="Dash"/>
<parameter id="keep_equivalent_registers" label= "Prevent merging of equivalent registers"
<parameter id="keep_equivalent_registers" label="Keep equivalent registers" tooltip= "Prevent merging of equivalent registers"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="resource_sharing" label= "Share resources (adders and such) between different signals"
<parameter id="resource_sharing" label="Resource sharing" tooltip= "Share resources (adders and such) between different signals"
default="auto" visible="true" omit="auto" type="ResourceSharingType" format="Dash"/>
<parameter id="control_set_opt_thershold" label= "Use dedicated FF control input if fanout exceeds this value"
<parameter id="control_set_opt_thershold" label="Control input threshold" tooltip= "Use dedicated FF control input if fanout exceeds this value"
default="4" visible="true" omit="4" type="Cardinal_1" format="Dash"/>
<parameter id="quiet" label= "Ignore errors, return TCL_OK in any case"
<parameter id="quiet" label="Quiet" tooltip= "Ignore errors, return TCL_OK in any case"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<parameter id="verbose" label= "Temporarily override message limits set with set_msg_config"
<parameter id="verbose" label="Verbose" tooltip= "Temporarily override message limits set with set_msg_config"
default="false" visible="true" omit="false" type="Boolean" format="DashName"/>
<!-- hidden (calculated) parameters -->
......@@ -148,9 +145,9 @@
format="FilteredSourceListSyntax" default="" readonly="true" visible="false" />
<!-- Parameter read_xdc just copies parameter ConstraintsFiles, but they have different syntax (output representation) -->
<parameter id="read_xdc" type="Filelist" format="read_xdc_syntax" label="read_xdc"
<parameter id="read_xdc" type="Filelist" format="read_xdc_syntax" label="" tooltip="read_xdc"
default="%ConstraintsFiles" visible="false" />
<parameter id="top" label= "Top module of the design"
<parameter id="top" label="" tooltip= "Top module of the design"
default="%%TopModule" visible="false" omit="" type="String" format="Dash"/>
<parameter id="VivadoSynthActionIndex" default="%%ChosenActionIndex"
type="String" format="CopyValue" visible="false" />
......@@ -167,6 +164,8 @@
"GrepEWI"
</group>
<group name="Synthesis">
"directive"
"---"
"top"
"name"
"part"
......@@ -176,7 +175,6 @@
"verilog_define"
"flatten_hierarchy"
"gated_clock_conversion"
"directive"
"rtl"
"bufg"
"no_lc"
......@@ -186,6 +184,7 @@
"keep_equivalent_registers"
"resource_sharing"
"control_set_opt_thershold"
"---"
"quiet"
"verbose"
</group>
......@@ -225,7 +224,7 @@
"read_verilog %FilteredSourceList\n"
<if VivadoSynthActionIndex="0">
<if ConstraintsFiles="">
'puts "No constraints files specified, skipping read_xdc command"\n'
"puts \"No constraints files specified, skipping read_xdc command\";\n"
</if>
<if-not ConstraintsFiles="">
"%read_xdc\n"
......@@ -260,7 +259,7 @@
VivadoSynthActionIndex="0">
"write_checkpoint -force %SnapshotSynth\n"
</if-and>
"puts '@@FINISH@@'\n"
"puts \"@@FINISH@@\"\n"
</line>
<!-- -top npmtest -part xc7k70tfbg484-2 -flatten rebuilt\n" -->
<if-and SkipSnapshotSynth="false"
......@@ -273,10 +272,12 @@
"%VivadoLocalDir/"
</line>
</if-and>
<!-- errors=".*[ERROR|CRITICAL WARNING]: (\[.*\].*)\[(.*):([0-9]+)\]"
-->
<line name="parser_VivadoSynth"
errors=".*ERROR: (\[.*\].*)\[(.*):([0-9]+)\]"
warnings=".*WARNING: (\[.*\].*)\[(.*):([0-9]+)\]"
info=".*INFO: (\[.*\].*)\[(.*):([0-9]+)\]">
errors= ".*ERROR: (\[.*\].*)\[(.*):([0-9]+)\]"
warnings= ".*WARNING: (\[.*\].*)\[(.*):([0-9]+)\]"
info= ".*INFO: (\[.*\].*)\[(.*):([0-9]+)\]">
"-c"
"%GrepEWI"
"| %SedPaths"
......
......@@ -53,7 +53,7 @@
stdout="parser_001"
timeout="Timeout">
"%TCLCommand"
"puts '@@FINISH@@'"
"puts \"@@FINISH@@\"\n"
"``"`" <!-- two new lines should generate a pair of prompts from the remote -->
</line>
<line name="command_line_02">
......
......@@ -10,6 +10,11 @@
<action-menu>
<action label="Copy unisims" resource="" icon="xilinx.png" />
</action-menu>
<input>
<group name="General">
"VivadoUnisimsAbsolutePath"
</group>
</input>
<output>
<line name="copy_unisims">
......
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